Patents Assigned to KATOH ELECTRIC CO, LTD.
-
Patent number: 11056422Abstract: A semiconductor module includes a die pad frame; a semiconductor chip disposed in a chip region on an upper surface of the die pad frame, the semiconductor chip having an upper surface on which a first electrode is disposed and a lower surface on which a second electrode is disposed; a conductive connection member for die pad disposed between the second electrode of the semiconductor chip and the upper surface of the die pad frame, the conductive connection member for die pad electrically connecting the second electrode of the semiconductor chip and the upper surface of the die pad frame; and a sealing resin for sealing the semiconductor chip, the die pad frame, and the conductive connection member for die pad.Type: GrantFiled: May 29, 2018Date of Patent: July 6, 2021Assignees: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD., KATOH ELECTRIC CO., LTD.Inventors: Hiroyoshi Urushihata, Takashi Shigeno, Eiki Ito, Wataru Kimura, Hirotaka Endo, Toshio Koike, Toshiki Kouno
-
Publication number: 20210134709Abstract: A semiconductor module includes a die pad frame; a semiconductor chip disposed in a chip region an an upper surface of the die pad frame, the semiconductor chip having an upper surface on which a first electrode is disposed and a lower surface on which a second electrode is disposed; a conductive connection member for die pad disposed between the second electrode of the semiconductor chip and the upper surface of the die pad frame, the conductive connection member for die pad electrically connecting the second electrode of the semiconductor chip and the upper surface of the die pad frame; and a sealing resin for sealing the semiconductor chip, the die pad frame, and the conductive connection member for die pad.Type: ApplicationFiled: May 29, 2018Publication date: May 6, 2021Applicants: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD., KATOH ELECTRIC CO., LTD.Inventors: Hiroyoshi URUSHIHATA, Takashi SHIGENO, Eiki ITO, Wataru KIMURA, Hirotaka ENDO, Toshio KOIKE, Toshiki KOUNO
-
Patent number: 10784186Abstract: A semiconductor module includes a die pad frame; a semiconductor chip disposed in a chip region on an upper surface of the die pad frame, the semiconductor chip having an upper surface on which a first electrode is disposed and a lower surface on which a second electrode is disposed; a conductive connection member for die pad disposed between the second electrode of the semiconductor chip and the upper surface of the die pad frame, the conductive connection member for die pad electrically connecting the second electrode of the semiconductor chip and the upper surface of the die pad frame; a first clip frame disposed on the upper surface of the semiconductor chip; a first clip conductive connection member disposed between the first electrode on the semiconductor chip and a lower surface of the first clip frame, the first clip conductive connection member electrically connecting the first electrode of the semiconductor chip and the lower surface of the first clip frame; and a sealing resin for sealing the semicType: GrantFiled: October 16, 2018Date of Patent: September 22, 2020Assignee: KATOH ELECTRIC CO., LTD.Inventors: Hiroyoshi Urushihata, Takashi Shigeno, Eiki Ito, Wataru Kimura, Hirotaka Endo, Toshio Koike, Toshiki Kouno
-
Patent number: 10777489Abstract: A semiconductor module includes a die pad frame; a semiconductor chip disposed in a chip region on an upper surface of the die pad frame, the semiconductor chip having an upper surface on which a first electrode is disposed and a lower surface on which a second electrode is disposed; a conductive connection member for die pad disposed between the second electrode of the semiconductor chip and the upper surface of the die pad frame, the conductive connection member for die pad electrically connecting the second electrode of the semiconductor chip and the upper surface of the die pad frame; and a sealing resin for sealing the semiconductor chip, the die pad frame, and the conductive connection member for die pad.Type: GrantFiled: October 16, 2018Date of Patent: September 15, 2020Assignee: KATOH ELECTRIC CO., LTD.Inventors: Hiroyoshi Urushihata, Takashi Shigeno, Eiki Ito, Wataru Kimura, Hirotaka Endo, Toshio Koike, Toshiki Kouno
-
Patent number: 10707156Abstract: An electronic device comprises a semiconductor chip, an accommodating part that accommodates the semiconductor chip, a plurality of terminals that are provided along a first side of a first surface and along a second side opposite to the first side with respect to the semiconductor chip, the plurality of terminals being electrically connected to the semiconductor chip and being exposed on the rectangular first surface of the accommodating part, and a plurality of conductive members that penetrate from the first surface of the accommodating part to the second surface opposite to the first surface.Type: GrantFiled: January 31, 2019Date of Patent: July 7, 2020Assignees: KATOH ELECTRIC CO., LTD., TOREX SEMICONDUCTOR LTD.Inventors: Shinya Sato, Yuki Yasuda, Yojiro Shiina
-
Patent number: 10600725Abstract: A semiconductor module includes a die pad frame; a semiconductor chip disposed in a chip region on an upper surface of the die pad frame, a conductive connection member for die pad disposed between the second electrode of the semiconductor chip and the upper surface of the die pad frame, the conductive connection member for die pad electrically connecting the second electrode of the semiconductor chip and the upper surface of the die pad frame; a first clip frame disposed on the upper surface of the semiconductor chip; a first clip conductive connection member disposed between the first electrode on the semiconductor chip and a lower surface of the first clip frame, the first clip conductive connection member electrically connecting the first electrode of the semiconductor chip and the lower surface of the first clip frame; and a sealing resin.Type: GrantFiled: May 29, 2018Date of Patent: March 24, 2020Assignees: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD., KATOH ELECTRIC CO., LTD.Inventors: Hiroyoshi Urushihata, Takashi Shigeno, Eiki Ito, Wataru Kimura, Hirotaka Endo, Toshio Koike, Toshiki Kouno
-
Publication number: 20190371709Abstract: A semiconductor module includes a die pad frame; a semiconductor chip disposed in a chip region on an upper surface of the die pad frame, the semiconductor chip having an upper surface on which a first electrode is disposed and a lower surface on which a second electrode is disposed; a conductive connection member for die pad disposed between the second electrode of the semiconductor chip and the upper surface of the die pad frame, the conductive connection member for die pad electrically connecting the second electrode of the semiconductor chip and the upper surface of the die pad frame; a first clip frame disposed on the upper surface of the semiconductor chip; a first clip conductive connection member disposed between the first electrode on the semiconductor chip and a lower surface of the first clip frame, the first clip conductive connection member electrically connecting the first electrode of the semiconductor chip and the lower surface of the first clip frame; and a sealing resin for sealing the semicType: ApplicationFiled: October 16, 2018Publication date: December 5, 2019Applicant: KATOH ELECTRIC CO., LTD.Inventors: Hiroyoshi URUSHIHATA, Takashi SHIGENO, Eiki ITO, Wataru KIMURA, Hirotaka ENDO, Toshio KOIKE, Toshiki KOUNO
-
Publication number: 20190371710Abstract: A semiconductor module includes a die pad frame; a semiconductor chip disposed in a chip region on an upper surface of the die pad frame, a conductive connection member for die pad disposed between the second electrode of the semiconductor chip and the upper surface of the die pad frame, the conductive connection member for die pad electrically connecting the second electrode of the semiconductor chip and the upper surface of the die pad frame; a first clip frame disposed on the upper surface of the semiconductor chip; a first dip conductive connection member disposed between the first electrode on the semiconductor chip and a lower surface of the first clip frame, the first clip conductive connection member electrically connecting the first electrode of the semiconductor chip and the lower surface of the first clip frame and a sealing resin.Type: ApplicationFiled: May 29, 2018Publication date: December 5, 2019Applicants: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD., KATOH ELECTRIC CO., LTD.Inventors: Hiroyoshi URUSHIHATA, Takashi SHIGENO, Eiki ITO, Wataru KIMURA, Hirotaka ENDO, Toshio KOIKE, Toshiki KOUNO
-
Publication number: 20190371712Abstract: A semiconductor module includes a die pad frame; a semiconductor chip disposed in a chip region on an upper surface of the die pad frame, the semiconductor chip having an upper surface on which a first electrode is disposed and a lower surface on which a second electrode is disposed; a conductive connection member for die pad disposed between the second electrode of the semiconductor chip and the upper surface of the die pad frame, the conductive connection member for die pad electrically connecting the second electrode of the semiconductor chip and the upper surface of the die pad frame; and a sealing resin for sealing the semiconductor chip, the die pad frame, and the conductive connection member for die pad.Type: ApplicationFiled: October 16, 2018Publication date: December 5, 2019Applicant: Katoh Electric Co., Ltd.Inventors: Hiroyoshi Urushihata, Takashi Shigeno, Eiki Ito, Wataru Kimura, Hirotaka Endo, Toshio Koike, Toshiki Kouno
-
Patent number: 10242937Abstract: To increase a current that can be supplied to an electronic element mounted on an upper surface of a semiconductor package. An electronic device includes a semiconductor chip, a package that accommodates the semiconductor chip, a plurality of terminals that is electrically bonded with the semiconductor chip and is exposed on a first surface of the package, and at least one copper post that penetrates from the first surface of the package to a second surface opposite to the first surface, and that has a cross sectional area in the direction of the first surface, which is larger than the area of the plurality of terminals on the first surface.Type: GrantFiled: October 25, 2017Date of Patent: March 26, 2019Assignees: KATOH ELECTRIC CO, LTD., TOREX SEMICONDUCTOR LTD.Inventors: Shinya Sato, Yuki Yasuda, Yojiro Shiina