Patents Assigned to Kulicke & Soffa Investments, Inc.
  • Publication number: 20070026574
    Abstract: Disclosed are interconnect structures and methods which utilize a bonding surface comprising copper nitride. The interconnect structures include a bonding surface comprising copper nitride which is effective at preventing oxidation and/or other unwanted corrosion of the underlying conductive material while providing the basis for a high conductivity bond. The copper nitride bonding surface provides a relatively non-conductive, corrosion-resistant bonding surface while at the same time being readily transformed into a conductive layer at or just prior to the time of bonding.
    Type: Application
    Filed: April 8, 2004
    Publication date: February 1, 2007
    Applicant: KULICKE & SOFFA INVESTMENTS INC.
    Inventors: David Beatson, Horst Clauderg, Kenneth Dury
  • Patent number: 7077304
    Abstract: A bonding tool for bonding a wire to a substrate. The bonding tool has a body portion, a working tip coupled to one end of the body portion, an orifice extending along a longitudinal axis of the body and the working tip, and a polymer coating disposed over at least a portion of a surface of the orifice.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: July 18, 2006
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: Benjamin Sonnenreich, Sigalit Robinzon
  • Patent number: 7004369
    Abstract: A bonding tool for bonding a fine wire to bonding pads having a very fine pitch is disclosed. The bonding tool comprises a working tip at an end thereof. The working tip includes an annular chamfer formed at an inner portion of the end of the working tip, the inner annular chamfer having an angle of less than about 60 degrees. The inner annular chamfer is coupled to a lower portion of a cylindrical passage formed in the bonding tool.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: February 28, 2006
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: Gil Perlberg, Arie Bahalul, Dan Mironescu, Moshe Amsalem, Jon Brunner
  • Patent number: 6997368
    Abstract: A system and method for aligning optical fibers that takes into account variations due to temperature changes and other nonrandom systemic effects. The system includes an alignment tool having a plurality of internal reflection surfaces and located below a vision plane of the first one of the pair of optical fibers, and an optical detector to receive an indirect image of a bottom surface of the first optical fiber through the alignment tool, such an offset between the first optical fiber and the optical detector is determined based on the indirect image received by the optical detector. The method comprises the steps of providing a cornercube offset tool having a plurality of total internal reflection surfaces below a vision plane of the first optical fiber, and receiving an indirect image of the first optical fiber through the cornercube offset tool.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: February 14, 2006
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: David T. Beatson, Deepak Sood, Ashoke Banerjee
  • Publication number: 20050260791
    Abstract: A method of processing a semiconductor device is provided. The method includes providing a semiconductor device supported by a carrier structure. The carrier structure defines a plurality of vias from a first surface of the carrier structure adjacent the semiconductor device to a second surface of the carrier structure. The method also includes extending a conductor through one of the vias such that a first end of the conductor at least partially extends below the second surface. The method also includes electrically coupling another portion of the conductor to a portion of the semiconductor device.
    Type: Application
    Filed: May 5, 2005
    Publication date: November 24, 2005
    Applicant: Kulicke and Soffa Investments, Inc.
    Inventors: David Beatson, Jamin Ling
  • Publication number: 20050253140
    Abstract: A method of processing a semiconductor wafer including a plurality of semiconductor dies is provided. The method includes providing a semiconductor wafer including a plurality of semiconductor dies, at least a portion of the semiconductor dies including contact pads for testing the respective semiconductor die. The method also includes positioning conductive bumps on the contact pads prior to completing wafer testing of the semiconductor wafer and prior to the singulation of the plurality of semiconductor dies from the semiconductor wafer. At least a portion of the conductive bumps are configured to be electrical paths during wafer testing of the semiconductor wafer.
    Type: Application
    Filed: May 3, 2005
    Publication date: November 17, 2005
    Applicant: Kulicke and Soffa Investments, Inc.
    Inventor: David Beatson
  • Patent number: 6960022
    Abstract: A “hybrid” or macrocomposite guideway, wherein the “traditional” or existing guideway material (e.g., hardened steel) is maintained as the wear resistant, low friction surface intended to be in physical contact with one or more bearings, and further wherein this surface is backed up or supported by a substrate comprising a stiff, lightweight material. This macrocomposite guideway combines the desirable friction and wear characteristics of the traditional bearing materials with the stiffness and low mass of advanced materials. Candidate substrate materials include composites having a ceramic and/or a metallic matrix, monolithic ceramics or monolithic light metals. A cladding comprising the hardened steel wear surface layer may be attached to the rigid, lightweight substrate by adhesive bonding, mechanical fasteners or other mechanical fit such as a friction or interference fit. Preferably, though, the attachment is by means of a metallurgical bond.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: November 1, 2005
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: David T. Beatson, E. Walter Frasch, Paul J. Schlosser, Jai R. Singh, David W. McKenna, Craig Emmons
  • Patent number: 6955949
    Abstract: A method of packaging a semiconductor device is provided. The method includes applying an insulative material across only a portion of at least two of a plurality of conductors providing interconnection between elements in the semiconductor device. The method also includes encapsulating the conductors and elements, thereby packaging the semiconductor device.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: October 18, 2005
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: Rakesh Batish, Andrew F. Hmiel, Glenn Sandgren, Walt VonSeggern, C. Scott Kulicke
  • Patent number: 6953999
    Abstract: A package for mounting an integrated circuit die. In one embodiment the package comprises a metal substrate having first and second opposing primary surfaces and an aperture formed therebetween. A flexible thin film interconnect structure is formed over the first surface of the metal substrate and over the aperture. The flexible thin film interconnect structure has bottom and top opposing surfaces, a first region that is in direct contact with the first surface of the metal substrate and a second region that is opposite the aperture. The bottom surface of the thin film interconnect structure is in direct contact with the metal substrate in the first region.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: October 11, 2005
    Assignee: Kulicke and Soffa Investments, Inc.
    Inventors: Jan I. Strandberg, Richard Scott Trevino, Thomas B. Blount
  • Publication number: 20050181191
    Abstract: Electronic packages with uninsulated portions of copper circuits protected with coating layers having thicknesses that are suitable for soldering without fluxing and are sufficiently frangible when being joined to another metal surface to obtain metal-to-metal contact between the surfaces.
    Type: Application
    Filed: March 21, 2005
    Publication date: August 18, 2005
    Applicant: Kulicke & Soffa Investments, Inc
    Inventors: Timothy Ellis, Nikhil Murdeshwar, Mark Eshelman, Christian Rheault
  • Publication number: 20050146033
    Abstract: A package for mounting an integrated circuit die. In one embodiment the package comprises a metal substrate having first and second opposing primary surfaces and an aperture formed therebetween. A flexible thin film interconnect structure is formed over the first surface of the metal substrate and over the aperture. The flexible thin film interconnect structure has bottom and top opposing surfaces, a first region that is in direct contact with the first surface of the metal substrate and a second region that is opposite the aperture. The bottom surface of the thin film interconnect structure is in direct contact with the metal substrate in the first region.
    Type: Application
    Filed: February 16, 2005
    Publication date: July 7, 2005
    Applicant: Kulicke & Soffa Investments, Inc.
    Inventors: Jan Strandberg, Richard Trevino, Thomas Blount
  • Patent number: 6910612
    Abstract: A bonding tool for bonding a fine wire to bonding pads having a very fine pitch is disclosed. The bonding tool comprises a working tip at an end thereof. The working tip includes an annular chamfer formed at an inner portion of the end of the working tip, the inner annular chamfer having an angle of less than about 60 degrees. The inner annular chamfer is coupled to a lower portion of a cylindrical passage formed in the bonding tool.
    Type: Grant
    Filed: August 12, 2003
    Date of Patent: June 28, 2005
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: Gil Perlberg, Arie Bahalul, Dan Mironescu, Moshe Amsalem, Jon Brunner
  • Patent number: 6903880
    Abstract: A method and system for providing different images representing plural depths of field of an electronic device. The vision system has a beamsplitter for receiving an image of the device illuminated by the at least one light source, the beamsplitter providing one of the plurality of images of the device based in a wavelength of the light source; an aperture having a plurality of effective diameters based on the wavelength of light from the at least one light source, the aperture determining a depth of field of the image of the device; and an optical element for receiving the image of the device, the optical element magnifying the image by a predetermined magnification factor to produce a magnified image having the determined depth of field.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: June 7, 2005
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: David T. Beatson, Christian Hoffman
  • Patent number: 6885104
    Abstract: Electronic packages with uninsulated portions of copper circuits protected with coating layers having thicknesses that are suitable for soldering without fluxing and are sufficiently frangible when being joined to another metal surface to obtain metal-to-metal contact between the surfaces.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: April 26, 2005
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: Timothy W. Ellis, Nikhil Murdeshwar, Mark A. Eshelman, Christian Rheault
  • Patent number: 6872589
    Abstract: A package for mounting an integrated circuit die. In one embodiment the package comprises a metal substrate having first and second opposing primary surfaces and an aperture formed therebetween. A flexible thin film interconnect structure is formed over the first surface of the metal substrate and over the aperture. The flexible thin film interconnect structure has bottom and top opposing surfaces, a first region that is in direct contact with the first surface of the metal substrate and a second region that is opposite the aperture. The bottom surface of the thin film interconnect structure is in direct contact with the metal substrate in the first region.
    Type: Grant
    Filed: February 6, 2003
    Date of Patent: March 29, 2005
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: Jan I. Strandberg, Richard Scott Trevino, Thomas B. Blount
  • Patent number: 6870684
    Abstract: A method and system for providing different images representing plural depths of field of an electronic device. The vision system has a beamsplitter for receiving an image of the device illuminated by the at least one light source, the beamsplitter providing one of the plurality of images of the device based in a wavelength of the light source; an aperture having a plurality of effective diameters based on the wavelength of light from the at least one light source, the aperture determining a depth of field of the image of the device; and an optical element for receiving the image of the device, the optical element magnifying the image by a predetermined magnification factor to produce a magnified image having the determined depth of field.
    Type: Grant
    Filed: April 18, 2003
    Date of Patent: March 22, 2005
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: David T. Beatson, Christian Hoffman
  • Patent number: 6847122
    Abstract: A method of packaging a semiconductor device including a plurality of elements is provided. The method includes applying an insulative material to at least a portion of the semiconductor device, where the insulative material includes insulative particles having a diameter smaller than a gap between adjacent conductors providing interconnection between the elements. The method also includes curing the insulative material.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: January 25, 2005
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: Rakesh Batish, C. Scott Kulicke, Andrew Hmiel, Walt VonSeggern
  • Patent number: 6784556
    Abstract: The present invention provides a solution to the problem of weakening bond integrity in integrated circuit devices due in part to test probes galling and weakening the interconnect pads during functional and reliability test probing. In doing so, the invention enables a lowering of the chance a bond wire or interconnect pad will be lifted during a wire bonding process or in normal operation of an integrated circuit device.
    Type: Grant
    Filed: April 19, 2002
    Date of Patent: August 31, 2004
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventor: Paul T. Lin
  • Patent number: 6778274
    Abstract: A system and method having applications in semiconductor areas for accurate die placement on a substrate that takes into account any positional offset from the reference position due to variations caused by thermal change and other nonrandom systemic effects. The system includes an offset alignment tool having a plurality of internal reflection surfaces and located below a vision plane of the substrate, and an optical detector to receive an indirect image of a bottom surface of the die through the alignment tool, such that the die is accurately positioned on the substrate based on the indirect image received by the optical detector. The method comprises the steps of providing a cornercube offset alignment tool having a plurality of total internal reflection surfaces below a vision plane of the die, and receiving an indirect image of the die tool through the cornercube offset tool.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: August 17, 2004
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: David T. Beatson, Christian Hoffman, James E. Eder, Jonn Ditri
  • Patent number: RE39018
    Abstract: Two imaging equipment are provided at a pair of cutting blade units, and the two imaging equipment image patterns at first positions in proximity to the center of a wafer at the same time. A controller drives drive mechanisms to align the wafer in such a way that current image patterns at the first positions can match with a reference pattern at the first positions. Then, the two imaging equipment are moved to positions for imaging patterns at second positions at the outer circumference of the wafer to image the patterns at the second positions. The controller drives the drive mecha- nisms to align the wafer in such a way that current image patterns at the second positions can match with a reference pattern at the second positions.
    Type: Grant
    Filed: January 23, 2002
    Date of Patent: March 21, 2006
    Assignees: Tokyo Seimitsu Co., Ltd., Kulicke & Soffa Investments, Inc.
    Inventors: Masayuki Azuma, Hirofumi Shimoda, Mani Fischer