Patents Assigned to Lapis Semiconductor Co., Ltd.
  • Publication number: 20230152839
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Application
    Filed: January 18, 2023
    Publication date: May 18, 2023
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenjiro MATOBA, Kazuhiro YAMASHITA
  • Patent number: 11652953
    Abstract: A video signal processing device includes: a video signal dividing unit configured to divide a video signal into first to k-th (k is an integer of 2 or greater) partial video signals for each frame; a video change detection unit configured to determine, for each of the first to k-th partial video signals, whether or not a video based on the partial video signals has changed between respective frames, and generate first to k-th video change detection signals representing the respective detection results; and a video sameness determination unit configured to generate a video sameness signal indicating that the video signal has not changed, if the number of video change detection signals that indicate the video has not changed, among the first to k-th video change detection signals, is greater than a prescribed number.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: May 16, 2023
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Tomoyuki Ichikawa
  • Publication number: 20230097075
    Abstract: A measuring apparatus, includes: a first and a second ion-sensitive semiconductor elements and a reference electrode disposed so as to contact a medium of which a characteristic value is to be measured; a signal input unit receiving a first and a second signals from the first and the second ion-sensitive semiconductor elements, and generating a sensor signal; a processor processing the sensor signal; and a memory storing first data relating to fluctuations over time of the first and the second ion-sensitive semiconductor elements, and connected to the processor, wherein: the processor processes the sensor signal by using the first data and a cumulative energization time of the first and the second ion-sensitive semiconductor elements, and generate an output signal for the characteristic value, the first ion-sensitive semiconductor element includes a first sensitive film, the second ion-sensitive semiconductor element includes a second sensitive film different from the first material.
    Type: Application
    Filed: September 27, 2022
    Publication date: March 30, 2023
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Masao OKIHARA
  • Patent number: 11611686
    Abstract: A video signal processing device including a video signal dividing unit that divides a video signal into first to k-th division video signals (k is an integer of 2 or more) for each frame; a video change detecting unit that detects, for each of the first to k-th division video signals, whether or not there has occurred a change in the video signal between the frames, and generates first to k-th video change detection signals representing the detection results; and a video no-change determining unit that generates a video no-change signal indicating that there is no change in the video signal when the number of video change detection signals indicating that there is no change among the first to k-th video change detection signals is greater than a predetermined number.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: March 21, 2023
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Tomoyuki Ichikawa
  • Patent number: 11610962
    Abstract: A semiconductor device including: a semiconductor substrate; a seed layer that is formed on the semiconductor substrate; and wiring that is formed on the seed layer and includes parallel row portions that are arranged at intervals from each other, and in which penetration passages that penetrate the parallel row portions in a direction in which the parallel rows lined up are formed in the parallel row portions.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: March 21, 2023
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Takamitsu Furukawa
  • Patent number: 11600589
    Abstract: A semiconductor device including a terminal that is formed using copper, that is electrically connected to a circuit element, and that includes a formation face formed with a silver-tin solder bump such that a nickel layer is interposed between the terminal and the solder bump, wherein the nickel layer is formed on a region corresponding to part of the formation face.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: March 7, 2023
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Masanori Shindo
  • Patent number: 11599759
    Abstract: A passive radio frequency identification (RFID) tag includes: a rectifier circuit that rectifies a signal obtained from an antenna and outputs the rectified signal as a DC voltage. A capacitor is connected to an output line of the rectifier circuit. A first regulator circuit generates a first regulator voltage by stabilizing the output DC voltage from the rectifier circuit. A control circuit starts operating when the first regulator voltage is applied, and the control circuit generates a control signal upon receipt of the modulation signal section of the wireless signal. A second regulator circuit generates a second regulator voltage by stabilizing the output DC voltage from the rectifier circuit in response to the control signal and outputs the second regulator voltage to the outside.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: March 7, 2023
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Shigeki Yamauchi
  • Patent number: 11587211
    Abstract: An image distortion correction circuit according to the present invention comprises; a first distortion correction circuit that performs a mapping process on an input image signal to generate a distortion-corrected image signal; an inspection region defining circuit that defines an inspection image region in the one-frame image; an inspection region extraction circuit that extracts a part corresponding to the inspection image region from the distortion-corrected image signal and outputs the part of the distortion-corrected image signal as a first inspection image signal; a second distortion correction circuit that outputs a second inspection signal, the second inspection signal being generated by performing the mapping process on the part of the input image signal corresponding to the inspection image region; and a failure determination circuit that determines that a failure occurs and outputs a failure detection signal when the first inspection image signal and the second inspection image signal are mutually
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: February 21, 2023
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Yuki Imatoh
  • Patent number: 11574609
    Abstract: A display device and data driver are provided. The display device includes a plurality of data drivers provided for a predetermined number of data lines in a plurality of data lines. The plurality of data drivers receive the serialized video data signal from the display controller, generate a modulated data timing signal whose period changes within the one frame period, and supply a gradation voltage signal to each of the predetermined number of data lines for each of data periods based on a data timing of the modulated data timing signal, each of data periods corresponding to the data timing of the modulated data timing signal.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: February 7, 2023
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventors: Hiroshi Tsuchi, Koji Higuchi
  • Patent number: 11567526
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: January 31, 2023
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Kenjiro Matoba, Kazuhiro Yamashita
  • Patent number: 11561262
    Abstract: A signal transmission device and a battery monitoring device are provided. The signal transmission device is connected to an operation device including an operation circuit for performing an operation based on a first voltage, a measurement circuit for obtaining measurement data based on the first voltage, and a process control circuit for operating based on a lower voltage and control an operation of the operation circuit based on the measurement data, and transmits and receives signals between the process control circuit and the measurement circuit. The signal transmission device includes a power reception circuit for supplying power from the power transmission circuit to the measurement circuit to acquire measurement data, and a power transmission circuit for transmitting the power from a process control circuit to the power reception circuit to receive the measurement data from the power reception circuit and supply the same to the process control circuit.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: January 24, 2023
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Takashi Taya
  • Patent number: 11562775
    Abstract: A semiconductor device including a FIFO circuit in which a data capacity can be increased while minimizing an increase in a circuit scale is provided. The semiconductor device includes a single-port type storage unit (11) which stores data, a flip-flop (12) which temporarily stores write data (FIFO input) or read data (FIFO output) of the storage unit (11), and a control unit (14, 40) which controls a write timing of a data signal, which is stored in the flip-flop (12), to the storage unit (11) or a read timing of the data signal from the storage unit to avoid an overlap between a write operation and a read operation in the storage unit (11).
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: January 24, 2023
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Kenjiro Matoba
  • Patent number: 11551624
    Abstract: Provided is a display panel, a source driver that generates a gradation voltage signal based on an image data signal, a timing controller that supplies the image data signal to the source driver, and an illumination drive unit that controls an amount of light of a backlight that illuminates each of a plurality of areas formed by dividing a display screen in the display panel. The source driver or the timing controller calculates feature values of the image data signal corresponding to each of the plurality of areas of the display panel and supplies a dimming data signal representing the amount of light of the backlight according to the feature values of each area to the illumination drive unit. The illumination drive unit controls the amount of light of the backlight for each of the plurality of areas based on the dimming data signal.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: January 10, 2023
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Hiroaki Ishii, Shinichi Fukuzako
  • Patent number: 11545452
    Abstract: A semiconductor device including a semiconductor substrate including an electrode; a wire connected to the electrode; a first insulating film including a first opening that partially exposes the wire; a base portion that is connected to a portion of the wire exposed via the first opening, and that includes a conductor including a recess corresponding to the first opening; and a solder film on a surface of the base portion. Solder included in the solder film is fused by a first heat treatment, and the recess is filled with the fused solder.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: January 3, 2023
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Masanori Shindo
  • Patent number: 11538775
    Abstract: A semiconductor device includes wiring that is formed by a conductive body extending, via an insulating film, on a front surface of a semiconductor substrate, and an insulating layer that covers the front surface of the semiconductor substrate including the wiring. Gaps are provided extending from an upper surface of the wiring to a lower portion of the insulating film.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: December 27, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Masanori Shindo
  • Patent number: 11526002
    Abstract: An image distortion correction circuit performs a distortion correction process on an image signal on the basis of distortion correction data to generate a distortion-corrected image signal. The distortion correction data is for correcting coordinate positions of display data fragments corresponding to respective N coordinate positions in the display image to first to N-th distortion correction coordinate positions. The image distortion correction circuit determines a distortion correction coordinate position where abnormality occurs as an abnormal coordinate position among the first to N-th distortion correction coordinate positions on the basis of respective intervals between the adjacent first to N-th distortion correction coordinate positions indicated by the distortion correction data.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: December 13, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Yuki Imatoh
  • Patent number: 11514829
    Abstract: A display device includes a display panel, a display controller configured to output a video data signal, a gate driver, and a plurality of source drivers which are arranged in an extension direction of gate lines and generate a gradation voltage signal to be supplied to each of a plurality of pixel units based on the video data signal supplied from the display controller. Each of the plurality of source drivers includes a data processing unit configured to share an abnormal state sharing signal indicating whether an abnormality has occurred in communication with the display controller with other source drivers, and when the abnormal state sharing signal indicates that an abnormality has occurred in communication with the display controller, supply a gradation voltage signal corresponding to predetermined gradation data different from a gradation voltage signal based on the video data signal to each of the plurality of pixel units.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: November 29, 2022
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Hiroaki Ishii
  • Patent number: 11510348
    Abstract: A shield case for covering an electronic component includes a top panel portion made of a metal plate, a plurality of terminal leg portions formed to project in a direction intersecting with the top panel portion from a peripheral edge portion thereof, and a side plate portion formed to project in the direction intersecting with the top panel portion from a peripheral edge portion of the top panel portion other than the plurality of terminal leg portions. Each of the plurality of terminal leg portions includes a leg portion that stretches from the top panel portion, a joint portion that extends in a direction intersecting with the leg portion from a distal end of the leg portion, and a terminal portion with a ring-shaped cross-sectional surface that has a projecting support abutting on the leg portion from a distal end of the joint portion.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: November 22, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Shigeki Yamauchi
  • Patent number: 11501729
    Abstract: A source driver includes a data latch unit that outputs acquired pixel data, a gradation voltage conversion unit that acquires the pixel data outputted from the data latch unit and converts the pixel data to gradation voltages, an output unit that amplifies and outputs the gradation voltages to source lines, and a timing control unit that controls the timing of the output of the pixel data from the data latch unit. The timing control unit performs control such that the longer a source line is from a source driver to a pixel column, the smaller the timing difference is between acquisition of the pixel data by the data latch unit and the output of the pixel data.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: November 15, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Naoki Taniguchi, Hiroshi Tsuchi, Takashi Ohno
  • Patent number: 11502206
    Abstract: A semiconductor wafer manufacturing method including: forming a plurality of trench capacitors at a main surface of a semiconductor wafer, wherein each of the plurality of trench capacitors is configured as unit cells that internally include unit trench capacitors, and wherein a length component in a predetermined direction of a layout pattern of trenches of the plurality of trench capacitors is made equivalent, within a fixed tolerance range, to a length component in a direction that intersects the predetermined direction.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: November 15, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Hiroshi Shibata