Patents Assigned to Menlo Industries, Inc.
  • Patent number: 5225369
    Abstract: A tunnel diode is disclosed having a highly P-doped layer of indium gallium arsenide formed on a highly N-doped layer of indium gallium arsenide which is supported on a semi-insulating substrate of indium phosphide. In an alternative embodiment, a tunnel diode is disclosed which has a highly P-doped layer of indium gallium arsenide formed on a highly N-doped layer of indium gallium arsenide which is supported on an N-doped substrate.
    Type: Grant
    Filed: November 4, 1991
    Date of Patent: July 6, 1993
    Assignee: Menlo Industries, Inc.
    Inventors: Chung-Yi Su, Sanehiko Kakihana, Domingo A. Figueredo
  • Patent number: 5093692
    Abstract: A tunnel diode is disclosed having a highly P-doped layer of indium gallium arsenide formed on a highly N-doped layer of indium gallium arsenide which is supported on a semi-insulating substrate of indium phosphide. In an alternative embodiment, a tunnel diode is disclosed which has a highly P-doped layer of indium gallium arsenide formed on a highly N-doped layer of indium gallium arsenide which is supported on an N-doped substrate.
    Type: Grant
    Filed: November 9, 1990
    Date of Patent: March 3, 1992
    Assignee: Menlo Industries, Inc.
    Inventors: Chung-Yi Su, Sanehiko Kakihana, Domingo A. Figueredo
  • Patent number: 4906956
    Abstract: Disclosed is a tunable circuit for an integrated circuit device and a process for making such circuit.
    Type: Grant
    Filed: October 5, 1987
    Date of Patent: March 6, 1990
    Assignee: Menlo Industries, Inc.
    Inventor: Sanehiko Kakihana
  • Patent number: 4826070
    Abstract: Disclosed is a process for attaching a die to a package, which process utilizes a heat cycle in conjunction with a vacuum in the attachment process.
    Type: Grant
    Filed: October 5, 1987
    Date of Patent: May 2, 1989
    Assignee: Menlo Industries, Inc.
    Inventor: Sanehiko Kakihana
  • Patent number: 4792531
    Abstract: Disclosed is a process for producing a field effect transistor to provide a uniformity of spacing between the gate and drain as well as the gate and source.
    Type: Grant
    Filed: October 5, 1987
    Date of Patent: December 20, 1988
    Assignee: Menlo Industries, Inc.
    Inventor: Sanehiko Kakihana