Patents Assigned to Nippon Electric Co., Inc.
  • Patent number: 4545014
    Abstract: An information processing apparatus employs first and second direct memory access controllers which cooperate during transfer of information between first and second devices, e.g. memories. The first controller controls information transfer from the first memory to the second controller and the second controller transfers the information from its own internal storage to the second memory while simultaneously receiving further information under the control of the first controller. The second controller includes address control circuitry for high speed generation of non-sequential addresses for writing into the second memory.
    Type: Grant
    Filed: November 25, 1981
    Date of Patent: October 1, 1985
    Assignee: Nippon Electric Co., Inc.
    Inventor: Tetsuji Oguchi
  • Patent number: 4373206
    Abstract: A transmitter control system for transmitters having means for selectively switching one channel to another in the multiple channels and means for controlling the transmitter output so as to deactivate, activate and reduce the transmitter output. The system comprises comparator means for comparing a start signal from the transmitter output control means with a detected signal of the transmitter output, the output of the comparator means being adapted to selectively drive at least one of the channel switching means for switching channels and a transmitter power reduction control circuit included in the transmitter output control means upon occurrence of a detected signal of the transmitter output indicative of a failure of the transmitter.
    Type: Grant
    Filed: December 24, 1980
    Date of Patent: February 8, 1983
    Assignee: Nippon Electric Co., Inc.
    Inventors: Yoshiharu Suzuki, Tomokazu Kai
  • Patent number: 3937982
    Abstract: A gate circuit employing insulated gate field effect transistors of complementary types includes a logic circuit such as an inverter, a NAND or a NOR circuit which is connected to an inverter circuit. Bias means are connected to the logic circuit through a first switching means and to the inverter circuit through a second switching means. A common clock signal is used to switch both the first and second switching means.
    Type: Grant
    Filed: March 18, 1974
    Date of Patent: February 10, 1976
    Assignee: Nippon Electric Co., Inc.
    Inventor: Toshio Nakajima
  • Patent number: 3932884
    Abstract: A metal-insulator-semiconductor type integrated circuit includes a semiconductor substrate of a first conductivity type and a power supply for a back-gate bias. The substrate is connected to the power supply by a switching means. A region of a second conductivity type, which is grounded, is formed on a major surface of the substrate. The potential of the semiconductor substrate is clamped at a predetermined level by a clamping means connected between the above-mentioned region and the substrate.
    Type: Grant
    Filed: March 5, 1974
    Date of Patent: January 13, 1976
    Assignee: Nippon Electric Co., Inc.
    Inventor: Yoshishige Kitamura
  • Patent number: 3932881
    Abstract: A light source having an infrared-emitting diode and a luminescent material excitable in a step-like manner for converting the infrared radiation to visible rays comprises an optical cavity enclosing the luminescent material. A portion of the cavity wall is a dichroic filter that is substantially transparent to the visible rays but reflects the infrared radiation. The other cavity wall reflect the infrared radiation in particular.
    Type: Grant
    Filed: March 7, 1975
    Date of Patent: January 13, 1976
    Assignee: Nippon Electric Co., Inc.
    Inventors: Yoh Mita, Eiji Nagasawa