Patents Assigned to Nippon Telegraph & Telephone Public Corp.
  • Patent number: 4920401
    Abstract: In a bipolar transistor, around the border line of the surface of a base region formed on a semiconductor substrate is formed a base electrode having a constant width of less than one micron and made of polycrystalline silicon. An island shaped emitter region is formed in the base region and an emitter electrode is formed on the surface of the emitter region. The emitter electrode is electrically isolated from the base electrode by an insulating film extending between the periphery of the emitter region and the base electrode.
    Type: Grant
    Filed: March 14, 1985
    Date of Patent: April 24, 1990
    Assignee: Nippon Telegraph & Telephone Public Corp.
    Inventors: Tetsushi Sakai, Yoshizi Kobayasi, Hironori Yamauchi, Yoshinobu Arita
  • Patent number: 4734765
    Abstract: A center-to-end type information service system utilizing the public telephone networks that are fundamental communication media of nation-wide scale is disclosed in which desired information is requested from the terminal side to the center by means of a telephone set or simplified keyboard and then delivered to and received by a TV receiver. A part of the center functions is transferred together with the exchange function to a subcenter located near the terminal. Thus, the length of transmission path connecting the center to terminals becomes shorter and the cost of the whole system can be cut down. A simplified character generator is provided in the subcenter, thereby diminishing traffic of the video network.
    Type: Grant
    Filed: December 1, 1978
    Date of Patent: March 29, 1988
    Assignees: Nippon Telegraph & Telephone Public Corp., Hitachi, Ltd.
    Inventors: Shigetoshi Okada, Shoichi Matsuhashi, Yoji Shibata, Wataru Kosuge
  • Patent number: 4710975
    Abstract: A space diversity reception system which minimizes the inband amplitude and/or phase dispersion by controlling the phase shifter is described. According to the present invention, the interference waves in the two antenna outputs are combined in anti-phase condition. The phase shifter control direction is decided by the sign of the two parameters. One of them is difference between two antenna levels at the center frequency of the pass-band, and the other is the difference of the combined signal levels at the extreme edges of the pass-band. The control means comprises four detectors for detecting said levels, two subtractors for providing said level differences between them, and the control circuit for deciding the phase shifter control direction.
    Type: Grant
    Filed: April 5, 1982
    Date of Patent: December 1, 1987
    Assignee: Nippon Telegraph & Telephone Public Corp.
    Inventors: Yoshiharu Okamoto, Izumi Horikawa, Shozo Komaki
  • Patent number: 4684515
    Abstract: A single crystal is prepared by drawing up a single crystal by the Czochralski process and cooling it at a temperature not lower than 600.degree. C. in vacuo. In this manner a single crystal having a dislocation density of 1.5.times.10.sup.4 cm.sup.2 or less is prepared.
    Type: Grant
    Filed: April 24, 1985
    Date of Patent: August 4, 1987
    Assignees: Sumitomo Electric Industries, Ltd., Nippon Telegraph and Telephone Public Corp.
    Inventors: Akihisa Kawasaki, Kohji Tada, Toshihiro Kotani, Shintaro Miyazawa
  • Patent number: 4677480
    Abstract: Inter-frame encoding/decoding equipment for television signals includes inter-frame encoding equipment generating an encoded signal by encoding a difference between television signals and the output of a frame memory and inter-frame decoding equipment which receives the encoded signal sent from the inter-frame encoding device via a transmission line. The decoding equipment decodes by adding its output of the frame memory to the encoded signal. The inter-frame encoding equipment is provided with a first operation circuit which calculates remainders obtained by dividing a predetermined value, into bit groups of the output or the input of the frame memory. The inter-frame decoding equipment is provided with a second operation circuit which calculates remainders obtained by dividing, the predetermined value, into the bit groups of the output or the input of its frame memory.
    Type: Grant
    Filed: June 14, 1984
    Date of Patent: June 30, 1987
    Assignees: Nippon Telegraph & Telephone Public Corp., Fujitsu Limited, NEC Corp.
    Inventors: Hideo Kuroda, Naoki Mukawa, Makoto Hiraoka, Kiichi Matsuda, Mitsuo Nishiwaki, Shuzo Tsugane
  • Patent number: 4636280
    Abstract: An IC wafer with a uniform distribution of impurities is obtained by a pretreatment comprising annealing a semiconductor substrate at a high temperature for a long period of time and then cooling rapidly before IC processing.
    Type: Grant
    Filed: August 21, 1984
    Date of Patent: January 13, 1987
    Assignees: Sumitomo Electric Ind., Ltd., Nippon Telegraph & Telephone Public Corp.
    Inventors: Ryusuke Nakai, Toshihiko Takebe, Hajime Yamazaki
  • Patent number: 4635282
    Abstract: A gas injection type plasma X-ray source has a gas plenum for storing a discharging gas at a pressure in the range of 150 Torr and 1000 Torr, the stored gas being injected between a pair of electrodes through a gas valve. The electrodes are opposed to each other in a vacuum vessel, so that a gas jet for the production of a plasma is formed. A voltage is applied between the electrodes, so that a discharge plasma is produced between said electrodes. A linear plasma with a high temperature and a high density is produced by the pinch of the plasma due to its own magnetic field produced by the current flowing through the plasma, so that X-rays are emitted from the linear plasma. The X-ray source has a high conversion efficiency and a high discharge timing margin, and accordingly the stability and reproducibility of discharges are improved and the X-ray output is increased.
    Type: Grant
    Filed: February 7, 1985
    Date of Patent: January 6, 1987
    Assignee: Nippon Telegraph & Telephone Public Corp.
    Inventors: Ikuo Okada, Yasunao Saitoh, Hideo Yoshihara, Satoshi Nakayama
  • Patent number: 4635298
    Abstract: An interference wave detection circuit is designed so as to detect whether a beat due to the difference between two carrier wave frequencies is included or not in a received signal for a radio receiver. The detection circuit comprises circuitry for deriving a first binary signal corresponding to a level of a signal of voice frequency band obtained by demodulating the received signal and for deriving a second binary signal corresponding to a level of an envelope signal of an intermediate frequency signal from the received signal to provide a predetermined time difference between the first and second binary signals.
    Type: Grant
    Filed: December 21, 1984
    Date of Patent: January 6, 1987
    Assignees: NEC Corporation, Nippon Telegraph & Telephone Public Corp.
    Inventors: Kouzou Kage, Hiroshi Watanabe
  • Patent number: 4633225
    Abstract: A circuit for generating a desired two terminal impedance at the two terminals by coupling analog signals appearing at the two terminals into an analog to digital converter, supplying the output therefrom to a digital processing circuit, leading the outputs therefrom to a digital analog converter, and connecting the output therefrom to the two terminals to form a feedback loop. The digital processing circuit processes using a desired transfer function. An analog processing circuit is provided which receives the analog signals appearing at said two terminals as input, and which passes the component of the signal having frequencies higher than the frequencies processed in the digital processing circuit.
    Type: Grant
    Filed: March 12, 1984
    Date of Patent: December 30, 1986
    Assignee: Nippon Telegraph and Telephone Public Corp.
    Inventors: Toshio Hayashi, Youichi Maeda
  • Patent number: 4625137
    Abstract: A piezoelectric actuator using a bimorph element, comprises:a bimorph element having at least one pair of piezo elements respectively on two surfaces of a central electrode and an electrode formed on a surface of each piezo element which is opposite to a surface contacting the central electrode, the piezo elements formed on the two surfaces of the central electrode being polarized in the same direction with respect to a direction of thickness of the bimorph element;a drive input circuit arranged such that a cathode of a first directional voltage limiting circuit is connected to one electrode contacting a positively polarized surface of the piezo element whose negatively polarized surface contacts the central electrode, that an anode of a second directional voltage limiting circuit is connected to the other electrode contacting a negatively polarized surface of the piezo element whose positively polarized surface contacts the central electrode, that an anode of the first directional voltage limiting circuit an
    Type: Grant
    Filed: December 5, 1984
    Date of Patent: November 25, 1986
    Assignee: Nippon Telegraph & Telephone Public Corp.
    Inventor: Akira Tomono
  • Patent number: 4597101
    Abstract: A difference vector indicating movement of a pen between two adjacent sampled points is divided into macro movement and micro movement components. The macro and micro components are coded independently of each other so as to provide effective coding. In the case of coding the difference vector, the magnitude of the difference vector is coded in accordance with the types of zones (zone number k) and relative pel address within the zone. In order to improve the coding efficiency, a zone number difference is used instead of the zone number. Furthermore, the direction of the difference vector is expressed by a quadrant which includes this difference vector. In order to further improve the coding efficiency, a quadrant number difference is used instead of the quadrant number.
    Type: Grant
    Filed: June 28, 1983
    Date of Patent: June 24, 1986
    Assignee: Nippon Telegraph & Telephone Public Corp.
    Inventors: Tomio Kishimoto, Yuichi Sato, Takahiko Kamae
  • Patent number: 4591909
    Abstract: An interframe coding method performs predictive coding by dividing an input video signal into blocks each of which has a predetermined size, wherein a second memory for storing background data is arranged in addition to a first memory for storing coded picture data, and a block having a minimum prediction error among blocks read out from the first and second memories is detected as an optimal predictive block for every block of the input video signal, whereby predictive coding is performed by using the optimal predictive block. According to this method, after a moving element in the picture is displaced, the background area is monitored by using as predictive value data stored in the second memory. A prediction error becomes small, and coding efficiency is improved. In particular, motion compensated interframe coding is performed in addition to detection of the background area, thereby further improving the coding efficiency.
    Type: Grant
    Filed: April 20, 1984
    Date of Patent: May 27, 1986
    Assignee: Nippon Telegraph & Telephone Public Corp.
    Inventors: Hideo Kuroda, Naoki Mukawa
  • Patent number: 4587547
    Abstract: An electrode structure for use in semiconductor devices comprising: a semiconductive layer; a conductive layer disposed on one surface of the semiconductive layer; first regions which intervene between the layers and serve as passages for transmitting minority carriers from the semiconductive layer to said conductive layer; and second regions which intervene between said layers and serve as passages for conveying majority carriers between the semiconductive layer and conductive layer, the first and second regions being selectively formed on the semiconductive layer so as to be adjacent to one another.
    Type: Grant
    Filed: July 12, 1983
    Date of Patent: May 6, 1986
    Assignee: Nippon Telegraph & Telephone Public Corp.
    Inventors: Yoshihito Amemiya, Takayuki Sugeta, Yoshihiko Mizushima
  • Patent number: 4576515
    Abstract: A pipe laying apparatus having an excavator for performing excavation in the earth to form a substantially horizontally extending hole, with the excavator having connected to its trailing end a leading end of at least one underground pipe at least partially located in the horizontally extending hole, an injector for injecting a viscosity imparting liquid into the earth in which excavation is being performed by the excavator to produce viscosity imparting liquid containing soil particles. A propelling device positioned against a trailing end of the pipe and is located in a starting pit. The viscosity imparting liquid containing soil particles produced by the excavator and injector are conveyed rearwardly of the excavator past an outer periphery thereof and filled in an annular gap defined between the horizontally extending hole and the pipe while the excavator and pipe are advanced by the propelling device.
    Type: Grant
    Filed: September 19, 1983
    Date of Patent: March 18, 1986
    Assignees: Nippon Telegraph & Telephone Public Corp., Hitachi Construction Machinery Co., Ltd.
    Inventors: Keiji Morimoto, Shuichi Satoh, Yoshiyuki Iwai, Osamu Ae, Masao Suda, Kiyoshi Tsuchiya, Kojiro Ogata, Naoki Miyanagi
  • Patent number: 4571122
    Abstract: A pipe laying apparatus including an excavator propulsion unit located in a starting pit. The excavator includes an excavator body having a first axis, an excavating tool having a second axis and located at a forward end portion of the excavator body, and injection ports formed in the excavating tool for injecting a viscosity imparting liquid into soil as excavated.
    Type: Grant
    Filed: September 28, 1984
    Date of Patent: February 18, 1986
    Assignees: Nippon Telegraph & Telephone Public Corp., Hitachi Construction Machinery Co., Ltd.
    Inventors: Hiroshi Yamamoto, Shuichi Satoh, Yoshiyuki Iwai, Osamu Ae, Masao Suda, Minoru Shiozaki, Kiyoshi Tsuchiya, Manabu Nakano, Kojiro Ogata, Naoki Miyanagi, Kozo Ono, Nobuyuki Tobita
  • Patent number: 4565928
    Abstract: A photosensor comprises a first conductive layer formed on a given substrate, a one-dimensional array of a plurality of unit picture elements formed on the first conductive layer to extend in the longitudinal direction thereof, each unit picture element having a photodiode and a blocking diode connected in series with the photodiode in a relationship of reversed rectifying direction therewith, a second conductive layer for connecting together, at one end, respective unit picture elements belonging to each of at least two unit picture element groups having each at least two of adjacent unit picture elements, and a third conductive layer for connecting together, at the other end, corresponding unit picture elements in the respective groups, the set of the photodiode and blocking diode in the respective groups being made of the same semiconductor material. Dispersion of outputs from the respective unit picture elements can be minimized.
    Type: Grant
    Filed: September 22, 1982
    Date of Patent: January 21, 1986
    Assignees: Nippon Telegraph & Telephone Public Corp., Hitachi, Ltd.
    Inventors: Hideaki Yamamoto, Toru Baji, Toshihisa Tsukada, Akira Sasano
  • Patent number: 4561789
    Abstract: A thermal ink transfer printing system comprising an ink material selected from the group consisting of thermal meltable inks and thermal sublimatable inks, a container for such ink material, at least a part of one wall of the container being a filter material, a heater for heating the ink adjacent the filter in the selected pattern to be printed and activating the ink in the selective pattern to pass through the filter holes in the pattern and print such pattern on a paper adjacent the filter.
    Type: Grant
    Filed: June 22, 1984
    Date of Patent: December 31, 1985
    Assignee: Nippon Telegraph & Telephone Public Corp.
    Inventor: Takashi Saito
  • Patent number: 4557036
    Abstract: A multilayer structure comprising a Si layer/ a refractory metal oxide layer/ a refractory metal layer/ is subjected to annealing in an atmosphere of hydrogen or an inert gas mixed with hydrogen, thereby converting the multilayer structure into a multilayer structure comprising a Si layer/an inner SiO.sub.2 layer formed by internal oxidation of Si/a refractory metal layer. The inner SiO.sub.2 layer is selectively formed only on the surface of the refractory metal layer, since Si is internally oxidized from the side of the refractory metal layer. In case of gate electrode of a MISFET, the gate electrode and a contact hole for source or drain electrode are positioned in self-alignment with each other via the inner SiO.sub.2 layer. The distance between the gate electrode and the source or drain electrode is determined by the thickness of the inner SiO.sub.2 layer. A semiconductor device with a high density and a high speed is realized.
    Type: Grant
    Filed: March 25, 1983
    Date of Patent: December 10, 1985
    Assignee: Nippon Telegraph & Telephone Public Corp.
    Inventors: Hakaru Kyuragi, Hideo Oikawa
  • Patent number: 4558185
    Abstract: For the purpose of realizing a line circuit, especially a two-wire four-wire conversion circuit of a telephone exchange in the form of LSI and providing the conversion circuit with an impedance which is suitable to a side tone characteristic of the telephone set, in a line circuit composed of a hybrid circuit wherein the four-wire input line is connected to the two-wire subscriber line via a buffer amplifier and a terminating impedance and in addition the four-wire output line is connected to the output of a subtractor which subtracts an input signal of the four-wire input line passed through a filter circuit from a signal fed from the two-wire subscriber line, the terminating impedance is formed by a resistor component and in addition a feedback circuit having such a transfer characteristic that the impedance of the line circuit seen from the two-wire subscriber line side will become a specified complex impedance is installed between a line which couples the two-wire subscriber line to the subtractor and an
    Type: Grant
    Filed: December 1, 1982
    Date of Patent: December 10, 1985
    Assignees: Nippon Telegraph & Telephone Public Corp., Hitachi, Ltd.
    Inventors: Yuichi Morikawa, Kazuo Saito, Eiichi Amada, Hirotoshi Shirasu
  • Patent number: 4556800
    Abstract: An optical image sensor apparatus in which a plurality of photosensors arrayed in a primary scanning direction are scanned to produce readout signals. The plurality of photosensors are classified into a number of groups each including a predetermined number of the photosensors, wherein those photosensors occupying equivalently the same position in the different groups are combined in common. The outputs of the photosensors are sequentially and selectively scanned on a group basis to produce readout signal for each of the groups. To provide a scanning readout operation at an increased speed, an integrating circuit is provided for each of the photosensors exchangeably for each group. The outputs of all the photosensors belonging to a given one of the group are simultaneously supplied to the respective integrating circuits. The readout signal output is obtained by scanning sequentially the outputs of the integrating circuits.
    Type: Grant
    Filed: March 29, 1983
    Date of Patent: December 3, 1985
    Assignees: Nippon Telegraph & Telephone Public Corp., Hitachi, Ltd.
    Inventors: Hisao Ohta, Toru Baji, Yuji Izawa, Eizou Ebisui, Toshihisa Tsukada, Hideaki Yamamoto