Abstract: A raster display digital oscilloscope includes an analog to digital converter and a memory array for developing and storing a digital measurement signal amplitude-dependent on an acquired input signal. After processing stored digital signals are conveyed to an output circuit which includes a raster-scanned CRT and three display memory planes independently addressable by the CPU for receiving in discrete address locations the digital data. Corresponding address locations in the three planes are read in synchronism with the CRT scan to develop a display signal for application to the CRT to produce a display corresponding to the sum of the data stored in the three planes. The digital signals are automatically spread out or bunched up within the display planes to compensate for differences between the data acquisition rate and the scan rate.

Abstract: A battery powered external pacer operable in fixed-rate and demand modes includes a sense amplifier having an active notch filter system for attenuating power line interference. The filter system comprises four separate data channels each including a transmission gate synchronously driven by pacer clock pulses for frequency stability. Charges developed on capacitors in each data channel are summed by an output capacitor to avoid the need for amplifiers in each channel. A detector having two comparators for detecting positive and negative directed R-wave components derives heart pulses from the amplified signal. A pulse-driven reference supply having very low power consumption provides operating bias required by the detector. A battery monitor having a single comparator simultaneously monitors supply voltage for low and unusable voltage levels.

Abstract: A battery powered external pacer operable in fixed-rate and demand modes includes a sense amplifier having an active notch filter system for attenuating power line interference. The filter system comprises four separate data channels each including a transmission gate synchronously driven by pacer clock pulses for frequency stability. Charges developed on capacitors in each data channel are summed by an output capacitor to avoid the need for amplifiers in each channel. A detector having two comparators for detecting positive and negative directed R-wave components derives heart pulses from the amplified signal. A pulse-driven reference supply having very low power consumption provides operating bias required by the detector. A battery monitor having a single comparator simultaneously monitors supply voltage for low and unusable voltage levels.

Abstract: A carrying case for a portable cardiac pacer having physician-actuable controls on the top and front panels of its housing includes a body portion having front, rear, side and bottom panels forming an open-ended enclosure in which the pacer is received. A first hinge-mounted flap extending across the open-end of the enclosure and a second hinge-mounted flap extending across the front panel of the body portion are secured at their free ends by a snap-fastener to the front panel of the body portion so as to retain the pacer securely seated within the enclosure. each of the flap panels includes a rigid portion overlying the associated panel controls of the pacer to prevent inadvertent actuation of the controls by pressure applied externally to the carrying case.

Abstract: A connector system for use with external cardiac pacers provides an electrical connection to an associated pacer lead assembly. The system includes a pair of terminal blocks each having a bore for receiving a respective connector pin of the lead assembly. A pair of locking plates pivotally mounted in wedge-shaped recesses in the connector blocks each include an aperture through which the connector pins extend. The locking plates are spring-biased into engagement with the connector pins to prevent inadvertent removal of the pins from the bores. An operator actuated release button pivots the locking plates from engagement with the pins to enable the pins to be removed from the pacer.

Abstract: A digital waveform measuring and display oscilloscope includes a digital memory which stores one full screen of waveform data. The analog waveform is sampled, digitized and placed in memory at a user selected mode and sampling rate. A data acquisition mode control permits the user to select a continuous mode in which a live waveform is displayed moving from the right to the left on the screen. A hold mode is provided in which a preceding full screen data array is captured in the memory and displayed as a static display. A trigger mode is also provided with a variable delay, related to multiples of a full screen array, in which one full screen array is captured in relation to a trigger event and displayed as a static display. A particularly unique Periodic Hold mode creates a cyclical sequence which includes data acquisition and simultaneous display blanking which is terminated in response to a trigger signal sequence.

Abstract: A waveform measuring and analyzing instrument includes a pair of plug-in receptacles adapted to receive signal acquisition and/or processing plug-in units. Each of the receptacles is wired to a waveform data memory and to a programmed processor. The program memory for the processor includes addresses assigned to the plug-in units for addressing a memory in the plug-in units which include plug-in type and status data and may include a plug-in resident programmed memory array in which a data calculation program is stored. The processor is connected to execute the software program in the plug-in unit. The plug-in resident calculating capability significantly expands the power and capability of the instrument to analyze and process particular waveform signals. The software programmed plug-in units may be formed with a pre-programmed, read-only memory or may employ a read-write memory with means for interfacing to a still larger external storage or memory.

Abstract: A waveform measuring and display instrument includes a random access data memory bank consisting of four similar data memory parts, which can be configured or organized as one single memory section, two individual half sections, or four individual sections. Each part has an input port coupled by a multiplexer to any one of a plurality of waveform data acquisition plug-in units. During data acquisition, a controller includes a direction memory which sets the multiplexer to establish a connection of the signal inputs to the memory parts. The direction memory is written by the processor in accordance with the setting of a user operated control means for selection of the memory configuration. A CRT display unit is connected to a display port for reading the data memory. A logical address is employed by processor and display unit for any given memory section to identify the desired logical memory location starting from a logical zero reference. The data memory unit includes an offset register for each part.

Abstract: A waveform measuring and display instrument includes a digital memory unit to store digitized waveform samples for display on an X-Y plotting or monitor oscilloscope. A programmed processor includes an integrated interactive keyboard with user operated data reduction and calculating keys which actuate the processor to execute an appropriate one of a plurality of corresponding program routines in the processor memory to do the appropriate data reduction and calculation on the waveform array or related data. The memory unit and display unit include controllers with data communication provided by hardwire interfacing. The processor writes program tables for the controllers, with the memory unit shared by the data acquisition unit, the display unit and the processor. The interactive keyboard has separate keys for the four basic arithmetic functions and for compound mathematical functions, for operation on full arrays in memory and on individual numbers in special registers.

Abstract: A waveform measuring and analyzing instrument includes a digital memory unit which stores the waveform data as a fixed point number. The waveform is typically digitized as an eight or ten bit number and stored in a slightly wider array of memory locations, typically twelve bits wide. A block multiplier register and a block offset register store floating point numbers, typically thirty-two bits wide. Each register stores a number common to all data locations in memory, such that the variable or most significant character of the data is now represented over the maximum width of the memory data word. A processor applies the modifying offset and multiplier words or numbers to each memory data word whenever the data word is employed in any data reduction and whenever the data word is read for display. The combination of the two floating point modifying or scaling numbers allows use of relatively narrow storage words and the manipulation of the waveform data by the processor without significant loss of precision.

Abstract: A unique bead dispensing gun for marking pavement, the gun being actuated between open and closed positions, using fluid pressure, and the beads being delivered to and through the gun, when open, also under fluid pressure, with the gun comprising a casing or body forming in part a cylinder in which a piston operates, the lower end of the piston comprising a shut off valve to selectively prevent or permit bead discharge from a bead chamber within the gun, to which beads are supplied by a relatively large external reservoir, through a discharge opening along a novel control chute to the atmosphere, the cylinder/piston arrangement being one way (to open the gun), a return spring returning the gun to the closed position, when the fluid pressure upon the piston is removed.