Abstract: A high-throughput fluorescence imaging system with sample heating capability includes an image sensor wafer with a plurality of image sensors for fluorescence imaging a plurality of samples disposed in a respective plurality of fluidic channels on the image sensor wafer. The high-throughput fluorescence imaging system further includes a heating module, thermally coupled with the image sensor wafer, for heating the samples. A method for high-throughput assay processing includes modulating temperature of a plurality of samples disposed in a respective plurality of fluidic channels on an image sensor wafer by heating the image sensor wafer, using a heating module thermally coupled with the image sensor wafer, to control reaction dynamics in the samples; and capturing a plurality of fluorescence images of the samples, using a respective plurality of image sensors of the image sensor wafer, to detect one or more components of the plurality of samples.

Abstract: A lens-free imaging system for detecting particles in a sample deposited on image sensor includes a fluidic chamber for holding a sample and an image sensor for imaging the sample, wherein the image sensor has a light receiving surface and a plurality of photosensitive pixels disposed underneath the light receiving surface, and wherein the fluidic chamber formed at least in part by the light receiving surface. A method for detecting particles of interest in a sample deposited on an image sensor, through lens-free imaging using the image sensor, includes (ii) generating an image of the sample, deposited on a light receiving surface of the image sensor, by illuminating the sample, and (ii) detecting the particles of interest in the image.

Abstract: A method of reading out a pixel includes photogenerating charge carriers during a single integration time in photodetectors of each one of a plurality of sub-pixels included in the pixel. Each one of the plurality of sub-pixels of the pixel has a same color filter. A floating diffusion node of the pixel is reset. The floating diffusion node is sampled to generate a reset output sample signal. Charge carriers that were photogenerated in a first portion of the plurality of sub-pixels are transferred to the floating diffusion node. The floating diffusion node is sampled to generate a first output sample signal. Charge carriers that were photogenerated in a second portion of the plurality of sub-pixels are transferred to the floating diffusion node. The floating diffusion node is sampled to generate a second output sample signal.

Abstract: A liquid-crystal-on-silicon (LCOS) panel includes a wafer having bond pads thereon, a liquid crystal layer, and a conductive layer. The panel carrier for the LCOS panel includes a conductive-layer electrode for electrically connecting the conductive layer to a printed circuit assembly (PCA), address electrodes for electrically connecting the bond pads to the PCA, and a cavity for holding the LCOS panel. The cavity includes a conductive pad for electrically connecting the conductive layer to the conductive-layer electrode, and bond-pad electrodes for electrically connecting each bond pad to a respective address electrode. A method for electrically connecting an LCOS panel to a panel carrier includes a step of electrically connecting each bond pad to a respective address electrode, and a step of electrically connecting the conductive layer to the conductive pad.

Abstract: A ramp generator for use in readout circuitry includes an integrator coupled to receive a ramp generator input reference signal to generate a reference ramp signal coupled to be received by an analog to digital converter. A power supply compensation circuit that is coupled to generate the ramp generator input reference signal includes a delay circuit including a variable resistor and a filter capacitor coupled to receive a power supply signal. The variable resistor is tuned to match a delay ripple from the power supply to a bitline output. A capacitive voltage divider is coupled to the delay circuit to generate the ramp generator input reference signal. The capacitive voltage divider includes a first variable capacitor coupled to a second variable capacitor that are tuned to provide a capacitance ratio that matches a coupling ratio from the power supply to the bitline output.

Abstract: An image sensor pixel includes a semiconductor layer, a photosensitive region to accumulate photo-generated charge, a floating node, a trench, and an entrenched transfer gate. The photosensitive region and the trench are disposed within the semiconductor layer. The trench extends into the semiconductor layer between the photosensitive region and the floating node and the entrenched transfer gate is disposed within the trench to control transfer of the photo-generated charge from the photosensitive region to the floating node.

Abstract: A dual-mode image sensor with a signal-separating CFA includes a substrate including a plurality of photodiode regions and a plurality of tall spectral filters having a uniform first height and for transmitting a first electromagnetic wavelength range. Each of the tall spectral filters is disposed on the substrate and aligned with a respective photodiode region. The image sensor also includes a plurality of short spectral filters for transmitting one or more spectral bands within a second electromagnetic wavelength range. Each of the short spectral filters is disposed on the substrate and aligned with a respective photodiode region. The image sensor also includes a plurality of single-layer blocking filters for blocking the first electromagnetic wavelength range. Each single-layer blocking filter is disposed on a respective short spectral filter. Each single-layer blocking filter and its respective short spectral filter have a combined height substantially equal to the first height.

Abstract: A back side illuminated image sensor includes a pixel array including semiconductor material, and image sensor circuitry disposed on a front side of the semiconductor material to control operation of the pixel array. A first pixel includes a first doped region disposed proximate to a back side of the semiconductor material and extends into the semiconductor material a first depth to reach the image sensor circuitry. A second pixel with a second doped region is disposed proximate to the back side of the semiconductor material and extends into the semiconductor material a second depth which is less than the first depth. A third doped region is disposed between the second doped region and the image sensor circuitry on the front side of the semiconductor material. The third doped region is electrically isolated from the first doped region and the second doped region.

Abstract: A method of image sensor fabrication includes forming a layer of dielectric material, a layer of gate material, and a layer of hard mask material. The layer of dielectric material is disposed between the layer of gate material and a semiconductor material, and the layer of gate material is disposed between the layer of hard mask material and the layer of dielectric material. The method also includes etching the layer of hard mask material and layer of gate material, and etching forms a transfer gate from the layer of gate material. An encapsulation material is deposited proximate to a surface of the semiconductor material. Trenches are etched in the encapsulation material. A first trench extends through the encapsulation material and the layer of dielectric material, and a second trench extends through the encapsulation material and the layer of hard mask material.

Abstract: An apparatus includes a substrate having a surface and a plurality of solder balls arranged on the surface to form a ball grid array. A portion of the plurality of solder balls is arranged to have a pitch between adjacent solder balls. The adjacent solder balls having the pitch have a shape of a truncated sphere. At least one solder ball of the plurality of solder balls is included in a solder island on the surface having a shape that is different than the shape of the truncated sphere.

Abstract: A readout circuit for use in an image sensor includes a sense amplifier circuit coupled to a bitline to sense analog image data from a pixel cell of the image sensor. An analog to digital converter is coupled to the sense amplifier circuit to convert the analog image data to digital image data. A ramp generator circuit is coupled to generate a first ramp signal. The analog to digital converter is coupled to generate the digital image data in response to the analog image data and the first ramp signal. A first capacitive voltage divider is coupled to the ramp generator. The first capacitive voltage divider is coupled to reduce an output voltage swing of the first ramp signal coupled to be received by the analog to digital converter to reduce noise in the first ramp signal.

Abstract: A wafer-level method for fabricating a plurality of cameras includes modifying an image sensor wafer to reduce risk of the image sensor wafer warping, and bonding the image sensor wafer to a lens wafer to form a composite wafer that includes the plurality of cameras. A wafer-level method for fabricating a plurality of cameras includes bonding an image sensor wafer to a lens wafer, using a pressure sensitive adhesive, to form a composite wafer that includes the plurality of cameras.

Abstract: A microelectronics chip contains an integrated CMOS imaging sensor integrated with a LED die. Circuitry is established on the chip for a shared power arrangement.

Abstract: A projector and associated method allows adaptor-less smartphone eye imaging. The projector includes at least two line generators for projecting a pattern onto a face of a subject, and a structure for positioning the line generators relative to a camera of the smartphone. The pattern facilitates positioning of the smartphone relative to the subject's eye such that an image of the eye captured by the camera is optimal for evaluation.

Abstract: An imaging system for generating flexibly oriented electronic images includes an image sensor having a square pixel array, imaging optics for forming an optical image on at least a portion of the square pixel array, wherein the portion is within an image circle of the imaging optics and includes at least two rectangular sub-portions differing from each other in aspect ratio and/or orientation, and a processing module capable of generating an electronic image from each of the at least two rectangular sub-portions. An imaging method for generating electronic images of flexible orientation, using a square image sensor pixel array, includes forming an optical image on at least a portion of the square image sensor pixel array, selecting, according to a desired orientation, a rectangular sub-portion of the at least a portion of the square image sensor pixel array, and generating a final electronic image from the sub-portion.

Abstract: A time of flight pixel cell includes a photosensor to sense photons reflected from an object. Pixel support circuitry including charging control logic is coupled to the photosensor to detect when the photosensor senses the photons reflected from the object, and coupled to receive timing signals representative of when light pulses are emitted from a light source. A controllable current source is coupled to receive a time of flight signal form the charging control logic to provide a charge current when a light pulse emitted from the light source until the photosensor senses a respective one of the photons reflected from the object. A capacitor is coupled to receive the charge current, and a voltage on the capacitor is representative of a round trip distance to the object. A reset circuit is coupled to reset the voltage on the capacitor after being charged a plurality number of times.

Abstract: Readout circuitry to readout an array of image sensor pixels includes readout units that include a plurality of analog-to-digital converters (“ADCs”), a plurality of blocks of Static Random-Access Memory (“SRAM”), and a plurality of blocks of Dynamic Random-Access Memory (“DRAM”). The plurality ADCs is coupled to readout analog image signals two-dimensional blocks of the array of image sensor pixels. The plurality of blocks of SRAM is coupled to receive digital image signals from the ADCs. The digital image signals are representative of the analog image signal readout from the two-dimensional block of pixels. The plurality of blocks of DRAM is coupled to the blocks of SRAM. Each block of SRAM is coupled to sequentially output the digital image signals to each of the blocks of DRAM. Each of the readout units are coupled to output the digital image signals as a plurality of Input/Output (“IO”) signals.

Abstract: Implementations of a color filter array comprising a plurality of tiled minimal repeating units. Each minimal repeating unit includes at least a first set of filters comprising three or more color filters, the first set including at least one color filter with a first spectral photoresponse, at least one color filter with a second spectral photoresponse, and at least one color filter with a third spectral photoresponse; and a second set of filters comprising one or more broadband filters positioned among the color filters of the first set, wherein each of the one or more broadband filters has a fourth spectral photoresponse with a broader spectrum than any of the first, second, and third spectral photoresponses, and wherein the individual filters of the second set have a smaller area than any of the individual filters in the first set. Other implementations are disclosed and claimed.

Abstract: An image sensor apparatus is disclosed. The image sensor apparatus includes an image sensor for generating image data in a pixel array corresponding to an optical image. A processor alters the image data to embed a feature-dependent code associated with a feature of the image data in a feature-dependent location in the pixel array and generate a digital image from the altered image data.

Abstract: An image sensor includes a semiconductor layer with a plurality of photodiodes. A plurality of isolation structures is disposed in the back side of the semiconductor layer between individual photodiodes in the plurality of photodiodes. The plurality of isolation structures extend into the back side of the semiconductor layer a first depth and extend out of the back side of the semiconductor layer a first length. A plurality of light filters is disposed proximate to the back side of the semiconductor layer such that the plurality of isolation structures is disposed between individual light filters in the plurality of light filters. An antireflection coating is also disposed between the semiconductor layer and the plurality of light filters.