Abstract: A method is provided to produce training data set for training an inference engine to predict events in a data center comprising: producing probe vectors corresponding to components of a data center, each probe vector including a sequence of data elements, one of the probe vectors indicating an event at a component and at a time of the event; and producing at a master device a set of training snapshots, wherein each training snapshot includes a subsequence of data elements that corresponds to a time increment that matches or that occurred not later than the indicated time of occurrence of the event.
Type:
Grant
Filed:
June 22, 2018
Date of Patent:
March 23, 2021
Assignee:
Platina Systems Corporation
Inventors:
Frank Szu-Jen Yang, Ramanagopal V. Vogety, Sharad Mehrotra
Abstract: In one embodiment, a system includes a number of application-specific integrated circuits (ASICs). The system also includes one or more processors coupled to the ASICs including instructions executable by the processors. The processors being operable when executing the instructions to configure the plurality of ASICs to route data packets using a standard protocol; configure the ASICs to set up a tunnel, using the standard protocol, for moving data packets from one ASIC to another of the number of ASICs; and implement a software overlay to facilitate interaction between the number of ASICs through the tunnel for moving the data packets.
Type:
Grant
Filed:
October 22, 2018
Date of Patent:
September 17, 2019
Assignee:
Platina Systems Corporation
Inventors:
Frank Szu-Jen Yang, Jason Luo Pang, Eliot Michael Dresselhaus, Dino Farinacci, Andreas Demetrios Bovopoulos, Mark Tehmin Yin
Abstract: In one embodiment, a system includes a number of networking modules. Each module includes a respective voltage controller and a voltage-configuration circuit. The voltage-configuration circuit includes a number of transistors that are each coupled to a respective resistor. The system also includes one or more processors coupled to the voltage controllers including instructions executable by the processors. The processors being operable when executing the instructions to configure, for each module, an on-state or off-state of the transistors coupled to the respective resistor. The transistors coupled to the respective resistor correspond to a bit of a number of under-voltage thresholds. The processors are also operable to preset, during a module initialization, a relative ranking of under-voltage shutdown between the modules by setting the transistors. At least one of the number of networking modules has a different under-voltage threshold level relative to another one of the networking modules.