Patents Assigned to Semiconductor Energy Laboratory Co., Ltd.
  • Patent number: 10711980
    Abstract: A light-emitting device includes a strip-like high flexibility region and a strip-like low flexibility region arranged alternately in a direction. The high flexibility region includes a flexible light-emitting panel. The low flexibility region includes the light-emitting panel and a support panel having a lower flexibility than that of the light-emitting panel and overlapping with the light-emitting panel. It is preferable that the light-emitting panel include an external connection electrode and that a length in the direction of a low flexibility region A that overlaps with the external connection electrode be longer than a length in the direction of a low flexibility region B that is closest to the region A.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: July 14, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiharu Hirakata, Akio Endo
  • Patent number: 10714502
    Abstract: A semiconductor device that is suitable for miniaturization and higher density is provided. A semiconductor device includes a first transistor over a semiconductor substrate, a second transistor including an oxide semiconductor over the first transistor, and a capacitor over the second transistor. The capacitor includes a first conductor, a second conductor, and an insulator. The second conductor covers a side surface of the first conductor with an insulator provided therebetween.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: July 14, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kiyoshi Kato, Masayuki Sakakura
  • Patent number: 10714625
    Abstract: A semiconductor device capable of high speed operation is provided. Further, a highly reliable semiconductor device is provided. An oxide semiconductor having crystallinity is used for a semiconductor layer of a transistor. A channel formation region, a source region, and a drain region are formed in the semiconductor layer. The source region and the drain region are formed in such a manner that one or more of elements selected from rare gases and hydrogen are added to the semiconductor layer by an ion doping method or an ion implantation method with the use of a channel protective layer as a mask.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: July 14, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 10714700
    Abstract: A light-emitting element having high emission efficiency which includes a fluorescent material as a light-emitting substance is provided. A light-emitting element includes a pair of electrodes and an EL layer between the pair of electrodes. The EL layer includes a light-emitting layer. The light-emitting layer includes a host material and a guest material. The host material has a difference of more than 0 eV and less than or equal to 0.2 eV between a singlet excitation energy level and a triplet excitation energy level. The guest material is capable of emitting fluorescence. The triplet excitation energy level of the host material is higher than a triplet excitation energy level of the guest material.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: July 14, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Nobuharu Ohsawa, Shunsuke Hosoumi, Takahiro Ishisone
  • Patent number: 10714622
    Abstract: A liquid crystal display device is provided in which the aperture ratio can be increased in a pixel including a thin film transistor in which an oxide semiconductor is used. In the liquid crystal display device, the thin film transistor including a gate electrode, a gate insulating layer and an oxide semiconductor layer which are provided so as to overlap with the gate electrode, and a source electrode and a drain electrode which overlap part of the oxide semiconductor layer is provided between a signal line and a pixel electrode which are provided in a pixel portion. The off-current of the thin film transistor is 1×10?13 A or less. A potential can be held only by a liquid crystal capacitor, without a capacitor which is parallel to a liquid crystal element, and a capacitor connected to the pixel electrode is not formed in the pixel portion.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: July 14, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Ryo Arasawa, Hideaki Shishido, Shunpei Yamazaki
  • Patent number: 10714358
    Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: July 14, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroki Ohara
  • Patent number: 10714630
    Abstract: One of the objects is to improve display quality by reduction in malfunctions of a circuit. In a driver circuit formed using a plurality of pulse output circuits having first to third transistors and first to fourth signal lines, a first clock signal is supplied to the first signal line; a preceding stage signal is supplied to the second signal line; a second clock signal is supplied to the third signal line; an output signal is output from the fourth signal line. Duty ratios of the first clock signal and the second clock signal are different from each other. A period during which the second clock signal is changed from an L-level signal to an H-level signal after the first clock signal is changed from an H-level signal to an L-level signal is longer than a period during which the preceding stage signal is changed from an L-level signal to an H-level signal.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: July 14, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi Umezaki
  • Patent number: 10714633
    Abstract: In a transistor including an oxide semiconductor film, field-effect mobility and reliability are improved. A semiconductor device includes a gate electrode, an insulating film over the gate electrode, an oxide semiconductor film over the insulating film, and a pair of electrodes over the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, and a third oxide semiconductor film over the second oxide semiconductor film. The first oxide semiconductor film, the second oxide semiconductor film, and the third oxide semiconductor film include the same elements. The second oxide semiconductor film includes a region having a higher carrier density than the first oxide semiconductor film and the third oxide semiconductor film.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: July 14, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 10714784
    Abstract: A secondary battery suitable for a portable information terminal or a wearable device is provided. An electronic device having a novel structure which can have various forms and a secondary battery that fits the forms of the electronic device are provided. In the secondary battery, sealing is performed using a film provided with depressions or projections that ease stress on the film due to application of external force. A pattern of depressions or projections is formed on the film by pressing, e.g., embossing.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: July 14, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minoru Takahashi, Ryota Tajima
  • Patent number: 10714626
    Abstract: The oxide semiconductor film has the top and bottom surface portions each provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film. An insulating film containing a different constituent from the metal oxide film and the oxide semiconductor film is further formed in contact with a surface of the metal oxide film, which is opposite to the surface in contact with the oxide semiconductor film. The oxide semiconductor film used for the active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) by removing impurities such as hydrogen, moisture, a hydroxyl group, and hydride from the oxide semiconductor and supplying oxygen which is a major constituent of the oxide semiconductor and is simultaneously reduced in a step of removing impurities.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: July 14, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Publication number: 20200216428
    Abstract: A novel compound is provided. In addition, a light-emitting element with high emission efficiency and a long lifetime is provided. An organic compound represented by General Formula (G0), including a dibenzocarbazole skeleton and two amine skeletons. In General Formula (G0), A represents a substituted or unsubstituted dibenzocarbazole skeleton. The dibenzocarbazole skeleton and the amine skeletons may be bonded to each other through or not through an arylene group. In addition, a light-emitting element including the compound is provided.
    Type: Application
    Filed: July 30, 2018
    Publication date: July 9, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kyoko Takeda, Harue OSAKA, Satoshi SEO, Tsunenori SUZUKI, Naoaki HASHIMOTO
  • Publication number: 20200220086
    Abstract: A light-emitting element which has low driving voltage and high emission efficiency is provided. The light-emitting element includes, between a pair of electrodes, a hole-transport layer and a light-emitting layer over the hole-transport layer. The light-emitting layer contains a first organic compound having an electron-transport property, a second organic compound having a hole-transport property, and a light-emitting third organic compound converting triplet excitation energy into light emission. A combination of the first organic compound and the second organic compound forms an exciplex. The hole-transport layer contains at least a fourth organic compound whose HOMO level is lower than or equal to that of the second organic compound and a fifth organic compound whose HOMO level is higher than that of the second organic compound.
    Type: Application
    Filed: March 16, 2020
    Publication date: July 9, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromi Seo, Satoshi SEO, Satoko SHITAGAKI
  • Patent number: 10707238
    Abstract: To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including an oxide semiconductor film. The transistor includes a region where the maximum value of field-effect mobility of the transistor at a gate voltage of higher than 0 V and lower than or equal to 10 V is larger than or equal to 40 and smaller than 150; a region where the threshold voltage is higher than or equal to minus 1 V and lower than or equal to 1 V; and a region where the S value is smaller than 0.3 V/decade.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: July 7, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Kenichi Okazaki, Yukinori Shima, Shinpei Matsuda, Haruyuki Baba, Ryunosuke Honda
  • Patent number: 10706801
    Abstract: A driver circuit includes first to third transistors, a first circuit, and a second circuit. In the first transistor, a first terminal is electrically connected to a second wiring, a second terminal is electrically connected to a first wiring, and a gate is electrically connected to the second circuit and a first terminal of the third transistor. In the second transistor, a first terminal is electrically connected to the first wiring, a second terminal is electrically connected to a sixth wiring, a gate is electrically connected to the first circuit and a gate of the third transistor. A second terminal of the third transistor is electrically connected to the sixth wiring. The first circuit is electrically connected to a third wiring, a fourth wiring, a fifth wiring, and the sixth wiring. The second circuit is electrically connected to the first wiring, the second wiring, and the sixth wiring.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: July 7, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi Umezaki
  • Patent number: 10706790
    Abstract: Provided is a novel display device without deterioration of display quality or a novel display device in which flickering due to a reduced refresh rate is suppressed. The display device includes a pixel for displaying a still image at a frame frequency of less than or equal to 1 Hz. The pixel includes a liquid crystal layer. The liquid crystal layer includes a molecule whose dipole moment is greater than or equal to 0 debye and less than or equal to 3 debye. Thus, flickering due to a reduced refresh rate can be suppressed, which leads to an improvement in display quality.
    Type: Grant
    Filed: November 26, 2015
    Date of Patent: July 7, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiro Niikura, Makoto Ikenaga, Daisuke Kubota, Ryo Hatsumi
  • Patent number: 10707239
    Abstract: A wiring having excellent electrical characteristics is provided. A wiring having stable electrical characteristics is provided. A device is manufactured through the steps of forming a first insulating film over a substrate, forming a second insulating film over the first insulating film, removing part of the first insulating film and part of the second insulating film to form a first opening, forming a first conductor in the first opening and over a top surface of the second insulating film, and forming a second conductor by planarizing a surface of the first conductor so as to remove part of the first conductor.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: July 7, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Miyairi, Tomoaki Moriwaka
  • Patent number: 10707524
    Abstract: To provide a graphene compound having an insulating property and an affinity for lithium ions. To increase the molecular weight of a substituent included in a graphene compound. To provide a graphene compound including a chain group containing an ether bond or an ester bond. To provide a graphene compound including a substituent containing one or more branches. To provide a graphene compound including a substituent including at least one of an ester bond and an amide bond.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: July 7, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Masaki Yamakaji
  • Publication number: 20200211627
    Abstract: The semiconductor device includes a first memory cell, and a second memory cell thereover. The first memory cell includes first and second transistors, and a first capacitor. The second memory cell includes third and fourth transistors, and a second capacitor. A gate of the first transistor is electrically connected to one of a source and a drain of the second transistor and the first capacitor. A gate of the third transistor is electrically connected to one of a source and a drain of the fourth transistor and the second capacitor. One of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the third transistor. The second and fourth transistors include an oxide semiconductor. A channel length direction of the first and third transistors is substantially perpendicular to a channel length direction of the second and fourth transistors.
    Type: Application
    Filed: January 2, 2020
    Publication date: July 2, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomoaki Atsumi, Junpei Sugao
  • Publication number: 20200212185
    Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes an oxide semiconductor, a first insulator in contact with the oxide semiconductor, and a second insulator in contact with the first insulator. The first insulator includes excess oxygen. The second insulator has a function of trapping or fixing hydrogen. Hydrogen in the oxide semiconductor is bonded to the excess oxygen. The hydrogen bonded to the excess oxygen passes through the first insulator and is trapped or fixed in the second insulator. The excess oxygen bonded to the hydrogen remains in the first insulator as the excess oxygen.
    Type: Application
    Filed: November 25, 2019
    Publication date: July 2, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Daisuke YAMAGUCHI, Shinobu KAWAGUCHI, Yoshihiro KOMATSU, Toshikazu OHNO, Yasumasa YAMANE, Tomosato KANAGAWA
  • Publication number: 20200211425
    Abstract: A semiconductor device that can be highly integrated is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, a third insulating layer, and a first conductive layer. The third insulating layer is positioned over the semiconductor layer and includes a first opening over the semiconductor layer. The first conductive layer is positioned over the semiconductor layer, the first insulating layer is positioned between the first conductive layer and the semiconductor layer, and the second insulating layer is provided in a position that is in contact with a side surface of the first opening, the semiconductor layer, and the first insulating layer.
    Type: Application
    Filed: July 27, 2018
    Publication date: July 2, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Yukinori SHIMA, Masami JINTYOU