Patents Assigned to Semiconductor Energy Laboratory Co., Ltd.
  • Patent number: 10692891
    Abstract: To provide a display device including a flexible panel that can be handled without seriously damaging a driver circuit or a connecting portion between circuits. The display device includes a bent portion obtained by bending an element substrate. A circuit for driving the display device is provided in the bent portion and a wiring extends from the circuit, whereby the strength of a portion including the circuit for driving the display device is increased and failure of the circuit is reduced. Furthermore, the element substrate is bent in a connecting portion between an external terminal electrode and an external connecting wiring (FPC) so that the element substrate provided with the external terminal electrode fits the external connecting wiring, whereby the strength of the connecting portion is increased.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi Miyaguchi
  • Patent number: 10693448
    Abstract: Provided is a semiconductor device that can directly compare two negative potentials. The semiconductor device includes a first to a third transistor and a load and is configured to compare a first negative potential and a second negative potential. The first negative potential and the second negative potential are input to a gate of the first transistor and a gate of the second transistor, respectively. Each drain of the first transistor and the second transistor is electrically connected to the load. The third transistor serves as a current source. The first transistor and the second transistor each include a backgate. A positive potential is input to the backgates.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyoshi Kato, Yutaka Shionoiri, Tomoaki Atsumi, Takanori Matsuzaki
  • Patent number: 10692894
    Abstract: An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO3(ZnO)m, where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than 0 and less than 1. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunichi Ito, Toshinari Sasaki, Miyuki Hosoba, Junichiro Sakata
  • Patent number: 10692961
    Abstract: An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Mizuki Sato
  • Patent number: 10692869
    Abstract: A semiconductor device with a large storage capacity per unit area is provided. The disclosed semiconductor device includes a plurality of gain-cell memory cells each stacked over a substrate. Axes of channel length directions of write transistors of memory cells correspond to each other, and are substantially perpendicular to the top surface of the substrate. The semiconductor device can retain multi-level data. The channel of read transistors is columnar silicon (embedded in a hole penetrating gates of the read transistors). The channel of write transistors is columnar metal oxide (embedded in a hole penetrating the gates of the read transistors and gates, or write word lines, of the write transistors). The columnar silicon faces the gate of the read transistor with an insulating film therebetween. The columnar metal oxide faces the write word line with an insulating film, which is obtained by oxidizing the write word line, therebetween, and is electrically connected to the gate of the read transistor.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiko Takemura, Yoshiyuki Kurokawa
  • Patent number: 10693097
    Abstract: A first display element includes a first pixel electrode that reflects visible light, a liquid crystal layer, and a first common electrode that transmits visible light. A second display element includes a second pixel electrode that transmits visible light, a light-emitting layer, and a second common electrode that reflects visible light. A separation layer that reflects visible light is formed over a formation substrate, an insulating layer is formed over the separation layer, and the second display element is formed over the insulating layer. The formation substrate and a second substrate are bonded to each other. Then, the formation substrate and the separation layer are separated from each other. The exposed separation layer is processed into the first pixel electrode. The liquid crystal layer is positioned between the first common electrode and the first pixel electrode and a first substrate and the second substrate are bonded to each other.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiji Yasumoto, Masataka Sato, Hiroki Adachi, Toru Takayama, Natsuko Takase
  • Patent number: 10692994
    Abstract: To provide a semiconductor device with favorable electrical characteristics. To provide a method for manufacturing a semiconductor device with high productivity. To reduce the temperatures in a manufacturing process of a semiconductor device. An island-like oxide semiconductor layer is formed over a first insulating film; a second insulating film and a first conductive film are formed in this order, covering the oxide semiconductor layer; oxygen is supplied to the second insulating film through the first conductive film; a metal oxide film is formed over the second insulating film in an atmosphere containing oxygen; a first gate electrode is formed by processing the metal oxide film; a third insulating film is formed, covering the first gate electrode and the second insulating film; and first heat treatment is performed. The second insulating film and the third insulating film each include oxide. The highest temperature in the above steps is 340° C. or lower.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuharu Hosaka, Takahiro Iguchi, Masami Jintyou, Takashi Hamochi, Junichi Koezuka
  • Patent number: 10693093
    Abstract: Provided is a light-emitting element with high external quantum efficiency and a low drive voltage. The light-emitting element includes a light-emitting layer which contains a phosphorescent compound and a material exhibiting thermally activated delayed fluorescence between a pair of electrodes, wherein a peak of a fluorescence spectrum and/or a peak of a phosphorescence spectrum of the material exhibiting thermally activated delayed fluorescence overlap(s) with a lowest-energy-side absorption band in an absorption spectrum of the phosphorescent compound, and wherein the phosphorescent compound exhibits phosphorescence in the light-emitting layer by voltage application between the pair of electrodes.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Satoshi Seo
  • Patent number: 10693010
    Abstract: A change in electrical characteristics of a semiconductor device including an interlayer insulating film over a transistor including an oxide semiconductor as a semiconductor film is suppressed. The structure includes a first insulating film which includes a void portion in a step region formed by a source electrode and a drain electrode over the semiconductor film and contains silicon oxide as a component, and a second insulating film containing silicon nitride, which is provided in contact with the first insulating film to cover the void portion in the first insulating film. The structure can prevent the void portion generated in the first insulating film from expanding outward.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Toshinari Sasaki, Katsuaki Tochibayashi, Shunpei Yamazaki
  • Patent number: 10693094
    Abstract: To provide a light-emitting element with high emission efficiency and low driving voltage. The light-emitting element includes a guest material and a host material. A HOMO level of the guest material is higher than a HOMO level of the host material. An energy difference between the LUMO level and a HOMO level of the guest material is larger than an energy difference between the LUMO level and a HOMO level of the host material. The guest material has a function of converting triplet excitation energy into light emission. An energy difference between the LUMO level of the host material and the HOMO level of the guest material is larger than or equal to energy of light emission of the guest material.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Takeyoshi Watabe, Satomi Mitsumori
  • Patent number: 10693012
    Abstract: A semiconductor device with low parasitic capacitance is provided. The semiconductor device includes a first oxide insulator, an oxide semiconductor, a second oxide insulator, a gate insulating layer, a gate electrode layer, source and drain electrode layers and an insulating layer. The oxide semiconductor includes first to fifth regions. The first region overlaps with the source electrode layer. The second region overlaps with the drain electrode layer. The third region overlaps with the gate electrode layer. The fourth region is between the first region and the third region. The fifth region is between the second region and the third region. The fourth region and the fifth region each contain an element N (N is hydrogen, nitrogen, helium, neon, argon, krypton, or xenon). A top surface of the insulating layer is positioned at a lower level than top surfaces of the source and drain electrode layers.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshinobu Asami
  • Patent number: 10693095
    Abstract: A light-emitting element having high emission efficiency which includes a fluorescent material as a light-emitting substance is provided. A light-emitting element includes a pair of electrodes and an EL layer between the pair of electrodes. The EL layer includes a light-emitting layer. The light-emitting layer includes a host material and a guest material. The host material has a difference of more than 0 eV and less than or equal to 0.2 eV between a singlet excitation energy level and a triplet excitation energy level. The guest material is capable of emitting fluorescence. The triplet excitation energy level of the host material is higher than a triplet excitation energy level of the guest material.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Nobuharu Ohsawa, Shunsuke Hosoumi, Takahiro Ishisone
  • Patent number: 10693014
    Abstract: A change in electrical characteristics is inhibited and reliability is improved in a semiconductor device using a transistor including an oxide semiconductor. One embodiment of a semiconductor device including a transistor includes a gate electrode, first and second insulating films over the gate electrode, an oxide semiconductor film over the second insulating film, and source and drain electrodes electrically connected to the oxide semiconductor film. A third insulating film is provided over the transistor and a fourth insulating film is provided over the third insulating film. The third insulating film includes oxygen. The fourth insulating film includes nitrogen. The amount of oxygen released from the third insulating film is 1×1019/cm3 or more by thermal desorption spectroscopy, which is estimated as oxygen molecules. The amount of oxygen molecules released from the fourth insulating film is less than 1×1019/cm3.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Masami Jintyou, Daisuke Kurosaki
  • Patent number: 10693085
    Abstract: A light-emitting element with a light-emitting substance comprising an organometallic complex. The organometallic complex having a structure represented by General Formula (G0). In the formula, X represents a substituted or unsubstituted six-membered heteroaromatic ring including two or more nitrogen atoms inclusive of a nitrogen atom that is a coordinating atom. Further, R1 and R2 each represent an alkyl group having 1 to 6 carbon atoms.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideko Inoue, Tomoya Yamaguchi, Hiromi Seo, Satoshi Seo, Kunihiko Suzuki, Miki Kanamoto
  • Publication number: 20200194310
    Abstract: A semiconductor device which has favorable electrical characteristics and can be highly integrated is provided. The semiconductor device includes a first insulator; an oxide over the first insulator; a second insulator over the oxide; a first conductor over the second insulator; a third insulator in contact with a top surface of the first insulator, a side surface of the oxide, a top surface of the oxide, a side surface of the second insulator, and a side surface of the first conductor; and a fourth insulator over the third insulator. The third insulator includes an opening exposing the first insulator, and the fourth insulator is in contact with the first insulator through the opening.
    Type: Application
    Filed: August 28, 2018
    Publication date: June 18, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Toshihiko TAKEUCHI, Tsutomu MURAKAWA, Hiroki KOMAGATA, Daisuke MATSUBAYASHI, Noritaka ISHIHARA, Yusuke NONAKA
  • Publication number: 20200194692
    Abstract: A light-emitting element having high external quantum efficiency is provided. A light-emitting element having a long lifetime is provided. A light-emitting element is provided which includes a light-emitting layer containing a phosphorescent compound, a first organic compound, and a second organic compound between a pair of electrodes, in which a combination of the first organic compound and the second organic compound forms an exciplex (excited complex). The light-emitting element transfers energy by utilizing an overlap between the emission spectrum of the exciplex and the absorption spectrum of the phosphorescent compound and thus has high energy transfer efficiency. Therefore, a light-emitting element having high external quantum efficiency can be obtained.
    Type: Application
    Filed: February 21, 2020
    Publication date: June 18, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Satoko SHITAGAKI, Satoshi SEO, Nobuharu OHSAWA, Hideko INOUE, Kunihiko SUZUKI
  • Publication number: 20200194527
    Abstract: To provide a display device capable of performing image processing. Each pixel is provided with a memory circuit in which desired correction data is retained. The correction data is generated by calculation in an external device and written to each pixel. The correction data is added to image data by capacitive coupling and supplied to a display element. Thus, the display element can display a corrected image. Through the correction, image upconversion can be performed, or image quality decreased because of variations in pixel transistor characteristics can be corrected.
    Type: Application
    Filed: August 10, 2018
    Publication date: June 18, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Susumu KAWASHIMA, Koji KUSUNOKI, Kazunori WATANABE, Kouhei TOYOTAKA, Naoto KUSUMOTO, Shunpei YAMAZAKI
  • Publication number: 20200194465
    Abstract: The display device includes: a flexible display panel including a display portion in which scanning lines and signal lines cross each other; a supporting portion for supporting an end portion of the flexible display panel; a signal line driver circuit for outputting a signal to the signal line, which is provided for the supporting portion; and a scanning line driver circuit for outputting a signal to the scanning line, which is provided for a flexible surface of the display panel in a direction which is perpendicular or substantially perpendicular to the supporting portion.
    Type: Application
    Filed: February 26, 2020
    Publication date: June 18, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satohiro OKAMOTO, Yasuyuki ARAI, Ikuko KAWAMATA, Atsushi MIYAGUCHI, Yoshitaka MORIYA
  • Publication number: 20200193928
    Abstract: A display device capable of performing image processing is provided. A memory node is provided in each pixel included in the display device. An intended correction data is held in the memory node. The correction data is calculated by an external device and written into each pixel. The correction data is added to image data by capacitive coupling, and the resulting data is supplied to a display element. Thus, the display element can display a corrected image. The correction enables image upconversion, for example.
    Type: Application
    Filed: September 4, 2018
    Publication date: June 18, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Susumu KAWASHIMA, Koji KUSUNOKI, Kazunori WATANABE, Kouhei TOYOTAKA, Naoto KUSUMOTO, Shunpei YAMAZAKI
  • Patent number: 10685984
    Abstract: A semiconductor device is described, which includes a first transistor, a second transistor, and a capacitor. The second transistor and the capacitor are provided over the first transistor so as to overlap with a gate of the first transistor. A semiconductor layer of the second transistor and a dielectric layer of the capacitor are directly connected to the gate of the first transistor. The second transistor is a vertical transistor, where its channel direction is perpendicular to an upper surface of a semiconductor layer of the first transistor.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: June 16, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kensuke Yoshizumi