Patents Assigned to Semiconductor Physics Laboratory Co., Ltd.
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Patent number: 11561254Abstract: Methods of characterizing electrical properties of a semiconductor layer structure on a wafer with topside semiconductor layers on an insulating or semi-insulating substrate, the semiconductor layer structure including a high electron mobility transistor (HEMT) heterostructure with a two-dimensional electron gas (2DEG) at a heterointerface between the semiconductor layers of the heterostructure. The methods include: (a) physically contacting the topside of the wafer within a narrow border zone at an edge of the wafer with a flexible metal cantilever electrode of a contacting device, wherein the flexible metal cantilever electrode contacts one or more of the semiconductor layers exposed at the narrow border zone so that the flexible metal cantilever electrode is in electrical contact with the 2DEG; and (b) applying corona charge bias and measuring a surface voltage of the semiconductor layers using a non-contact probe while maintaining the electrical contact with the 2DEG.Type: GrantFiled: May 27, 2021Date of Patent: January 24, 2023Assignee: SEMILAB Semiconductor Physics Laboratory Co., Ltd.Inventors: Marshall Wilson, Bret Schrayer, Alexandre Savtchouk, Dmitriy Marinskiy, Jacek Lagowski
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Patent number: 10969370Abstract: An example method of characterizing a semiconductor sample includes measuring an initial value, Vin, of a surface potential at a region of a surface of the semiconductor sample, biasing the semiconductor sample to have a target surface potential value (V0) of 2V or less, and depositing a monitored amount of corona charge (?Q1) on the region of the surface after adjusting the surface potential to the target value. The method also includes measuring a first value, V1, of the surface potential at the region after depositing the corona charge, determining the first change of surface potential (?V1=V1?V0), and determining the first capacitance value C1=?Q1/?V1, and characterizing the semiconductor sample based on V0, V1, ?V1, ?Q1 and C1.Type: GrantFiled: June 5, 2015Date of Patent: April 6, 2021Assignee: SEMILAB Semiconductor Physics Laboratory Co., Ltd.Inventors: Jacek Lagowski, Marshall Wilson, Alexandre Savtchouk, Carlos Almeida, Csaba Buday
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Patent number: 10883941Abstract: In an example implementation, a method includes illuminating a wafer with excitation light having a wavelength and intensity sufficient to induce photoluminescence in the wafer. The method also includes detecting photoluminescence emitted from a portion of the wafer in response to the illumination, and detecting excitation light reflected from the portion of the wafer. The method also includes comparing the photoluminescence emitted from the portion of the wafer and the excitation light reflected from the portion of the wafer, and identifying one or more defects in the wafer based on the comparison.Type: GrantFiled: June 20, 2018Date of Patent: January 5, 2021Assignee: SEMILAB Semiconductor Physics Laboratory Co., Ltd.Inventors: Zoltan Tamas Kiss, Laszlo Dudas, Zsolt Kovacs, Imre Lajtos, Gyorgy Nadudvari, Nicolas Laurent, Lubomir L. Jastrzebski
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Patent number: 10763179Abstract: An example semiconductor wafer includes a semiconductor layer, a dielectric layer disposed on the semiconductor layer, and a layer of the metal disposed on the dielectric layer. An example method of determining an effective work function of a metal on the semiconductor wafer includes determining a surface barrier voltage of the semiconductor wafer, and determining a metal effective work function of the semiconductor wafer based, at least in part, on the surface barrier voltage.Type: GrantFiled: February 26, 2016Date of Patent: September 1, 2020Assignee: SEMILAB Semiconductor Physics Laboratory Co., Ltd.Inventors: Dmitriy Marinskiy, Thye Chong Loy, Jacek Lagowski, Sung-Li Wang, Lin-Jung Wu, Shyh-Shin Ferng, Yi-Hung Lin, Sheng-Shin Lin
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Patent number: 10209190Abstract: A method that includes: illuminating a wafer with excitation light having a wavelength and intensity sufficient to induce photoluminescence in the wafer; filtering photoluminescence emitted from a portion of the wafer in response to the illumination; directing the filtered photoluminescence onto a detector to image the portion of the wafer on the detector with a spatial resolution of 1 ?m×1 ?m or smaller; and identifying one or more crystallographic defects in the wafer based on the detected filtered photoluminescence.Type: GrantFiled: June 21, 2018Date of Patent: February 19, 2019Assignee: SEMILAB Semiconductor Physics Laboratory Co., Ltd.Inventors: Zoltan Tamas Kiss, Laszlo Dudas, Gyorgy Nadudvari, Nicolas Laurent, Lubomir L. Jastrzebski
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Patent number: 10018565Abstract: A method that includes: illuminating a wafer with excitation light having a wavelength and intensity sufficient to induce photoluminescence in the wafer; filtering photoluminescence emitted from a portion of the wafer in response to the illumination; directing the filtered photoluminescence onto a detector to image the portion of the wafer on the detector with a spatial resolution of 1 ?m×1 ?m or smaller; and identifying one or more crystallographic defects in the wafer based on the detected filtered photoluminescence.Type: GrantFiled: October 9, 2015Date of Patent: July 10, 2018Assignee: SEMILAB Semiconductor Physics Laboratory Co., Ltd.Inventors: Zoltan Tamas Kiss, Laszlo Dudas, Gyorgy Nadudvari, Nicolas Laurent, Lubomir L. Jastrzebski
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Patent number: 10012593Abstract: In an example implementation, a method includes illuminating a wafer with excitation light having a wavelength and intensity sufficient to induce photoluminescence in the wafer. The method also includes detecting photoluminescence emitted from a portion of the wafer in response to the illumination, and detecting excitation light reflected from the portion of the wafer. The method also includes comparing the photoluminescence emitted from the portion of the wafer and the excitation light reflected from the portion of the wafer, and identifying one or more defects in the wafer based on the comparison.Type: GrantFiled: May 4, 2015Date of Patent: July 3, 2018Assignee: SEMILAB Semiconductor Physics Laboratory Co., Ltd.Inventors: Zoltan Tamas Kiss, Laszlo Dudas, Zsolt Kovacs, Imre Lajtos, Gyorgy Nadudvari, Nicolas Laurent, Lubomir L. Jastrzebski
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Patent number: 8912799Abstract: A method is described for accurate measuring of the excess carrier lifetime on a semiconductor sample from the carrier decay after termination of the excitation pulse imposed on the steady-state carrier excitation. The method includes determining a quality of decay parameter using progressing segments in each carrier decay; establishing an accurate lifetime measurement multiparameter domain for experimental variables whereby the quality of decay parameter falls within prescribed limits from the ideal exponential decay value of QD=1; and determining an excess carrier lifetime for the semiconductor sample based on experimental measurement conditions within the domain and the quality of decay value within the predetermined range indicative of an accurate excess carrier lifetime measurement.Type: GrantFiled: November 9, 2012Date of Patent: December 16, 2014Assignee: Semiconductor Physics Laboratory Co., Ltd.Inventors: Jacek Lagowski, Marshall D. Wilson
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Publication number: 20130169283Abstract: A method is described for accurate measuring of the excess carrier lifetime on a semiconductor sample from the carrier decay after termination of the excitation pulse imposed on the steady-state carrier excitation. The method includes determining a quality of decay parameter using progressing segments in each carrier decay; establishing an accurate lifetime measurement multiparameter domain for experimental variables whereby the quality of decay parameter falls within prescribed limits from the ideal exponential decay value of QD=1; and determining an excess carrier lifetime for the semiconductor sample based on experimental measurement conditions within the domain and the quality of decay value within the predetermined range indicative of an accurate excess carrier lifetime measurement.Type: ApplicationFiled: November 9, 2012Publication date: July 4, 2013Applicant: Semiconductor Physics Laboratory Co., Ltd.Inventor: Semilab ZRT