Patents Assigned to SGS Semiconductor Corporation
  • Patent number: 4755750
    Abstract: The invention comprises a system of alignment key patterns, within the scribe lines of a semiconductor chip, which allow more accurate placement of wafer probes, and more accurate location of fuses for the purposes of blowing selected ones of those fuses by means of laser energy.
    Type: Grant
    Filed: April 2, 1987
    Date of Patent: July 5, 1988
    Assignee: SGS Semiconductor Corporation
    Inventor: Horst Leuschner
  • Patent number: 4724471
    Abstract: An improved input network for MOS semiconductor devices intended to increase the device resistance to electrostatic discharge in the input circuit. A series of features comprising round and concentric round contacts and buried contacts, a layer of polycrystalline silicon disposed between the metal input contact and the N+ diffusion layer and enlarged metal contact areas are employed to reduce the tendency toward breakdown by reducing hot spots in the device.
    Type: Grant
    Filed: December 29, 1986
    Date of Patent: February 9, 1988
    Assignee: SGS Semiconductor Corporation
    Inventor: Horst Leuschner
  • Patent number: 4717845
    Abstract: A TTL compatible CMOS input circuit comprising a series of current mirror circuits arranged so that the input transistor is used to discharge the capacitive load and one of a pair of transistors in one of the current mirror circuits provides charging current for the load. Only one of the charging and discharging transistor switches in "on" at any one time, thus reducing circuit power consumption and reducing required device sizes. The input switching level is also independent of the supply voltage.
    Type: Grant
    Filed: January 2, 1987
    Date of Patent: January 5, 1988
    Assignee: SGS Semiconductor Corporation
    Inventor: William C. Dunn
  • Patent number: 4628214
    Abstract: The invention comprises an improved back bias generator for an integrated circuit wherein a transistor circuit first acts as an isolation device during the charging phase of a charge pump capacitor and acts as a coupling device during a discharge phase of the capacitor, thus providing a higher back bias voltage than is available from prior art circuits and wherein the charge pump capacitor is oriented in the circuit so that its source/drain terminal cannot conduct to the substrate by way of the parasitic diode therebetween.
    Type: Grant
    Filed: May 22, 1985
    Date of Patent: December 9, 1986
    Assignee: SGS Semiconductor Corporation
    Inventor: Horst Leuschner
  • Patent number: 4628247
    Abstract: The invention comprises an improved on-chip voltage regulator which provides output voltages significantly lower than the band gap voltage of silicon with supply voltages as low as 1.0 volt, with the output voltage fully temperature compensated.
    Type: Grant
    Filed: August 5, 1985
    Date of Patent: December 9, 1986
    Assignee: SGS Semiconductor Corporation
    Inventor: Nazzareno Rossetti