Patents Assigned to Sharp
  • Publication number: 20090175650
    Abstract: An electrophotographic photoreceptor comprising a layered-type photosensitive layer in which a charge generating layer containing a charge generating material and a charge transporting layer containing a charge transporting material are stacked, formed on a conductive supporting member made of a conductive material, wherein the electrophotographic photoreceptor has high sensitive characteristics to a semiconductor laser beam having a wavelength ranging from 380 to 500 nm; the charge transporting layer of the layered-type photosensitive layer contains as the charge transporting material, a triarylamine dimer compound represented by the general formula (1): wherein Ar1 and Ar2 may be the same or different, and represent an unsubstituted or substituted arylene group or heterocyclic derivative bivalent group, Ar3 and Ar4 may be the same or different, and represent an unsubstituted or substituted aryl group or heterocyclic group, R1 and R2 may be the same or different, and represent an alkyl group, m and n rep
    Type: Application
    Filed: December 5, 2008
    Publication date: July 9, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Akiko KIHARA, Kotaro Fukushima, Takatsugu Obata, Akihiro Kondoh
  • Publication number: 20090177428
    Abstract: The method of measuring a peripheral tilt angle in accordance with the present invention, to address the problems, is a method of measuring a peripheral tilt angle on an inspection object having surface mounds, the method including: the step A of projecting light onto the inspection object; the step B of sensing distribution of light reflected off the inspection object; the step C of obtaining a feature point of the distribution of the reflected light from result of the sensing of the distribution of the reflected light; and the step D of obtaining a peripheral tilt angle which is a tilt angle near a periphery of each of the surface mounds based on an angle of projection of the light in step A to a position which, on the inspection object, corresponds to the feature point and an angle of sensing of the reflected light in step B off a position which, on the inspection object, corresponds to the feature point.
    Type: Application
    Filed: June 12, 2007
    Publication date: July 9, 2009
    Applicant: Sharp Kabushiki Kaisha
    Inventor: Tamon Iden
  • Publication number: 20090175504
    Abstract: An image processing system capable of checking whether or not an image is correctly read, and of easily correcting an image which is not correctly read is provided. The image processing system includes: an image processing apparatus A which has a reading section 105, an image processing section 110 for performing image processing of a read image, and a metadata generating section 106 for generating metadata for an abnormal image; a storage server B which stores the image and the metadata outputted from the image processing apparatus A; and an image checking apparatus C which checks whether or not the metadata is included in the image acquired from the storage server B, and which when the metadata is included in the acquired image, displays the image on the basis of the metadata, and corrects the acquired image. The image processing system is capable of correcting only the abnormal image, without re-reading all the images.
    Type: Application
    Filed: May 9, 2008
    Publication date: July 9, 2009
    Applicant: Sharp Kabushiki Kaisha
    Inventor: Shohji Koarai
  • Publication number: 20090174839
    Abstract: In a liquid crystal display device of a transflective type, the viewing angle characteristics of displaying in the transmission mode can be sufficiently improved, and yet bright displaying in the reflection mode can be realized. The liquid crystal display device is a liquid crystal display device of a transflective type including a liquid crystal display panel and an illuminator. The liquid crystal display panel includes a first light diffusing element disposed at the viewer's side of a liquid crystal layer and a second light diffusing element disposed at the opposite side of the liquid crystal layer from the viewer.
    Type: Application
    Filed: April 12, 2007
    Publication date: July 9, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Kenji Misono, Shinichi Miyazaki
  • Patent number: 7557848
    Abstract: A solid-state image pickup device includes a detection diode for detecting a transfer charge and a switched capacitor amplifier whose input section is connected to the detection diode. The switched capacitor amplifier includes an inverting amplifier, a reset transistor and a feedback capacitor which are connected between input and output sections of the inverting amplifier. Thus, the solid-state image pickup device satisfies the requirements for both improvement in charge-voltage conversion efficiency and reduction in generated noises.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: July 7, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Eiji Koyama
  • Patent number: 7557416
    Abstract: In a transistor adapted to suppress characteristic degradation resulting from fluorine contained in a deposited film, the concentration of fluorine contained in a gate insulating film (3) is reduced to 1.0×1020 atoms/cm3 or less. As a result, the transistor can provide excellent reliability even when it is continuously driven for a long period of time at a relatively high temperature.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: July 7, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihide Tsubata, Toshinori Sugihara
  • Patent number: 7558099
    Abstract: The method of controlling a resistance of a variable resistive element comprises a forming step for shifting the variable resistive element from an initial state after the production to a variable resistance state capable of a stable mono-polar switching action where a variable resistive characteristic of the variable resistive element is turned to a program resistive characteristic by applying a program voltage pulse to the variable resistive element for first pulse application time and to an erase resistive characteristic by applying an erase voltage pulse equal in polarity to the program voltage pulse to the variable resistive element for second pulse application time longer than the first pulse application time, wherein one or more forming voltage pulses equal in polarity to the program voltage pulse is applied to the variable resistive element for third pulse application time longer than the second pulse application time.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: July 7, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hidenori Morimoto
  • Patent number: 7557029
    Abstract: A semiconductor device includes a conductive layer with a plurality of wires, and a bonding pad formed in a region overlapping with the plurality of wires of the conductive layer. One of the wires is connected to the bonding pad, and an insulating protective film is formed between the remaining wires and the bonding pad. The protective film is bridged between adjacent wires at least in a region overlapping with the bonding pad. As a result, the protective film on the wires forms a bridge structure, which is effective in preventing cracking at a lower portion of the protective film. Further, a void formed underneath the bridged portion serves as an air spring to prevent damage to the structural elements, such as the wires, formed under the protective film. Further, because a polyimide film, which serves as a shock absorber, is not required, working efficiency can be improved and chip cost can be reduced.
    Type: Grant
    Filed: October 17, 2005
    Date of Patent: July 7, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masafumi Akagawa, Masahiro Horio
  • Patent number: 7558307
    Abstract: In a semiconductor laser device, a p-side electrode (114) of a multilayer structure put in contact with the surface of a ridge portion (130) of a second conductive type semiconductor layer group (p-AlGaAs first upper cladding layer (108), p-AlGaAs second upper cladding layer (109), p-GaAs etching stop layer (110), p-AlGaAs third upper cladding layer (111), p-GaAs contact layer (112) and p+-GaAs contact layer (113)) is formed. The p-side electrode (114) has one or a plurality of high refractive index layers and low refractive index layers formed successively from the side put in contact with the surface of the semiconductor layer group of the second conductive type. The high refractive index layers have a refractive index of not lower than 2.5 with respect to the wavelength band of the emission laser light and a total thickness of not greater than 75 nm, while the low refractive index layers have a refractive index of not higher than 1.0 with respect to the wavelength band of the emission laser light.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: July 7, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Katsuhiko Kishimoto, Yoshie Fujishiro
  • Patent number: 7558306
    Abstract: In a semiconductor laser device of the invention, a ridge portion 150 forms a waveguide, and guided light goes along the ridge portion 150. A tail of the guided layer is present also at first side portions 151, while second side portions 152 are regions which the tail of the guided light does not reach. Meanwhile, scattered light generated from the ridge portion 150 goes through the first side portions 15, spreading into the second side portions 152. In the second side portions 152, a light absorption layer 127 serving as a light absorber is formed on the first upper clad layer 108, where the scattered light is absorbed. As a result of the absorption of scattered light in the second side portions 152, ripples of radiation light are reduced. Also since the light absorption layer 127 is in electrical contact with a p-side ohmic electrode 125, the problem of charge accumulation to the light absorption layer 127 can be avoided.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: July 7, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masanori Watanabe, Shinichi Kawato, Mitsuhiro Matsumoto
  • Patent number: 7558091
    Abstract: The switching power supply apparatus includes detection means for detecting that leak current of an input smoothing capacitor becomes a predetermined value or more and first auxiliary switching means connected in series with respect to the input smoothing capacitor. The first auxiliary switching means becomes an on state during a normal operation, whereas the first auxiliary switching means goes into an off state in a case where the detection means detects that the leak current of the input smoothing capacitor becomes a predetermined value or more.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: July 7, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Haruo Nishi
  • Patent number: 7556977
    Abstract: There are provided preflow periods t11, t12 in which group III element materials TMG, TMA and TMI are not supplied from a group III element material container to a reaction region (reactor), while a group V element material PH3 and an Mg dopant material are supplied from a group V element material container and a dopant material container to the reaction region (reactor) after an Mg-undoped group III-V compound semiconductor layer is crystallinically grown and before an Mg-doped group III-V compound semiconductor layer is crystallinically grown. According to the semiconductor manufacturing method, an Mg doping profile can be accurately controlled.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: July 7, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kei Yamamoto, Junichi Nakamura
  • Patent number: 7557871
    Abstract: First rubbing is performed on an entire surface of an alignment film (22) provided on a substrate (21), and then a mask part (51a) for masking a first region and a region of an alignment mark is formed on the alignment film (22) by using a resist layer (51). After performing second rubbing on the alignment film (22) through the mask part (51a), the mask part (51a) is removed, and a liquid crystal layer (23) is formed on the alignment film (22). In this way, the alignment mark is formed as a region having an optical function different from an optical function of a region surrounding the alignment mark. Thus, it is possible to produce a substrate (21) having an alignment mark formed without increasing processing steps at such a position as to contact the liquid crystal layer (23).
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: July 7, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihiro Matsumoto, Akihiko Kojima
  • Patent number: 7556912
    Abstract: An optical information recording medium of the present invention includes a thin film section made up of one or more thin film, the thin film section being provided on a substrate. Thin films of the thin film section include a single optical multiple interference film which incites optical multiple interference in a thin film section, the optical multiple interference being incited by the change of complex refractive index in accordance with the intensity of incident light. Also, the composition and thickness of the optical multiple interference film are arranged in such a manner as to cause the wavelength distribution of the reflectance of the thin film section at room temperatures to have a minimum value within wavelengths of ±80 nm of the incident light for reproduction. With this, the design freedom of the optical multiple interference film which realizes super-resolution reproduction with a reduced effective reproduction spot is significantly increased.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: July 7, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Go Mori, Masaki Yamamoto, Hideharu Tajima, Nobuyuki Takamori
  • Patent number: 7556415
    Abstract: A side light type backlight includes a light source including a plurality of LEDs, and a light guide plate. One of the end surfaces of the light guide plate is a light incidence surface at which a plurality of R-LEDs, a plurality of G-LEDs and a plurality of B-LEDs are arranged. LEDs satisfy the relationship of: a distribution range of light emitted from G-LEDs<a distribution range of light emitted from R-LEDs, or a distribution range of light emitted from G-LEDs<a distribution range of light emitted from B-LEDs. Also, LEDs are electrically connected to each other.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: July 7, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tetsuya Hamada, Toshihiro Suzuki
  • Patent number: 7557937
    Abstract: A system and method are provided for interpreting time stamp information from a digital camera. The method comprises: opening a first format interpreter; receiving image information from a digital camera in a first format selected from the group including joint photographic experts group (JPEG) and tagged image file format (TIFF) formats, with a corresponding time stamp information; displaying the images with corresponding time stamps for editing; selecting the “print time stamp” option; selecting a time stamp layout for a corresponding image; converting the image information and time stamp information to bitmap information; and, supplying the edited images with corresponding time stamps for printing. Some aspects of the method further comprise: selecting miscellaneous superposition overlays for corresponding images.
    Type: Grant
    Filed: March 4, 2002
    Date of Patent: July 7, 2009
    Assignee: Sharp Laboratories of America, Inc.
    Inventor: Jiaping Song
  • Publication number: 20090167781
    Abstract: An information processing apparatus capable of storing more data to a remaining region of a storage portion excluding a frame buffer region while displaying an image by an image display portion, is provided. When free space of a system storage portion has become below a predetermined value, a reduction in number of gray scales of the image results in a reduction in a data amount of image data stored in a display data storage region and a reduction in capacity of the display data storage region. This makes it possible to reduce the data amount of image data and increase the free space of the system storage portion while keeping the size of the image displayed by an image display portion.
    Type: Application
    Filed: October 11, 2006
    Publication date: July 2, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Kenichiro Nakata
  • Publication number: 20090167645
    Abstract: A power source line 1 and a scanning line 3 are arranged on different wiring layers so as to be orthogonal to each other. In the wiring layer on which the scanning line 3 is arranged, a bypass line 111 is arranged on at least a part of a portion obtained by removing a planar position of the scanning line 3 from a planar position of the power source line 1. Contacts 121 and 122 establish electric connection between the power source line 1 and the bypass line 111. As described above, the bypass line 111 is connected to the power source line 1 in parallel, leading to decrease in resistance of the power source line 1 and suppression of unevenness in brightness at a display screen. Moreover, an additional manufacturing step for providing the bypass line 111 is unnecessary. Further, an aperture ratio is not reduced even when the bypass line 111 is provided. When the bypass line 111 is made wider than the power source line 1, a pixel circuit can be prevented from operating erroneously due to external light.
    Type: Application
    Filed: February 1, 2007
    Publication date: July 2, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Noritaka Kishi
  • Publication number: 20090167739
    Abstract: One embodiment of the present invention is to prevent deterioration of display quality from occurring in a display device provided with an active matrix substrate even when a larger size or a higher resolution is employed and a drive frequency is increased. In an active matrix substrate of a liquid crystal display device, a discharge control signal line is disposed so as to be arranged along each gate line and discharge TFTs are provided for each source line in numbers equal to the number of the gate lines. The gate terminal, source terminal, and drain terminal of the discharge TFT are connected to the discharge control signal line, the storage capacitance line, and its adjacent source line, respectively. Each storage capacitance line is provided with the common potential Vcom. Each discharge control signal line is provided with a signal which turns on the discharge TFT for a predetermined period of every one horizontal period.
    Type: Application
    Filed: March 27, 2007
    Publication date: July 2, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshihide Tsubata
  • Publication number: 20090168406
    Abstract: Light-emitting elements are divided into chromaticity groups on the basis of their chromaticity. In a planar light source, light-emitting elements selected from two of the chromaticity groups are alternately provided in a longitudinal direction and in a transverse direction, respectively. The two chromaticity groups are substantially equally away from a target chromaticity in directions reverse to each other. Further, pairs of two of the light-emitting elements belonging to the two chromaticity groups which are separated from each other, are provided so that distances d2 at which two of the light-emitting elements in each of the pairs are provided are less than distances d1 at which the pairs are provided.
    Type: Application
    Filed: December 16, 2008
    Publication date: July 2, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Osamu KAWASAKI, Taiji Morimoto, Masanori Watanabe