Patents Assigned to Shin-Etsu Handotai Co., Ltd.
  • Publication number: 20250059675
    Abstract: A nitride semiconductor substrate includes: a silicon single crystal substrate having a front surface and a back surface; and a nitride semiconductor thin film formed on the front surface, in which the silicon single crystal substrate has a carbon diffusion layer that has been implanted with carbon and has a carbon concentration higher than a bulk portion of the silicon single crystal substrate in at least the front surface and the back surface, and the carbon concentration in the carbon diffusion layer is 5E+16 atoms/cm3 or more. The nitride semiconductor substrate can suppress warp failure caused by plastic deformation during epitaxial growth and device processes when the nitride semiconductor substrate is produced using a silicon single crystal substrate.
    Type: Application
    Filed: December 12, 2022
    Publication date: February 20, 2025
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Keitaro TSUCHIYA, Weifeng QU
  • Publication number: 20250059676
    Abstract: The present invention is a nitride semiconductor substrate including a group III-nitride semiconductor layer containing GaN and formed on a support substrate, in which the support substrate includes: a composite substrate having laminated layers, the laminated layers including a polycrystalline ceramic core, a first adhesive layer bonded entirely to the polycrystalline ceramic core, a second adhesive layer laminated entirely to the first adhesive layer, and a barrier layer bonded entirely to the second adhesive layer; and a group III-nitride semiconductor seed crystal layer containing at least GaN, bonded on the composite substrate via a planarization layer, in which the group III-nitride semiconductor layer is formed on the group III-nitride semiconductor seed crystal layer, and crystallinity on a (0002) growth surface of GaN in the group III-nitride semiconductor seed crystal layer is 550 arcsec or less in XRD half-value width.
    Type: Application
    Filed: November 8, 2022
    Publication date: February 20, 2025
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Ippei KUBONO, Kazunori HAGIMOTO, Daichi KITAZUME
  • Publication number: 20250063786
    Abstract: The present invention is a nitride semiconductor substrate including a nitride semiconductor thin film formed on a substrate, in which the nitride semiconductor thin film includes a stress-relaxing layer formed on the substrate and a carbon-doped GaN layer formed on the stress-relaxing layer, and the GaN layer includes high carbon concentration layers and a low carbon concentration layer, the low carbon concentration layer being sandwiched between the high carbon concentration layers and having a lower carbon concentration by 75% or more than the high carbon concentration layers. This provides the nitride semiconductor substrate with improved crystallinity without increasing a thickness of a GaN epitaxial layer and without using other special materials, and a method for producing the substrate.
    Type: Application
    Filed: December 5, 2022
    Publication date: February 20, 2025
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Ippei KUBONO, Kazunori HAGIMOTO
  • Patent number: 12227872
    Abstract: A single-crystal pulling apparatus includes: a pulling furnace having a heater and crucible; and a magnetic field generation device having superconducting coils, the device having four of the superconducting coils, two of the superconducting coils are in each of two regions divided by a cross section that includes an X axis being a direction of magnetic force lines at the central axis in the horizontal plane including all the coil axes of the four superconducting coils, and includes the pulling furnace central axis having line symmetry about the cross section, the four superconducting coils are all arranged so that the coil axes have an angle of more than ?30° and less than 30° relative to a Y axis, the direction of the magnetic force lines thereof have line symmetry about the cross section, and in each of the regions, the two superconducting coils generate magnetic force lines in opposite directions.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: February 18, 2025
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kiyotaka Takano, Wataru Yajima, Kosei Sugawara, Hiroyuki Kamada, Tomohiko Ohta
  • Publication number: 20250031421
    Abstract: A substrate for an electronic device, including a nitride semiconductor film formed on a bonded substrate of a silicon single crystal, in which the bonded substrate is a substrate including a first silicon single-crystal substrate having a crystal plane orientation of {111} and a second silicon single-crystal substrate having a crystal plane orientation of {100} being bonded via an oxide film, the first substrate is formed with a notch in <110> direction, the second substrate is formed with a notch in <011> direction or <001> direction, the <110> direction of the first substrate and the <011> direction of the second substrate are bonded in an angular range of ?15° to 15°, and the nitride semiconductor film is formed on a surface of the first substrate of the bonded substrate.
    Type: Application
    Filed: October 31, 2022
    Publication date: January 23, 2025
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kazunori HAGIMOTO, Kosei SUGAWARA, Ippei KUBONO, Hiroji AGA, Toru ISHIZUKA
  • Publication number: 20250015225
    Abstract: A method for manufacturing a bonded semiconductor wafer includes growing an etching stop layer on a starting substrate, producing an epitaxial wafer by growing an epitaxial layer having a compound semiconductor functional layer on the etching stop layer, forming an isolation groove to form a device in the compound semiconductor functional layer by a dry etching method, performing roughening etching on a surface of the epitaxial layer, being the opposite side of the starting substrate, making surface roughness thereon to have 0.1 ?m or more in an arithmetic average roughness Ra, bonding a visible light-transmissive substrate to the surface opposite to the starting substrate of the epitaxial wafer via visible light-transmissive thermosetting bonding material, and removing the starting substrate. This method for manufacturing the bonded semiconductor wafer in which a micro-LED can be made with a suppressed generation of luminance decrease when a micro-LED device is produced on the substrate.
    Type: Application
    Filed: November 30, 2022
    Publication date: January 9, 2025
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventor: Junya ISHIZAKI
  • Publication number: 20250015085
    Abstract: The present invention is a nitride semiconductor substrate for high frequency, which includes an SOI substrate in which a single crystal silicon thin film is formed on a single crystal silicon substrate via a silicon oxide layer, and a nitride semiconductor layer including a GaN layer formed on the SOI substrate; in which the single crystal silicon thin film contains nitrogen at a concentration of 2.0×1014 atoms/cm3 or more and has a resistivity of 100 ?cm or more, the single crystal silicon substrate has a resistivity of 50 m?cm or less, and the silicon oxide layer has a thickness of 10 to 400 nm. This can provide the nitride semiconductor substrate in which the nitride semiconductor layer is grown on the SOI substrate for manufacturing devices for high frequency, and the nitride semiconductor substrate with suppressed plastic deformation.
    Type: Application
    Filed: October 17, 2022
    Publication date: January 9, 2025
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kazunori HAGIMOTO, Ippei KUBONO
  • Patent number: 12186939
    Abstract: A method for slicing an ingot, including: forming a wire row by a wire spirally wound between a plurality of wire guides and configured to travel in an axial direction; and pressing an ingot against the wire row while supplying a contact portion between the ingot and the wire with a slurry from a nozzle, thereby slicing the ingot into wafers. The slurry is supplied such that slurries whose temperatures are separately controlled by two or more lines of heat exchangers are respectively supplied from two or more sections of the nozzle which are orthogonal to a travelling direction of the wire row. Consequently, a wire saw and a method for slicing an ingot are provided which enable separate control of wafer shapes depending on ingot-slicing positions.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: January 7, 2025
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventor: Keiichi Kanbayashi
  • Patent number: 12188761
    Abstract: A method for measuring a wafer profile while holding a periphery of the wafer by using a flatness measurement system, including first and second optical systems respectively located on first and second main surfaces of the wafer, the method including: a first step measuring each surface variation on the main surfaces using one of the optical systems; a second step of calculating a periphery-holding deformation amount, caused by holding the wafer periphery, through utilization of the surface variations measured with the optical system; and a third step of calculating an actual wafer Warp value through subtraction of the periphery-holding deformation amount from a Warp value outputted by the flatness measurement system. This provides a method for measuring a wafer profile to enable measurement of actual wafer Warp value by using a flatness measurement system, and to successfully acquire a Warp value with little influence from a difference among systems.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: January 7, 2025
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventor: Masato Ohnishi
  • Patent number: 12188153
    Abstract: A single-crystal pulling apparatus including: a pulling furnace having a central axis; and a magnetic field generation device arranged around the pulling furnace and having superconducting coils, the apparatus applying a horizontal magnetic field to the molten semiconductor raw material, two coil axes in the two pairs of the superconducting coils are included in a single horizontal plane, and when a direction of lines of magnetic force at the central axis of the pulling furnace in the horizontal plane is determined as an X axis, a center angle ? having the X axis between the two coil axes is 100 degrees or more and 120 degrees or less. This makes it possible to reduce the height of the coils, to raise the magnetic field center close to the melt surface of the semiconductor raw material, and to obtain a single crystal having a lower oxygen concentration than conventional single crystals.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: January 7, 2025
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kiyotaka Takano, Kosei Sugawara, Hiroyuki Kamada, Takahide Onai, Tomohiko Ohta
  • Patent number: 12183641
    Abstract: A method for evaluating electrical characteristics of a semiconductor substrate, the method including the steps of: forming a p-n junction on a surface of the semiconductor substrate; mounting the semiconductor substrate on a wafer chuck provided with an equipment for performing light irradiation on the surface of the semiconductor substrate and an equipment for measuring the quantity of the light for the irradiation; performing light irradiation on the surface of the semiconductor substrate for a predetermined time; and measuring an amount of carriers generated after the light irradiation of the p-n junction at least after turning off the light irradiation. This provides a method for evaluating a semiconductor substrate that allows the same evaluation in a wafer state as when an actual solid-state image sensor has been formed without producing a device by using process equipment when evaluating characteristics corresponding to residual image characteristics of a wafer.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: December 31, 2024
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventor: Tsuyoshi Ohtsuki
  • Publication number: 20240429046
    Abstract: The present invention provides a method for producing a heteroepitaxial wafer heteroepitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate, the method including: with using a reduced-pressure CVD apparatus, a first step of removing a native oxide film on a surface of the single crystal silicon substrate by hydrogen baking; a second step of nucleation of SiC on the single crystal silicon substrate on a condition of pressure of 13332 Pa or lower and a temperature of 300° C. or higher and 950° C. or lower and a third step of forming the 3C-SiC single crystal film by growing a SiC single crystal on condition of pressure of 13332 Pa or lower and a temperature of 800° C. or higher and lower than 1200° C., while supplying a source gas containing carbon and silicon into the reduced-pressure CVD apparatus.
    Type: Application
    Filed: June 30, 2022
    Publication date: December 26, 2024
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Toshiki MATSUBARA, Atsushi SUZUKI, Tatsuo ABE, Keitaro TSUCHIYA, Yukari SUZUKI, Tsuyoshi OHTSUKI
  • Publication number: 20240413264
    Abstract: The present disclosure provides a method for separating a bonded wafer, including separating a support from a bonded wafer.
    Type: Application
    Filed: September 27, 2022
    Publication date: December 12, 2024
    Applicants: Shin-Etsu Handotai Co., Ltd., SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Junya Ishizaki, Masato Yamada, Yoshinori Ogawa
  • Publication number: 20240404826
    Abstract: A method for manufacturing a nitride semiconductor wafer in which a nitride semiconductor film is formed on a silicon single-crystal substrate includes: a step of forming the nitride semiconductor film on the silicon single-crystal substrate; and a step of irradiating the silicon single-crystal substrate with electron beam so that the silicon single-crystal substrate has a higher resistivity than a resistivity before the irradiation, wherein a substrate doped with nitrogen at a concentration of 5×1014 atoms/cm3 or more and 5×1016 atoms/cm3 or less is used as the silicon single-crystal substrate. A method for manufacturing a nitride semiconductor wafer having a nitride semiconductor film grown on a silicon single-crystal substrate, wherein the method makes it possible that a silicon single-crystal substrate having been irradiated with electron beam and thereby has an increased resistivity is prevented from recovering and having a lower resistivity during the epitaxial growth or other thermal treatment steps.
    Type: Application
    Filed: September 2, 2022
    Publication date: December 5, 2024
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventor: Kazunori HAGIMOTO
  • Publication number: 20240395563
    Abstract: An epitaxial wafer production method, including forming a gettering epitaxial film containing silicon and carbon on a silicon substrate under reduced pressure using a reduced pressure CVD apparatus, and forming a silicon epitaxial film on the gettering epitaxial film. This provides a low-cost, low-contamination carbon-containing epitaxial wafer, and a method for producing such an epitaxial wafer.
    Type: Application
    Filed: September 27, 2022
    Publication date: November 28, 2024
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Atsushi SUZUKI, Yasushi MIZUSAWA, Toshiki MATSUBARA, Tatsuo ABE, Tsuyoshi OHTSUKI
  • Publication number: 20240387170
    Abstract: A nitride semiconductor substrate including a growth substrate, and a nitride semiconductor thin film formed on the growth substrate, in which the nitride semiconductor thin film includes an AlN layer formed on the growth substrate and a nitride semiconductor layer formed on the AlN layer, and an average concentration of Y (Yttrium) in the AlN layer is 1E15 atoms/cm3 or higher and 5E19 atoms/cm3 or lower. Thereby, a nitride semiconductor substrate is capable of improving the surface morphology of an AlN layer, thereby suppressing the generation of pits on the surface of a nitride semiconductor epitaxial wafer, and a method manufactures the nitride semiconductor substrate.
    Type: Application
    Filed: August 22, 2022
    Publication date: November 21, 2024
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Ippei KUBONO, Kazunori HAGIMOTO
  • Publication number: 20240379352
    Abstract: A nitride semiconductor substrate in which a nitride semiconductor thin film is formed on a substrate for film formation made of single-crystal silicon, in which a silicon nitride film is formed on an peripheral portion of the substrate for film formation, an AlN film is formed on the substrate for film formation and on the silicon nitride film, and the nitride semiconductor thin film is formed on the AlN film. A nitride semiconductor substrate without a reaction mark or a polycrystal growth portion on an edge portion when an AlN layer is epitaxially grown on a silicon substrate, and a GaN or AlGaN layers are epitaxially grown on top of that; and a method for manufacturing the nitride semiconductor substrate.
    Type: Application
    Filed: August 9, 2022
    Publication date: November 14, 2024
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventor: Kazunori HAGIMOTO
  • Publication number: 20240379899
    Abstract: A bonded wafer, wherein an epitaxial wafer having a heterojunction structure, in which a material with a different thermal expansion coefficient is epitaxially laminated on a growth substrate, and a support substrate are bonded via a bonding material, wherein the bonding material has an average thickness of 0.01 ?m or more and 0.6 ?m or less. As a result, provided is a bonded wafer and a method for producing the same that improves the film thickness distribution of the bonding material caused by the warpage of the semiconductor epitaxial substrate and the warpage that changes with thermal changes when the warped semiconductor epitaxial substrate and the support substrate are bonded together using the bonding material.
    Type: Application
    Filed: June 20, 2022
    Publication date: November 14, 2024
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Junya ISHIZAKI, Tomohiro AKIYAMA, Shogo FURUYA
  • Publication number: 20240371641
    Abstract: The present invention relates to a method of manufacturing a compound semiconductor bonded substrate comprising the steps of: (1) epitaxially growing a compound semiconductor functional layer on a starting substrate; (2) temporarily bonding a support substrate to the epitaxially grown surface to form a first compound semiconductor bonded substrate; (3) removing the starting substrate from the first compound semiconductor bonded substrate to form a second compound semiconductor bonded substrate; (4) finally bonding a surface of the second compound semiconductor bonded substrate from which the starting substrate has been removed to a permanent substrate to form a third compound semiconductor bonded substrate; (5) removing the support substrate from the third compound semiconductor bonded substrate to form a fourth compound semiconductor bonded substrate, wherein the temporary bonding is performed via a thermosetting resin, the thermosetting resin being maintained in a softened state without being cured, and
    Type: Application
    Filed: March 17, 2022
    Publication date: November 7, 2024
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Junya ISHIZAKI, Tomohiro AKIYAMA
  • Publication number: 20240371628
    Abstract: A method for manufacturing a nitride semiconductor substrate in which a nitride semiconductor is formed on a substrate for film formation includes: (1) subjecting a substrate for film formation made of single-crystal silicon to heat treatment under a nitrogen atmosphere to form a silicon nitride film on the substrate for film formation, (2) growing an AlN film on the silicon nitride film, and (3) growing a GaN film, an AlGaN film, or both on the AlN film. A method for manufacturing a nitride semiconductor substrate can prevent diffusion of Al to the high-resistance single-crystal silicon substrate when the AlN layer is epitaxially grown on the high-resistance single-crystal silicon substrate, and the GaN or the AlGaN layer is epitaxially grown on top of that.
    Type: Application
    Filed: August 18, 2022
    Publication date: November 7, 2024
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kazunori HAGIMOTO, Ippei KUBONO