Patents Assigned to Shinko Electric Industries Co., LTD
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Patent number: 11837530Abstract: A lead frame includes: a support portion having a through-hole formed in as end; a lead; and a heat dissipation plate welded with the support portion in one opening of the through-hole. A manufacturing method of a lead frame includes: shaping a frame member from a metal plate, the frame member including a support portion having a through-hole formed in an end, and a lead; and welding a heat dissipation plate with the support portion in one opening of the through hole.Type: GrantFiled: November 29, 2021Date of Patent: December 5, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Jun Izuoka, Koichi Ishida, Mitsuori Yoshimi
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Patent number: 11832388Abstract: A wiring board includes an insulating base having a first principal surface, and a second principal surface opposite to the first principal surface, a first through hole formed in the base, a first conductive layer provided inside the first through hole, a first insulating layer covering the first principal surface, a second insulating layer covering the second principal surface, a second through hole formed in the first insulating layer, the base, and the second insulating layer, a magnetic material provided inside the second through hole, a third through hole famed in the magnetic material, and a second conductive layer provided inside the third through hole.Type: GrantFiled: April 15, 2022Date of Patent: November 28, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Masahiro Murakami
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Patent number: 11828538Abstract: A loop type heat pipe includes: an evaporator that vaporizes working fluids; a first condenser and a second condenser that liquefy the working fluids respectively; a first liquid pipe that includes a first flow channel and connects the evaporator and the first condenser to each other; a second liquid pipe that includes a second flow channel and connects the evaporator and the second condenser to each other; and a first vapor pipe that connects the evaporator and the first condenser to each other; and a second vapor pipe that connects the evaporator and the second condenser to each other. The evaporator includes: a third flow channel connected to the first liquid pipe and the first vapor pipe; a fourth flow channel connected to the second condenser and the second vapor pipe; and a partition wall that partitions the third flow channel and the fourth flow channel from each other.Type: GrantFiled: June 17, 2021Date of Patent: November 28, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yoshihiro Machida
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Patent number: 11830752Abstract: There is provided a substrate fixing device. The substrate fixing device includes: a base plate; and an electrostatic chuck that is fixed to the base plate and configured to adsorb a subject by electrostatic force. The electrostatic chuck includes: an adsorptive layer configured to adsorb and retain the subject; and a heater layer that is provided between the adsorptive layer and the base plate and configured to heat the subject retrained by the adsorptive layer. A thickness of the heater layer is uniform over an entire area of the heater layer.Type: GrantFiled: June 14, 2021Date of Patent: November 28, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Yoichi Harayama, Keiichi Takemoto
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Patent number: 11823993Abstract: A wiring substrate includes a first insulation layer, a first through hole extending through the first insulation layer in a thickness-wise direction, a first via wiring formed in the first through hole, a second insulation layer formed on an upper surface of the first insulation layer, a first recess formed in a lower surface of the second insulation layer and connected to the first through hole, an opening formed in an upper surface of the second insulation layer and connected to the first recess, a second recess formed in an upper surface of the first via wiring and connected to the first recess, a second via wiring formed in the opening, the first recess, and the second recess, and a first wiring pattern formed on the upper surface of the second insulation layer and electrically connected to the first via wiring by the second via wiring.Type: GrantFiled: October 22, 2021Date of Patent: November 21, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTDInventor: Masataka Muroga
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Publication number: 20230367065Abstract: A silicon photonics element including an optical element that has no self-luminescent capability, a first optical waveguide that connects the optical element to an outside of the silicon photonics element, a ring resonator optically connected to the first optical waveguide and located proximate to the first optical waveguide, and a second optical waveguide optically connected to the ring resonator and located proximate to the ring resonator. The first optical waveguide includes a first end surface connected to the outside of the silicon photonics element, and the second optical waveguide includes a second end surface connected to the outside of the silicon photonics element.Type: ApplicationFiled: May 5, 2023Publication date: November 16, 2023Applicant: Shinko Electric Industries Co., LTD.Inventor: Yuji Furuta
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Patent number: 11817422Abstract: A semiconductor device includes a first semiconductor element, a first connection terminal formed on a lower surface of the first semiconductor element, a second semiconductor element mounted on the lower surface of the first semiconductor element so that the second semiconductor element partially overlaps the first semiconductor element in plan view, a second connection terminal formed on a lower surface of the second semiconductor element, and a wiring substrate on which the first and second semiconductor elements are mounted. The wiring substrate includes first and second connection pads electrically connected to the first connection terminal and the second connection terminal, respectively. The semiconductor device further includes a third connection terminal formed on the first connection pad and electrically connected to the first connection terminal. One of the first connection terminal and the third connection terminal is a metal post, and the other is a solder ball.Type: GrantFiled: November 9, 2019Date of Patent: November 14, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yohei Igarashi
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Patent number: 11818847Abstract: A resist layer forming method includes a process of laminating a resist layer on a base at a first pressure using a laminate roller having a first temperature, and a process of pressing the resist layer against the base at a second pressure higher than the first pressure using a metal plate having a second temperature lower than the first temperature.Type: GrantFiled: April 5, 2022Date of Patent: November 14, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Yoshihisa Kanbe, Toyoaki Sakai
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Patent number: 11817381Abstract: A semiconductor device includes a lower substrate, a semiconductor element mounted on an upper surface of the lower substrate, an upper substrate disposed on an upper surface of the semiconductor element, an encapsulation resin disposed between the lower substrate and the upper substrate and encapsulating the semiconductor element, a wiring layer disposed on an upper surface of the upper substrate, and a covering resin formed from a material having a coefficient of thermal expansion similar to a coefficient of thermal expansion of the encapsulation resin. The covering resin is disposed on the upper surface of the upper substrate and covers a side surface of the wiring layer.Type: GrantFiled: July 15, 2021Date of Patent: November 14, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kei Murayama, Mitsuhiro Aizawa, Amane Kaneko, Kiyoshi Oi
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Patent number: 11808521Abstract: A loop heat pipe includes two outermost metal layers, an intermediate metal layer provided between the outermost metal layers, an evaporator, a condenser, and liquid and vapor pipes connecting the evaporator and the condenser and forming a loop shaped passage. The intermediate metal layer includes a pair of walls forming a part of a pipe wall of the evaporator, the condenser, the liquid pipe, and the vapor pipe, a porous body provided between the pair of walls, and a strut penetrating the porous body and bonding the outermost metal layers, and one or more metal layers. Each of the one or more metal layers includes a first part forming a part of the pair of walls, a second part connected to the first part and forming a part of the porous body, and a third part connected to the second part and forming a part of the strut.Type: GrantFiled: March 5, 2021Date of Patent: November 7, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yoshihiro Machida
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Patent number: 11810840Abstract: A semiconductor device includes a lead frame having a first principal surface which includes a recess, and a second principal surface opposite to the first principal surface, a relay board, disposed in the recess, and having a third principal surface, and a fourth principal surface opposite to the third principal surface, wherein the fourth principal surface opposes a bottom surface of the recess, a first semiconductor chip disposed on the third principal surface, a first conductive material connecting the lead frame and the relay board, and a second conductive material connecting the relay board and the first semiconductor chip. A distance between the second principal surface and the third principal surface is less than or equal to a distance between the second principal surface and the first principal surface.Type: GrantFiled: August 10, 2021Date of Patent: November 7, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Toshiyuki Okabe
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Patent number: 11811009Abstract: A light emitting device includes a ceramic substrate, a light emitting element, and a wiring. The light emitting element is formed on an upper surface of the ceramic substrate. The wiring is arranged inside the ceramic substrate and is electrically and directly connected to the light emitting element. The light emitting element includes a structure in which a lower semiconductor layer, an active layer, and an upper semiconductor layer are sequentially stacked.Type: GrantFiled: June 9, 2021Date of Patent: November 7, 2023Assignee: Shinko Electric Industries Co., LTD.Inventors: Michio Horiuchi, Yuichiro Shimizu, Masaya Tsuno
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Patent number: 11802740Abstract: A loop heat pipe includes: an evaporator configured to vaporize a working fluid; a condenser configured to condense the working fluid; a liquid pipe that connects the evaporator and the condenser to each other; and a vapor pipe that connects the evaporator and the condenser to each other. Each of the evaporator, the condenser, the liquid pipe and the vapor pipe includes: a pair of outer metal layers; an intermediate metal layer provided between the pair of outer metal layers; and a flow channel defined by the pair of outer metal layers and the intermediate metal layer. At least one of the evaporator, the condenser, the liquid pipe and the vapor pipe further includes a reinforcing member that is built in at least one of the pair of outer metal layers and that is higher in rigidity than the pair of outer metal layers.Type: GrantFiled: August 23, 2021Date of Patent: October 31, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yoshihiro Machida
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Patent number: 11792927Abstract: An interconnect substrate includes a core layer including a resin layer mainly composed of a non-photosensitive thermosetting resin and a through interconnect extending through the resin layer, the core layer having no reinforcement member contained therein, a first interconnect structure laminated on a first side of the core layer and including first interconnect layers and first insulating layers mainly composed of a photosensitive resin, and a second interconnect structure laminated on a second side of the core layer and including second interconnect layers and a single second insulating layer mainly composed of a photosensitive resin, wherein the first interconnect layers are electrically connected to the second interconnect layers via the through interconnect, wherein the core layer has greater rigidity than the first interconnect structure and the second interconnect structure, and wherein a thickness of the second interconnect structure is greater than a thickness of each of the first insulating layer.Type: GrantFiled: August 4, 2022Date of Patent: October 17, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Rie Mizutani, Noriyoshi Shimizu, Hiroshi Taneda, Masaya Takizawa, Yoshiki Akiyama
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Patent number: 11791250Abstract: A lead frame includes: a lead portion; a plating layer that is provided on a connected area of the lead portion, the connected area being an area connected with a semiconductor element; a recessed portion that is provided around the plating layer on the lead portion; and an oxidized layer that is provided on a surface including the recessed portion of the lead portion.Type: GrantFiled: October 30, 2019Date of Patent: October 17, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Shintaro Hayashi
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Patent number: 11792920Abstract: A circuit board includes an interconnect and an insulating layer that covers the interconnect. The interconnect includes a first interconnect that is formed to serve as a recognition mark of which planar shape is a predetermined shape. The insulating layer has a through-hole of which planar shape is variant and that penetrates the insulating layer in a thickness direction of the insulating layer such that an entire upper surface of the first interconnect is exposed. The through-hole includes a first through-hole of which planar shape is a predetermined shape and that penetrates the insulating layer in the thickness direction such that the entire upper surface of the first interconnect is exposed and a second through-hole that serves as part of an inner wall surface of the first through-hole and that penetrates the insulating layer in the thickness direction.Type: GrantFiled: May 10, 2022Date of Patent: October 17, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Shinichiro Sekijima
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Patent number: 11789505Abstract: A loop heat pipe includes an evaporator configured to vaporize a working fluid, a condenser configured to liquefy the working fluid, a liquid line connecting the evaporator and the condenser, and a vapor line connecting the evaporator and the condenser. The evaporator, the condenser, the liquid line, and the vapor line are formed by stacking a lowermost metallic layer, an uppermost metallic layer, and an intermediate layer set formed of a plurality of metallic layers, which is provided between the uppermost metallic layer and the lowermost metallic layer. The evaporator, the liquid line, the condenser, and the vapor line form a loop-shaped flow path through which the working fluid flows, and a portion of the flow path is formed in the intermediate layer set.Type: GrantFiled: April 15, 2021Date of Patent: October 17, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Takeshi Shioga, Yoshihiro Mizuno
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Patent number: 11774181Abstract: A loop heat pipe includes: an evaporator; a condenser; a liquid pipe that connects the evaporator and the condenser; a vapor pipe that connects the evaporator and the condenser to form a loop flow path; and a porous body provided inside of a part of the evaporator, the condenser, the liquid pipe, and the vapor pipe. The evaporator, the condenser, the liquid pipe, and the vapor pipe have a first main surface. At least one recessed portion is formed in at least part of a first area, located directly above or below the flow path, of the first main surface, and is not formed in a second area, located directly above or directly below a pipe wall of the flow path, of the first main surface and is not formed in a third area, located directly above or below the porous body, of the first main surface.Type: GrantFiled: September 30, 2020Date of Patent: October 3, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yoshihiro Machida
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Patent number: 11776903Abstract: A semiconductor apparatus includes an interconnect substrate having a first major surface, a first semiconductor device having a second major surface and mounted to the interconnect substrate, the second major surface opposing the first major surface, a second semiconductor device having a third major surface and a fourth major surface and mounted to the first semiconductor device, the third major surface opposing the first major surface, the fourth major surface opposing the second major surface, a through hole formed through the interconnect substrate at a position overlapping the second semiconductor device in a plan view taken in a thickness direction of the interconnect substrate, and a heatsink member disposed in contact with part of the third major surface, at least a part of the first major surface, and at least a part of a sidewall surface of the through hole.Type: GrantFiled: August 17, 2021Date of Patent: October 3, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Kazuhiro Yoshida
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Patent number: 11774182Abstract: A loop heat pipe includes a pair of outermost metal layers, an intermediate metal layer provided between the pair of outermost metal layers, an evaporator, a condenser, a liquid pipe and a vapor pipe connecting the evaporator and the condenser and forming a loop shaped passage. The intermediate metal layer includes a pair of walls forming a part of a pipe wall of the evaporator, the condenser, the liquid pipe, and the vapor pipe, and a porous body provided between the pair of walls. The intermediate metal layer includes a first surface opposing one of the pair of outermost metal layers, and a plurality of first cavities, and a first projection between mutually adjacent first cavities, respectively famed at the first surface between the pair of walls. A first gap is famed between the first projection and the one of the pair of outermost metal layers.Type: GrantFiled: April 1, 2021Date of Patent: October 3, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yoshihiro Machida