Abstract: An apparatus includes a digitally controlled oscillator (DCO), which includes an inductor coupled in series with a first capacitor. The DCO further includes a second capacitor coupled in parallel with the series-coupled inductor and first capacitor, a first inverter coupled in parallel with the second capacitor, and a second inverter coupled back-to-back to the first inverter. The DCO further includes a digital-to-analog-converter (DAC) to vary a capacitance of the first capacitor.

Abstract: An apparatus includes a radio-frequency (RF) receiver for receiving RF signals. The RF receiver includes a plurality of modulation signal detectors (MSDs) to generate a plurality of detection signals when a plurality of RF signals modulated using a plurality of modulation schemes are detected. The RF receiver further includes a controller to cause reception of the plurality of RF signals in response to the plurality of detection signals.

Abstract: A bias circuit for a low noise amplifier of a front end interface of a radio frequency communication device including a bias generator providing a bias voltage on a bias node for the low noise amplifier, a first resistive device coupled between the bias node and an input of the low noise amplifier, a first switch coupled in parallel with the first resistive device, and mode control circuitry receiving a mode signal indicative of a mode change, in which the mode control circuitry, in response to a mode change, momentarily activates the first switch to bypass the first resistive device and momentarily increases current capacity of the bias generator. The mode control circuitry may also momentarily activate a second switch to bypass a second resistive device of the bias circuit. The mode control circuitry may increase a sink current of the bias generator in response to the mode change.

Abstract: Systems and methods are provided to simultaneously determine both angle of arrival (AoA) and angle of departure (AoD) of a signal transmitted between two or more radio frequency (RF)-enabled wireless devices (e.g., such as BLE modules). The disclosed systems and methods may be so implemented in one embodiment to determine AoD even in the case where the transmitting wireless device is at the same time operating in a departure (or AoD) transmitting mode by transmitting a RF signal from multiple antenna elements of at least one switched antenna array using a given switching pattern or sequence implemented by an array switch.

Abstract: An apparatus for measuring a current being supplied to a load includes a first pass transistor to couple a first sense resistance to the load when the first pass transistor is enabled and a second pass transistor to couple a second sense resistance to the load when the second pass transistor is enabled. An error amplifier determines a difference between a voltage being supplied to the load and a reference voltage and to supplies an error amplifier output signal according to the difference. A switch couples the error amplifier output signal to a gate of the first pass transistor or to a gate of the second pass transistor. Control logic controls the switch according to a value of the current being supplied to the load. The voltage being supplied to the load is controlled using the error amplifier output signal that is selectively coupled to the gate of the first pass transistor or the gate of the second pass transistor.

Abstract: In one embodiment, an apparatus includes: a sensor to sense real world information; a digitizer coupled to the sensor to digitize the real world information into digitized information; a signal processor coupled to the digitizer to process the digitized information into a spectrogram; a neural engine coupled to the signal processor, the neural engine comprising an autoencoder to compress the spectrogram into a compressed spectrogram; and a wireless circuit coupled to the neural engine to send the compressed spectrogram to a remote destination, to enable the remote destination to process the compressed spectrogram.

Abstract: Systems and methods are provided that may be implemented to use angle of arrival (AoA) of a signal transmitted between two Bluetooth Low Energy (BLE) wireless devices to initially authenticate a connection between the two BLE devices. In one example, bonding or pairing with a first BLE device may be restricted to only those other BLE devices having an antenna currently positioned to transmit a signal to the first BLE device from an allowed direction and within a predefined permitted range of AoA relative to the first BLE device.

Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.

Abstract: In one embodiment, an apparatus includes: a low noise amplifier (LNA) to receive and amplify a radio frequency (RF) signal, the LNA having a first controllable gain; a mixer to downconvert the RF signal to a second frequency signal; a programmable gain amplifier (PGA) coupled to the mixer to amplify the second frequency signal, the PGA having a second controllable gain; a digitizer to digitize the second frequency signal to a digitized signal; a demodulator coupled to the digitizer to demodulate the digitized signal; an automatic gain control (AGC) circuit to control one or more of the first controllable gain and the second controllable gain; and an AGC settling circuit to cause the demodulator to begin operation in response to determining that the AGC circuit has settled.

Abstract: In an embodiment, an apparatus includes: a sensor to sense real world information; a digitizer coupled to the sensor to digitize the real world information into digitized information; a signal processor coupled to the digitizer to process the digitized information into an image; a discriminator coupled to the signal processor to determine, based at least in part on the image, whether the real world information comprises an anomaly, where the discriminator is trained via a generative adversarial network; and a controller coupled to the discriminator.

Abstract: A system and method for creating firmware patch files is disclosed. The method utilizes the Executable Linkable Format file that is created when the firmware image is created. By analyzing the ELF file, the patch creation software is able to identify functions and other data in the new firmware image. The patch creation software then compares these functions to corresponding functions in the old firmware image. The method then creates an edit sequence that may be used to transform the old firmware image into the new firmware image. The edit sequence is then converted into a series of opcodes, where each opcode is followed by at least one parameter. A patch program, disposed on a network device, is able to apply the patch file to update its firmware. This method creates a smaller patch file than other popular tools.

Abstract: An apparatus includes a radio-frequency (RF) receiver for receiving an RF signal using a plurality of antennas. The RF receiver includes a demodulator to provide a switch signal to cause the RF receiver to use an antenna in the plurality of antennas. The RF receiver further includes a carrier frequency offset (CFO) correction circuit that estimates and removes a carrier frequency offset.

Abstract: A switch activation system including a charge pump, a load monitor, and a switch driver. The charge pump drives a negative voltage node to a predetermined negative voltage level. The load monitor monitors the charge pump and to assert a break done signal after the charge pump begins driving the negative voltage back to the predetermined negative voltage level after being increased. The switch driver turns on a first electronic switch in response to assertion of a corresponding activation signal and assertion of the break done signal. The break done signal is asserted only after electronic switches being turned off are fully turned off to avoid conflict. The charge pump operates at a frequency based on a difference between a voltage level of the negative voltage node and the predetermined negative voltage level to drive the negative voltage node back to its predetermined level within a predetermined period of time.

Abstract: Systems and methods for detecting and protecting against phase manipulation during AoA or AoD operations are disclosed. For AoA operations, the network device receiving the constant tone extension (CTE) generates an antenna switching pattern, which may be randomly generated. The network device then receives the CTE using a plurality of antenna elements. In one embodiment, the network device compares the phase of portions of the CTE signal received that utilize the same antenna element. If the phase of these portions differs by more than a threshold, the network device detects a malicious attack and acts accordingly. In another embodiment, if the AoA algorithm cannot determine the angle of arrival, the network device detects a malicious attack and acts accordingly. For angle of departure operations, the network device that transmits the CTE signal generates the antenna switching pattern and transmits it to the position engine, which performs the comparisons described above.

Abstract: A receiver concurrently demodulates data transmitted with a plurality of protocols. The receiver utilizes multiple and simultaneous protocol detections at preamble and/or packet payload phases. To provide robust detection and achieve fewer false detections, the receiver extends the cross correlation length once a short cross-correlation is valid. The receiver includes a first demodulator path and a second demodulator path with different filter bandwidths. The second demodulator path includes a decimator that reduces data by two. A correlator bank is coupled to the first and second demodulator paths and concurrently detects preamble symbols associated with a plurality of protocols. A first noise detector is coupled to the first demodulator path and a second noise detector is coupled to the second demodulator path. A first symbol identifier circuit is coupled to the first demodulator path and a second symbol identifier circuit coupled to the second demodulator path to provide packet payload symbol detection.

Abstract: An apparatus includes a sample-and-hold (S/H) circuit. The S/H circuit includes a first switch coupled to provide an input signal to be sampled, and a second switch coupled to the first switch and to a first capacitor. The S/H circuit further includes a third switch coupled to the second switch and to a second capacitor, and a fourth switch to selectively couple to ground a node between the first and second switches.

Abstract: An apparatus includes a radio frequency (RF) circuit to transmit or receive RF signals. The apparatus further includes a loop antenna to transmit or receive the RF signals. The apparatus further includes an impedance matching circuit coupled to the RF circuit and to the loop antenna. The impedance matching circuit includes lumped reactive components.

Abstract: An interface between two devices is disclosed. To consume power, the signals used in the interface utilize CMOS signalling. Further, to achieve high speed, a reduced frequency clock is transmitted from one device to the second device. The second device has a clock multiplier to recreate the original clock. Both devices utilize a clock phase alignment block which aligns the phase of the clock with the incoming data. The clock phase alignment block utilizes a digital PLL to consume power. Further, since the digital PLL retains its state, the reduced frequency clock may be disabled when data is not being transmitted. This interface may be used to transmit serial data at rates up to and exceeding 2.5 Gbits/sec.

Abstract: A system and method for one-way ranging is disclosed. The system comprises a transmitter, also referred to as a tag, transmitting a first frequency in a first frequency group. The receiver, also referred to as the locator, receives the first frequency and measures the phase at a first point in time. At a later time, the transmitter switches to a second frequency, which is close in frequency to the first frequency so as to also be part of the first frequency group. The receiver also switches to the second frequency. The receiver then measures the phase of the second frequency at a second point in time. The transmitter and receiver then repeat this sequence for a second frequency group. The four phase measurements are used to determine the distance from the transmitter to the receiver. In this way, improved accuracy may be achieved by having a large separation between the first frequency group and the second frequency group.

Abstract: An apparatus includes a radio-frequency (RF) receiver for receiving an RF signal using a plurality of antennas. The RF receiver includes a demodulator to provide a switch signal to cause the RF receiver to use an antenna in the plurality of antennas. The RF receiver further includes a carrier frequency offset (CFO) correction circuit that uses an estimation of the carrier frequency offset and an estimation of phase differences to remove the carrier frequency offset.