Patents Assigned to Silicon Laboratories
-
Patent number: 9588190Abstract: A method includes supplying a current to at least one conductive path integral with a MEMS device to thereby exert a Lorentz force on the MEMS device in the presence of a magnetic field. The method includes determining the magnetic field based on a control value in a control loop configured to maintain a constrained range of motion of the MEMS device. The control loop may be configured to maintain the MEMS device in a stationary position. The current may have a frequency equal to a resonant frequency of the MEMS device.Type: GrantFiled: December 28, 2012Date of Patent: March 7, 2017Assignee: Silicon Laboratories Inc.Inventors: Eric B. Smith, Riad Wahby, Yan Zhou
-
Patent number: 9588497Abstract: A feedback loop includes an oscillator-based analog-to-digital converter configured to convert an analog signal to a first digital value and a second digital value. The oscillator-based analog-to-digital converter includes a first oscillator having a first oscillation frequency configured to generate a first digital value based on a first signal component of the analog signal. The oscillator-based analog-to-digital converter includes a second oscillator having a second oscillation frequency configured to generate a second digital value based on a second signal component of the analog signal. The first and second signal components are complementary signal components. The feedback loop includes a combiner configured to generate a digital value based on the first digital value, the second digital value, and an offset code. The offset code has a value that increases a difference between the first oscillation frequency and the second oscillation frequency.Type: GrantFiled: July 27, 2016Date of Patent: March 7, 2017Assignee: Silicon Laboratories Inc.Inventors: Timothy A. Monk, Rajesh Thirugnanam, Douglas F. Pastorello
-
Patent number: 9584347Abstract: Systems and methods are disclosed for rapid detection of digital content within received radio frequency (RF) signals. The disclosed embodiments digitize received RF signals and apply a sliding window average to subsampled complex magnitudes for the digital samples to generate subsampled magnitude values. The subsampled magnitude values are then collected over a small number of symbols for the digital content, and the results are analyzed to determine whether or not digital content is present with the received signals. For example, multi-symbol histograms and magnitude ratios determined over multiple symbols can then be utilized to make the determination of whether digital content is present in the received signals. The resulting detection determination can be utilized further to control operations of systems utilizing the disclosed embodiments. The disclosed embodiments can be used, for example, to detect the presence of HD (High Definition) Radio digital content within broadcast channels.Type: GrantFiled: May 31, 2013Date of Patent: February 28, 2017Assignee: Silicon Laboratories Inc.Inventors: Javier Elenes, Dana Taipale
-
Patent number: 9582016Abstract: An apparatus includes an inductor coupled between an input voltage node and a switching node. The switching node selectively enables the inductor to generate a voltage on the switching node based on a voltage on the input voltage node. The apparatus includes a passive circuit configured to generate an intermediate voltage on an intermediate node with respect to a reference voltage and based on the voltage on the switching node. The apparatus includes a boost circuit configured to generate an output voltage on an output node referenced to the intermediate voltage, the output voltage has a magnitude with respect to the reference voltage greater than a magnitude of the intermediate voltage with respect to the reference voltage. The boost circuit may include n boost circuit stages, the intermediate voltage may be VI, and the output voltage may be (n+1)×VI with respect to the voltage on the reference node.Type: GrantFiled: February 5, 2015Date of Patent: February 28, 2017Assignee: Silicon Laboratories Inc.Inventor: Sean Anthony Lofthouse
-
Patent number: 9584133Abstract: An oscillator system addresses power supply noise and temperature dependence. The system includes a multi-stage regulator circuit that receives a supply voltage and generates a lower voltage oscillator supply voltage that is less noisy than the supply voltage. A charge pump circuit receives the oscillator supply voltage and the oscillator output signal and supplies the regulator circuit with a boosted voltage. A reference generator circuit supplies a reference signal that is used to determine the oscillator supply voltage. The reference signal varies with temperature and is used to offset the temperature coefficient of the oscillator.Type: GrantFiled: May 31, 2012Date of Patent: February 28, 2017Assignee: Silicon Laboratories Inc.Inventors: Volodymyr Kratyuk, Jeffrey L. Sonntag, Aaron J. Caffee
-
Patent number: 9576679Abstract: A circuit may include a first sample node configured to provide a low precision sample of an input signal, a second sample node configured to store a high precision sample of an input signal, and a first switch circuit coupled between an input and the first sample node. The circuit may further include a second switch circuit coupled between the first sample node and the second sample node and configured to limit leakage current that could discharge the second sample node.Type: GrantFiled: October 9, 2014Date of Patent: February 21, 2017Assignee: Silicon Laboratories Inc.Inventors: Matthew R Powell, Shouli Yan
-
Patent number: 9572109Abstract: Various techniques for reducing power in a wireless network device are disclosed. In some embodiments, software routines within the device are modified to minimize the time during which the analog circuitry in a radio is powered. In some embodiments, the techniques make use of knowledge of implied delays associated with a particular network protocol. For example, in a CSMA network, there is a defined minimum period before the device can attempt to gain access to the media. The radio may be powered off during this defined period. In other embodiments, modifications to a protocol are disclosed which allow additional power savings.Type: GrantFiled: March 18, 2015Date of Patent: February 14, 2017Assignee: Silicon Laboratories Inc.Inventors: Perry J. Spero, Haley April Taylor
-
Patent number: 9570908Abstract: An apparatus is disclosed, which includes a system that includes loads, linear regulators, switches and a controller. The linear regulators supply power to the loads, and the controller is adapted to use the switches to selectively couple power sources to the linear regulators to regulate a collective power dissipation of linear regulators.Type: GrantFiled: February 9, 2012Date of Patent: February 14, 2017Assignee: Silicon Laboratories Inc.Inventor: Kenneth W. Fernald
-
Patent number: 9564915Abstract: An integrated circuit (IC) includes an analog-to-digital converter (ADC). The ADC includes an ADC core circuit integrated in the IC to receive an analog signal, to convert the analog signal to a digital signal in response to a trigger signal. The ADC core circuit further provide the digital signal as an output of the ADC. The ADC further includes internal trigger circuitry integrated in the ADC to provide the trigger signal to the ADC after a prescribed delay period has expired.Type: GrantFiled: March 4, 2016Date of Patent: February 7, 2017Assignee: Silicon Laboratories Inc.Inventors: Wajid Hassan Minhass, Oeivind A. G. Loe
-
Patent number: 9565065Abstract: In some cases, it may be desirable to limit the number of routers in a mesh network. Various techniques to limit the number of routers, without affecting connectivity, are disclosed. In some embodiments, a node enables its router capability if there are less than a predetermined number of routers already in the network. In other embodiments, a node enables its routing capability only is it is necessary to resolve a connectivity issue or a biconnectivity issue. In some cases, a node, which previously enabled its router capability, may no longer be required to be a router. In some embodiments, this node, upon making this determination, disables its routing capability.Type: GrantFiled: May 21, 2015Date of Patent: February 7, 2017Assignee: Silicon Laboratories Inc.Inventor: Richard Kelsey
-
Patent number: 9553565Abstract: A method an apparatus for performing automatic frequency compensation (or control) is disclosed. A method and apparatus for performing automatic frequency compensation (or control) is disclosed. In one embodiment, a method includes a radio receiver receiving a radio signal and detecting a preamble in the radio signal. The method further includes freezing an automatic frequency compensation (AFC) loop responsive to detecting the preamble. A clock source of the AFC loop may be switched from a first clock signal to a second clock signal. The method further includes subsequently unfreezing the AFC loop.Type: GrantFiled: September 29, 2011Date of Patent: January 24, 2017Assignee: Silicon Laboratories Inc.Inventors: Hendricus de Ruijter, Wentao Li
-
Publication number: 20170019262Abstract: In some embodiments, powered devices, circuits, and methods are disclosed that may include biasing a hot swap switch to couple a capacitor of a DC-DC converter to negative supply node when an input voltage exceeds a threshold and biasing a telephony switch to couple a positive supply node to a negative supply node when the input voltage exceeds the threshold. Further, the method may further include deactivating the hot swap switch after a period of time, and continuing to bias the telephony switch.Type: ApplicationFiled: July 15, 2015Publication date: January 19, 2017Applicant: Silicon Laboratories Inc.Inventors: Vince András Horváth, Tamás Marozsák, Péter Onódy, John Gammel
-
Patent number: 9537581Abstract: An apparatus includes a first terminal, a second terminal, a bi-directional regulator circuit, and functional circuitry. The bi-directional regulator circuit generates a voltage across a first power supply node and a second power supply node in response to an input current flowing through the first terminal and the second terminal with a first polarity. The bi-directional regulator circuit also generates the voltage across the first power supply node and the second power supply node in response to the input current flowing through the first terminal and the second terminal with a second polarity opposite the first polarity. The functional circuitry is powered by the voltage and is configured to generate a signal using the voltage. The signal is indicative of the input current in response to the input current being supplied to the first terminal and is indicative of the input current in response to presence of the input current.Type: GrantFiled: June 30, 2014Date of Patent: January 3, 2017Assignee: Silicon Laboratories Inc.Inventors: Michael J. Mills, Anantha Nag Nemmani, Jeffrey L. Sonntag
-
Patent number: 9531284Abstract: A pseudo-constant portion of a switching cycle (ON time or OFF time) is constant over short periods of time but the pseudo-constant portion is controlled over longer periods of time in a slow frequency control loop to maintain a desired frequency. The average frequency is maintained at or near a desired frequency but when there is a transient, local disturbance, or load change, or other occurrence, then for a short period of time the frequency will vary as the non pseudo-constant portion of the switching cycle changes to address the transient or other occurrence. The frequency control loop will slowly adjust the pseudo-constant portion of the switching cycle to return to the desired frequency.Type: GrantFiled: January 30, 2014Date of Patent: December 27, 2016Assignee: Silicon Laboratories Inc.Inventor: Riad S. Wahby
-
Patent number: 9531394Abstract: A technique for calibrating a digital-to-time converter includes an apparatus including a digital-to-time converter configured to generate an output signal based on a digital code, an input signal, and a gain calibration signal. The output signal has edges linearly delayed from corresponding edges of the input signal based on the digital code. The digital code vacillates between an evaluation code and a calibration code. The apparatus includes a reference signal generator configured to provide a delayed version of the input signal. The delay of the reference signal generator is matched to a delay of the digital-to-time converter. The apparatus includes a calibration circuit configured to generate the gain calibration signal based on the output signal and the delayed version of the input signal. The calibration code may alternate between a first calibration delay code and a second calibration delay code.Type: GrantFiled: June 22, 2015Date of Patent: December 27, 2016Assignee: Silicon Laboratories Inc.Inventors: Aaron J. Caffee, Brian G. Drost
-
Patent number: 9531376Abstract: An oscillator supplies a clock signal having a frequency determined in part according to a received current. A transmit side charge pump is coupled to the clock signal and boosts a voltage supplied to the charge pump to generate a boosted voltage. A driver circuit drives a transmit signal having a frequency based on the clock signal and a voltage based on the boosted voltage to a capacitive isolation communication path. A receive side charge pump is coupled to the isolation capacitors of the isolation communication path and boosts a voltage of the received signal on the receive side of the isolation communication path and supplies a gate signal with the boosted voltage to a gate of at least one transistor.Type: GrantFiled: May 29, 2015Date of Patent: December 27, 2016Assignee: Silicon Laboratories Inc.Inventors: Jeffrey L. Sonntag, Timothy J. Dupuis
-
Patent number: 9531253Abstract: Current flowing through an inductor on a primary side of a voltage converter is sensed and compared to a threshold peak current value to determine when to end an ON portion of the voltage converter. The secondary side of the voltage converter supplies an indication of output voltage for use in determining the threshold peak current value. On start-up the primary side detects when the indication of output voltage is supplied by the secondary side across on isolation channel. Prior to detecting the indicating is being supplied, the primary side uses an increasing threshold peak current as the threshold peak current value. After detection that the indication of output voltage is being provided by the secondary side, the threshold peak current value is based on the indication of the output voltage.Type: GrantFiled: January 30, 2014Date of Patent: December 27, 2016Assignee: Silicon Laboratories Inc.Inventors: Riad S. Wahby, Jeffrey L. Sonntag, Tufan C. Karalar, Michael J. Mills, Eric B. Smith, Ion C. Tesu, Donald E. Alfano
-
Patent number: 9525440Abstract: A method includes estimating a temperature change to an integrated circuit, which is associated with a pending transmission from the integrated circuit. The method includes, based on the estimated temperature change, regulating at least one parameter that is associated with the pending transmission to maintain a temperature of the integrated circuit below a temperature threshold.Type: GrantFiled: December 26, 2013Date of Patent: December 20, 2016Assignee: Silicon Laboratories Inc.Inventors: Gerald Champagne, David Mervine
-
Publication number: 20160360044Abstract: In some embodiments, a power converter circuit includes a first power converter coupled between a direct-current (DC) node and a first pair of output nodes. The first power converter may be configured to provide a first power signal having a first phase to the first pair of output nodes. The power converter circuit may also include a second power converter coupled between the DC node and a second pair of output nodes. The second power converter may be configured to provide a second power signal having a second phase to the second pair of output nodes. The second phase and the first phase may differ by an odd multiple of ninety degrees.Type: ApplicationFiled: June 5, 2015Publication date: December 8, 2016Applicant: Silicon Laboratories Inc.Inventors: Sean Anthony Lofthouse, Bassem ElAzzami
-
Patent number: 9515671Abstract: Apparatus and associated methods are disclosed for gain programming or selection with parasitic element compensation. In one exemplary embodiment, an apparatus includes a first circuit that has a first programmable gain, and includes a first set of components having parasitic elements. The apparatus also includes a second circuit that has a second programmable gain, and includes a second set of components having parasitic elements. The apparatus has a gain that is a product of the first and second programmable gains. A gain error because of the parasitic elements of the first and second sets of components is canceled by setting the first programmable gain as a reciprocal of the second programmable gain.Type: GrantFiled: June 6, 2015Date of Patent: December 6, 2016Assignee: Silicon Laboratories Inc.Inventors: Axel Thomsen, Alan L. Westwick, Ricky Setiawan, Rex Wong Tak Ying