Patents Assigned to Sino-American Silicon Products Inc.
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Patent number: 11534794Abstract: A method for forming an isolating layer of a crucible includes placing a round crucible sideways with a bottom surface of an inside thereof perpendicular to a horizontal plane, and then performing a plurality of spraying processes to form the isolating layer on the bottom surface and a wall surface of the round crucible. Each spraying process includes spraying a slurry on the bottom surface; using an optical positioner to set a spraying range the same as one of a plurality of partial areas divided from the wall surface; aligning one of the plurality of partial areas with the spraying range; fixing the round crucible and spraying the slurry in the spraying range; stopping the spraying; and rotating the round crucible to move another partial area to the spraying range. Then, the steps are repeated until the spraying of all the partial areas is completed.Type: GrantFiled: May 25, 2020Date of Patent: December 27, 2022Assignee: Sino-American Silicon Products Inc.Inventors: Yu-Min Yang, Huang-Wei Lin, Bo-Kai Wang, Sung-Lin Hsu, Ying-Ru Shih
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Publication number: 20200398304Abstract: A method for forming an isolating layer of a crucible includes placing a round crucible sideways with a bottom surface of an inside thereof perpendicular to a horizontal plane, and then performing a plurality of spraying processes to form the isolating layer on the bottom surface and a wall surface of the round crucible. Each spraying process includes spraying a slurry on the bottom surface; using an optical positioner to set a spraying range the same as one of a plurality of partial areas divided from the wall surface; aligning one of the plurality of partial areas with the spraying range; fixing the round crucible and spraying the slurry in the spraying range; stopping the spraying; and rotating the round crucible to move another partial area to the spraying range. Then, the steps are repeated until the spraying of all the partial areas is completed.Type: ApplicationFiled: May 25, 2020Publication date: December 24, 2020Applicant: Sino-American Silicon Products Inc.Inventors: Yu-Min Yang, Huang-Wei Lin, Bo-Kai Wang, Sung-Lin Hsu, Ying-Ru Shih
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Patent number: 10825940Abstract: A polycrystalline silicon wafer is provided. The polycrystalline silicon wafer, includes a plurality of silicon grains, wherein the carbon content of the polycrystalline silicon wafer is greater than 4 ppma, and the resistivity of the polycrystalline silicon wafer is greater than or equal to 1.55 ?-cm.Type: GrantFiled: August 26, 2016Date of Patent: November 3, 2020Assignee: Sino-American Silicon Products Inc.Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu
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Patent number: 10510830Abstract: An N-type polysilicon crystal, a manufacturing method thereof, and an N-type polysilicon wafer are provided. The N-type polysilicon crystal has a slope of resistivity and a slope of defect area percentage. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to resistivity presented by a unit of Ohm·cm (?·cm), the slope of resistivity is 0 to ?1.8 at the solidified fraction of 0.25 to 0.8. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to defect area percentage (%), the slope of defect area percentage is less than 2.5 at the solidified fraction of 0.4 to 0.8.Type: GrantFiled: September 2, 2018Date of Patent: December 17, 2019Assignee: Sino-American Silicon Products Inc.Inventors: Ching-Hung Weng, Cheng-Jui Yang, Yu-Min Yang, Yuan-Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Ying-Ru Shih, Sung-Lin Hsu
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Patent number: 10297702Abstract: A polycrystalline silicon column is provided. The polycrystalline silicon column includes a plurality of silicon grains grown along a crystal-growing direction. In the crystal-growing direction, the average grain size of the silicon grains and the resistivity of the polycrystalline silicon column have opposite variation in their trends, the average grain size of the silicon grains and the oxygen content of the polycrystalline silicon column have opposite variation in their trends, and the average grain size of the silicon grains and the defect area ratio of the polycrystalline silicon column have the same variation in their trends. The overall average defect area ratio of the polycrystalline silicon column is less than or equal to 2.5%.Type: GrantFiled: August 26, 2016Date of Patent: May 21, 2019Assignee: Sino-American Silicon Products Inc.Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu
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Publication number: 20190096987Abstract: An N-type polysilicon crystal, a manufacturing method thereof, and an N-type polysilicon wafer are provided. The N-type polysilicon crystal has a slope of resistivity and a slope of defect area percentage. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to resistivity presented by a unit of Ohm·cm (?·cm), the slope of resistivity is 0 to ?1.8 at the solidified fraction of 0.25 to 0.8. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to defect area percentage (%), the slope of defect area percentage is less than 2.5 at the solidified fraction of 0.4 to 0.8.Type: ApplicationFiled: September 2, 2018Publication date: March 28, 2019Applicant: Sino-American Silicon Products Inc.Inventors: Ching-Hung Weng, Cheng-Jui Yang, Yu-Min Yang, Yuan-Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Ying-Ru Shih, Sung-Lin Hsu
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Publication number: 20190035946Abstract: A solar cell wafer is provided. It is a silicon wafer, and a surface of the silicon wafer has a plurality of pores, wherein based on a total amount of 100% of the plurality of pores, 60% or more of the pores has a circularity greater than 0.5. Therefore, the reflectance of the solar cell wafer can be efficiently reduced.Type: ApplicationFiled: April 27, 2018Publication date: January 31, 2019Applicant: Sino-American Silicon Products Inc.Inventors: Cheng-Jui Yang, Jian-Jia Huang, Ming-Kung Hsiao, Cheng-Wei Gu, Bo-Kai Wang, Wen-Huai Yu, I-Ching Li, Sung-Lin Hsu, Wen-Ching Hsu
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Patent number: 10138572Abstract: A crystalline silicon ingot and a method of fabricating the same are disclosed. The crystalline silicon ingot of the invention includes multiple silicon crystal grains growing in a vertical direction of the crystalline silicon ingot. The crystalline silicon ingot has a bottom with a silicon crystal grain having a first average crystal grain size of less than about 12 mm. The crystalline silicon ingot has an upper portion, which is about 250 mm away from said bottom, with a silicon crystal grain having a second average crystal grain size of greater than about 14 mm.Type: GrantFiled: March 15, 2016Date of Patent: November 27, 2018Assignee: Sino-American Silicon Products Inc.Inventors: Sung-Lin Hsu, Cheng-Jui Yang, Pei-Kai Huang, Sheng-Hua Ni, Yu-Min Yang, Ming-Kung Hsiao, Wen-Huai Yu, Ching-Shan Lin, Wen-Ching Hsu, Chung-Wen Lan
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Publication number: 20180312995Abstract: The present disclosure provides a polycrystalline silicon ingot. The polycrystalline silicon ingot has a vertical direction and includes a nucleation promotion layer located at a bottom of the polycrystalline silicon ingot, and silicon grains grown along the vertical direction, wherein the silicon grains include at least three crystal directions. The coefficient of variation of grain area in a section above the nucleation promotion layer of the polycrystalline silicon ingot increases along the vertical direction.Type: ApplicationFiled: July 2, 2018Publication date: November 1, 2018Applicant: Sino-American Silicon Products Inc.Inventors: Yu-Min Yang, Cheng-Jui Yang, Hung-Sheng Chou, Wen-Huai Yu, Sung-Lin Hsu, Wen-Ching Hsu
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Patent number: 10087080Abstract: A method of fabricating a poly-crystalline silicon ingot includes: (a) loading a nucleation promotion layer onto a bottom of a mold; (b) providing a silicon source on the nucleation promotion layer in the mold; (c) heating the mold until the silicon source is melted into a silicon melt completely; (d) controlling at least one thermal control parameter regarding the silicon melt continually to enable the silicon melt to nucleate on the nucleation promotion layer such that a plurality of silicon grains grow in the vertical direction; (e) controlling the at least one thermal control parameter to enable the plurality of the silicon grains to continuously grow with an average grain size increasing progressively in the vertical direction until entirety of the silicon melt is solidified to obtain the poly-crystalline silicon ingot, wherein the nucleation promotion layer is loaded by spreading a plurality of mono-Si particles over the bottom of the mold.Type: GrantFiled: November 14, 2016Date of Patent: October 2, 2018Assignee: Sino-American Silicon Products Inc.Inventors: Wen-Huai Yu, Cheng-Jui Yang, Yu-Min Yang, Kai-Yuan Pai, Wen-Chieh Lan, Chan-Lu Su, Yu-Tsung Chiang, Sung-Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan
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Publication number: 20180273880Abstract: A cleaner for silicon wafer and a method for cleaning silicon wafer are provided. The cleaner for silicon wafer is essentially consisted of 1-3 wt % of citric acid, 2.5-5 wt % of sodium bicarbonate, limonene, potassium hydroxide and water. The cleaning efficiency may be improved by using the cleaner for silicon wafer to clean the silicon wafer.Type: ApplicationFiled: January 11, 2018Publication date: September 27, 2018Applicant: Sino-American Silicon Products Inc.Inventors: Jian-Yu Lin, Chun-Ho Chen, I-Ching Li, Sung-Lin Hsu
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Patent number: 10065863Abstract: A poly-crystalline silicon ingot having a bottom and defining a vertical direction includes a plurality of silicon grains grown in the vertical direction, in which the plurality of the silicon grains have at least three crystal orientations; and a nucleation promotion layer comprising a plurality of chips and chunks of poly-crystalline silicon on the bottom, wherein the poly-crystalline silicon ingot has a defect density at a height ranging from about 150 mm to about 250 mm of the poly-crystalline silicon ingot that is less than 15%.Type: GrantFiled: May 1, 2017Date of Patent: September 4, 2018Assignee: Sino-American Silicon Products Inc.Inventors: Wen-Huai Yu, Cheng-Jui Yang, Yu-Min Yang, Kai-Yuan Pai, Wen-Chieh Lan, Chan-Lu Su, Yu-Tsung Chiang, Sung-Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan
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Patent number: 10029919Abstract: Present disclosure provides a multicrystalline silicon (mc-Si) brick, including a bottom portion starting from a bottom to a height of 100 mm, a middle portion starting from the height of 100 mm to a height of 200 mm; and a top portion starting from the height of 200 mm to a top. A percentage of incoherent grain boundary in the bottom portion is greater than a percentage of incoherent grain boundary in the top portion. Present disclosure also provides a multicrystalline silicon (mc-Si) wafer. The mc-Si wafer includes a percentage of non-? grain boundary from about 60 to about 75 and a percentage of ?3 grain boundary from about 12 to about 25.Type: GrantFiled: April 28, 2015Date of Patent: July 24, 2018Assignee: SINO-AMERICAN SILICON PRODUCTS INC.Inventors: Hung-Sheng Chou, Yu-Min Yang, Wen-Huai Yu, Sung Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan, Yu-Ting Wong
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Patent number: 9885125Abstract: A method for manufacturing an isolating layer onto a crucible includes the steps as follows: providing a spraying device for the following spraying steps; heating the crucible and measuring the heated crucible to get a first temperature; spraying a slurry on the inner wall of the crucible to form an isolating layer by a spraying unit with a predetermined spraying manner; measuring the isolating layer to get a second temperature; obtaining a value for the difference between the first and second temperatures and judging whether the difference value in a within predetermined difference scope or not, in which the predetermined difference scope is about 6° C.˜12° C.; when the difference value is not in the predetermined difference scope, adjusting the predetermined spraying manner; when the difference value is in the predetermined difference scope, implementing the above spraying steps to the crucible.Type: GrantFiled: March 12, 2015Date of Patent: February 6, 2018Assignee: Sino-American Silicon Products Inc.Inventors: Hung-Sheng Chou, Li Wei Li, Wen-Huai Yu, Bruce Hsu, Chun-I Fan, Wen Ching Hsu
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Publication number: 20170233257Abstract: A poly-crystalline silicon ingot having a bottom and defining a vertical direction includes a plurality of silicon grains grown in the vertical direction, in which the plurality of the silicon grains have at least three crystal orientations; and a nucleation promotion layer comprising a plurality of chips and chunks of poly-crystalline silicon on the bottom, wherein the poly-crystalline silicon ingot has a defect density at a height ranging from about 150 mm to about 250 mm of the poly-crystalline silicon ingot that is less than 15%.Type: ApplicationFiled: May 1, 2017Publication date: August 17, 2017Applicant: Sino-American Silicon Products Inc.Inventors: Wen-Huai Yu, Cheng-Jui Yang, Yu-Min Yang, Kai-Yuan Pai, Wen-Chieh Lan, Chan-Lu Su, Yu-Tsung Chiang, Sung-Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan
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Patent number: 9728669Abstract: A method of manufacturing solar cell includes providing a semiconductor substrate. A coating layer is then formed on a plurality of sides. Subsequently, an anti-reflective layer is formed on the layer. Finally at least one first electrode and at least one second electrode are formed. The first and second electrodes respectively and electrically connect to the second conductive amorphous substrate and the semiconductor substrate. The potential induced degradation is greatly reduced.Type: GrantFiled: June 24, 2013Date of Patent: August 8, 2017Assignee: Sino-American Silicon Products Inc.Inventors: Budi Tjahjono, Ming-Jui Yang, Chuan-Wen Ting, Yu-Ting Chiu, Jen-Ting Tan, Wen Sheng Wu, Kuo-Wei Shen, Fang-Wei Hu
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Patent number: 9637391Abstract: A crystalline silicon ingot and a method of fabricating the same are provided. The method utilizes a nucleation promotion layer to facilitate a plurality of silicon grains to nucleate on the nucleation promotion layer from a silicon melt and grow in a vertical direction into silicon grains until the silicon melt is completely solidified. The increment rate of defect density in the silicon ingot along the vertical direction has a range of 0.01%/mm˜10%/mm.Type: GrantFiled: January 14, 2014Date of Patent: May 2, 2017Assignee: Sino-American Silicon Products Inc.Inventors: Wen-Huai Yu, Cheng-Jui Yang, Yu-Min Yang, Kai-Yuan Pai, Wen-Chieh Lan, Chan-Lu Su, Yu-Tsung Chiang, Sung-Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan
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Patent number: 9593406Abstract: The invention provides an optical device and manufacture thereof. The optical device of the invention includes a transparent substrate, a seeding layer, a plurality of nano-rods and a protection layer. The seeding layer is formed to overlay an entrance surface and an exit surface of the transparent substrate. The plurality of nano-rods are formed on the seeding layer. The protection layer is formed to completely overlay the plurality of nano-rods.Type: GrantFiled: November 21, 2014Date of Patent: March 14, 2017Assignee: SINO-AMERICAN SILICON PRODUCTS INC.Inventors: Miin-Jang Chen, Wen-Ching Hsu
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Publication number: 20170058428Abstract: A polycrystalline silicon column is provided. The polycrystalline silicon column includes a plurality of silicon grains grown along a crystal-growing direction. In the crystal-growing direction, the average grain size of the silicon grains and the resistivity of the polycrystalline silicon column have opposite variation in their trends, the average grain size of the silicon grains and the oxygen content of the polycrystalline silicon column have opposite variation in their trends, and the average grain size of the silicon grains and the defect area ratio of the polycrystalline silicon column have the same variation in their trends. The overall average defect area ratio of the polycrystalline silicon column is less than or equal to 2.5%.Type: ApplicationFiled: August 26, 2016Publication date: March 2, 2017Applicant: Sino-American Silicon Products Inc.Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu
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Publication number: 20170062635Abstract: A polycrystalline silicon wafer is provided. The polycrystalline silicon wafer, includes a plurality of silicon grains, wherein the carbon content of the polycrystalline silicon wafer is greater than 4 ppma, and the resistivity of the polycrystalline silicon wafer is greater than or equal to 1.55 ?-cm.Type: ApplicationFiled: August 26, 2016Publication date: March 2, 2017Applicant: Sino-American Silicon Products Inc.Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu