Abstract: A method of partitioning a physical block in a memory includes: determining a sub-block size according to a data length of a sequential write and a block size; partitioning the physical block into sub-blocks, each having a size equal to the sub-block size; and mapping logical blocks to the sub-blocks.

Abstract: A fixture, for connecting a host device and a universal serial bus (USB) device, the fixture comprises a plurality of connectors; a plurality of first signal pins, located at first ends of the plurality of connectors for connecting to the host device; and a plurality of second signal pins, located at second ends of the plurality of connectors for connecting to the USB device; wherein a first part of the plurality of connectors are used for transmitting signals between the host device and the USB device in a USB mode; wherein a second part of the plurality of connectors are retained in a specified state for providing a control signal to control the USB device to enter an operating mode.

Abstract: A configurable coding system and method of multiple error correcting codes (ECCs) for a memory device or devices are disclosed. The system includes a first ECC codec that selectively performs different error corrections with different parameters; means for providing a selected parameter to the ECC codec for initializing the ECC codec; and a second ECC codec that corrects the selected error-prone parameter in order to provide an error-free parameter to the first ECC codec.

Abstract: In an architecture of wear leveling for a non-volatile memory composed of plural storage units, a translation layer is configured to translate a logical address provided by a host to a physical address of the non-volatile memory. A cold-block table is configured to assign a cold block or blocks in at least one storage unit, the cold block in a given storage unit having an erase count being less than erase counts of non-cold blocks in the given storage unit. The logical addresses and the associated physical addresses of the cold blocks are recorded in the cold-block table, thereby building a cold-block pool composed of the cold blocks.

Abstract: A micro secure digital (SD) adapter, for adapting a micro SD card to an SD interface, the micro SD adapter comprising a micro SD slot, for disposing the micro SD card; a pin module, comprising a plurality of signal pins, a first ground pin, and a second ground pin; a plurality of connectors, for conducting the plurality of signal pins and the first ground pin to the micro SD card according to a pin configuration of the micro SD card when the micro SD card is disposed in the micro SD slot; and a conducting module, electrically connected between a terminal of a first connector corresponding to the first ground pin and the second ground pin.

Abstract: A delay device for generating a signal for a random component in a random number generator is disclosed. The delay device includes a delay module, for generating a plurality of delayed signals, wherein each delayed signal has a delay time and the delay time is different from each other; a first multiplexer, coupled to the delay module, for outputting a delayed signal among the plurality of delayed signals as a delayed trigger signal to control the random component to generate a random bit; and a delay selector, coupled to the first multiplexer, for generating a selecting signal to control the first multiplexer to select to output the delayed signal as the delayed trigger signal.

Abstract: A time-sharing buffer access system manages a buffer among plural master devices. Plural buffer handling units are operable to associatively couple the master devices, respectively, and a first end of each buffer handling unit is used to independently transfer data to or from the associated master device. A second end of each buffer handling unit is coupled to a buffer switch. A time slot controller defines a time slot, during which one of the buffer handling units is selected by the buffer switch such that data are only transferred between the selected buffer handling unit and the buffer.

Abstract: A method of arranging data in a non-volatile memory and an associated memory control system are disclosed. A data area is divided into a plurality of valid data divisions, each having a link header followed by associated data and error correction code (ECC). At least one linking parameter is set in each said link header, and at least one obsolete data division including a bad column or columns is set, each said obsolete data division being flexible in size. Valid data divisions are linked and the obsolete data divisions are skipped, when accessing the non-volatile memory, according to the at least one linking parameter.

Abstract: A configurable coding system and method of multiple error correcting codes (ECCs) for a memory device or devices are disclosed. The system includes an ECC codec that selectively performs different error corrections with different parameters. The system also includes means for providing a selected parameter to the ECC codec for initializing the ECC codec. The parameter used for initializing the ECC codec is an error-free parameter.

Abstract: A bridge device for manufacturing a storage device, including a first transmission interface, a second transmission interface, a mode select unit, a power control unit, and a bridge controller is provided. The mode select unit generates a mode select signal responsive to a manufacturing process command. The power control unit controls powering operation of the storage device. The bridge controller receives the manufacturing process command through the first transmission interface. When the bridge controller detects the presence of the storage device, drives the power control unit turning off the storage device. After a first predetermined period, the bridge controller drives the mode select unit transmitting the mode select signal to the storage device through unused pin of the second transmission interface. The bridge controller drives the power control unit turning on the storage device after a second predetermined period to have the storage device entering a predefined mode.

Abstract: Disclosed herein is related to an operating method, and a memory module with wireless communication component. An exemplary example of the invention describes the memory module providing a control unit which coupled to both a wireless communication component such as an NFC chip, and anon-volatile memory unit. The memory module exemplarily uses an eMMC bus to interconnect a cellular phone system and the control unit. It is advantaged that when any data required to be transmitted between the NFC chip and the cellular phone system, a partition is specified to the chip according a partition table for further access task.

Abstract: A method of programming/reading a multi-bit per cell non-volatile memory with a sequence is disclosed. A plurality of less-significant-bit pages are programmed, and a plurality of consecutive most-significant-bit pages of a plurality of consecutive word lines are programmed one after the other in a consecutive order. The most-significant-bit pages through all word lines in at least one memory block of the non-volatile memory are programmed or read after the less-significant-bit pages through all the word lines in the at least one memory block are programmed or read.

Abstract: A method of scheduling a plurality of tasks for a plurality of memories in a memory system is disclosed. The method includes classifying each task among the plurality of tasks to a task type among a plurality of task types, disposing a plurality of task queues according to the plurality of task types wherein each task queue stores tasks to be executed within the plurality of tasks, assigning a priority for each task type among the plurality of task types, disposing at least one execution queue; and converting a first task stored in a first task queue among the plurality of task queues into at least one command to be stored in a first execution queue among the at least one execution queue, wherein the at least one command is executed according to the priority of a first task type corresponding to the first task queue.

Abstract: A method of dynamic data storage for error correction in a memory device is disclosed. Data for storage is received, the received data is encoded and error correction code (ECC) is generated. The encoded data is stored in the memory device that includes a plurality of pages each having a plurality of data partitions. More corrected errors a marked page has, a smaller portion with a space of at least one datum of each of the corresponding data partitions associated with the marked page is allocated to store the encoded data, while a size of the ECC is fixed, thereby increasing capability of correcting errors in the marked page.

Abstract: A method of data collection is performed in a non-volatile memory that has a number of blocks and each block has multiple pages. A timestamp is recorded associated with a data written to the non-volatile memory. Some of the written data are moved from a plurality of different pages respectively to a first block according to the timestamps associated with the plurality of written data stored in the plurality of different pages.

Abstract: A memory device includes a control board and a conductive housing. In one embodiment, a circuit ground in the control board is electrically coupled to the conductive housing to make a common ground contact. In another embodiment, differential impedances at different locations of a conductor are controllably maintained within a specified range by adjusting width of the conductor and/or spacing between the adjacent conductors of a differential pair.

Abstract: A method of accessing a non-volatile memory is disclosed. Original bits of data are duplicated on a bit level to generate a plurality of duplicated bits corresponding to each original bit. At least one shielding bit is provided between the duplicated bits corresponding to different original bits. The duplicated bits and the at least one shielding bit are programmed to the non-volatile memory. The original bits are generated or determined according to the duplicated bits.

Abstract: A method of initializing a non-volatile memory system is disclosed. System data are written to a non-volatile memory based on a formula rule at a factory, and a number of copies of the system data are written to the non-volatile memory. The system data are searched in the non-volatile memory according to the formula rule and a selected data access mode. At least one operating parameter of the selected data access mode is reconfigured, followed by checking if the searched system data are successfully read. The system data are utilized to set the at least one operating parameter of the non-volatile memory system when the searched system data are successfully read from the non-volatile memory.

Abstract: A nonvolatile storage device buffers multiple write commands and selects one or more therefrom according to a choosing policy to execute in priority, so as to increase the probability of continuously executing write commands corresponding to an identical smallest erasable unit, thereby reducing the frequency of backup, erasing and copyback operations and improving the efficiency of the nonvolatile storage device.

Abstract: Disclosed herein is related to an operating method, and a memory module with wireless communication component. An exemplary example of the invention describes the memory module providing a control unit which coupled to both a wireless communication component such as an NFC chip, and anon-volatile memory unit. The memory module exemplarily uses an eMMC bus to interconnect a cellular phone system and the control unit. It is advantaged that when any data required to be transmitted between the NFC chip and the cellular phone system, a partition is specified to the chip according a partition table for further access task.