Patents Assigned to Sony/Tektronix Corporation
  • Patent number: 6484111
    Abstract: This invention relates to a real time signal analyzer that can produce time domain data and frequency domain data at the substantial same time and in real time, securing the simultaneousness between them, and can analyze them with changing the setting of the center frequency and the signal analysis span arbitrarily in low cost configuration.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: November 19, 2002
    Assignee: Sony/Tektronix Corporation
    Inventor: Akira Nara
  • Patent number: 6377617
    Abstract: This invention relates to a new type real time signal analyzer that has both merits of a conventional real time FFT analyzer and a conventional vector signal analyzer and clears both demerits of them. This apparatus has a FFT processor 14 for FFT processing time domain data in real time, a FIFO memory 22 for delaying the time domain data before the FFT process, and a double port memory 24 for storing FFT processed frequency data from the FFT processor 14 and delayed time domain data read out from the FIFO memory 22. The delay time of the FIFO memory 22 is set up according to the process time of the FFT processor 14 that allows to secure time correspondence between the delayed time domain data and the frequency domain data. Therefore it respectively provides the data of the time domain and the frequency domain in real time at the same time that are synchronized each other.
    Type: Grant
    Filed: June 4, 1999
    Date of Patent: April 23, 2002
    Assignee: Sony/Tektronix Corporation
    Inventor: Akira Nara
  • Patent number: 6356067
    Abstract: A wide band signal analyzer includes a frequency converter for converting a signal under test to an intermediate frequency signal. A narrow band signal processor receives the intermediate frequency signal and produces a first digital signal representing a first frequency band of the intermediate frequency signal and a wide band signal processor receives the intermediate frequency signal and produces a second digital signal representing a second frequency band of the intermediate frequency signal. A transfer rate decelerator decelerates the transfer rate of the second digital signal, and a digital processor processes selectively the first digital signal or the output signal of the transfer rate decelerator. A memory stores the processed output of the digital processor.
    Type: Grant
    Filed: August 5, 1999
    Date of Patent: March 12, 2002
    Assignee: Sony/Tektronix Corporation
    Inventor: Akira Nara
  • Patent number: 6255619
    Abstract: This invention relates to a lens machining device for machining a lens so that the optical characteristics of light outputted by a semiconductor laser element (10) will be adjusted to desired ones. The lens (12) to be machined is provided at one end of the element (10) and the optical characteristics of the lens (12) are measured with a wave front measuring instrument (16) through the use of the light transmitted through the lens (12). A machining laser beam is focused upon the surface of the lens (12) through a beam splitter (14). The surface of the lens (12) is machined with the laser beam while a position adjusting device (22) adjusts the relative positional relation between the surface of the lens (12) and a position where the laser beam is focused. An ultraviolet laser (18) and the position adjusting device (22) are controlled by a controlling arithmetic device (24).
    Type: Grant
    Filed: March 8, 1999
    Date of Patent: July 3, 2001
    Assignees: Nippon Aspherical Lens Co.,, Sony/Tektronix Corporation
    Inventors: Takahisa Jitsuno, Keiu Tokumara, Hisashi Tamamura
  • Patent number: 6130708
    Abstract: A waveform monitor receives HDTV and SDTV signals that are provided to a channel and an external trigger terminal respectively. An HDTV signal processor 14 produces a reference clock PCLK from the HDTV signal. A counter starts counting at the vertical sync signal of the SDTV signal and generates a trigger every time the count of the reference clock PCLK reaches a predetermined number (2,200, for example). This allows generation of a trigger signal which is phase locked to the vertical sync signal of the SDTV signal, and of which the frequency is the same as the horizontal line frequency of the HDTV signal. Therefore the waveform monitor can display the HDTV waveform line by line even though the HDTV and SDTV signals have different numbers of lines per field. The waveform monitor can be used to measure phase difference between television signals of difference formats, such as the HDTV and the SDTV.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: October 10, 2000
    Assignee: Sony/Tektronix Corporation
    Inventors: Tsuyoshi Kitagawa, Norihiko Sato
  • Patent number: 5637990
    Abstract: A power control apparatus for protecting an electrical circuit from excessive current and in particular for protecting it from a large and fast transition pulse caused by a rapid current polarity transition. At least two switching devices are coupled in series or in parallel between a power supply and a load. A gate signal is generated to change the switching devices from conductive state to nonconducting state in response to detection of an excessive current state. The gate signal is delayed by a predetermined period of time to change the switching devices into the nonconducting state after all of the switching devices are saturated so that the rapid current polarity transition is eliminated.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: June 10, 1997
    Assignee: Sony/Tektronix Corporation
    Inventors: Katsuhisa Kato, Toshihiko Onozawa, Tatsuya Murofushi, Toshikazu Matsuda
  • Patent number: 5619266
    Abstract: A liquid crystal shutter, mounted on the side of a lens in a video camera, includes a pair of polarizing filters with a liquid crystal cell between them. A pulse generator generates a pulse for a predetermined length of time that is synchronized with a vertical synchronizing signal of a television signal. A controller controls an electrical field of the liquid crystal shutter to allow light from an object to be transmitted through the liquid crystal shutter in response to the pulse. Such liquid crystal shutter, having no mechanical moving parts, is much more durable than a mechanical shutter and can be easily maintained. In addition, the shutter apparatus, because it is controlled electrically, can work at high speed and can be easily synchronized with other systems.
    Type: Grant
    Filed: January 23, 1995
    Date of Patent: April 8, 1997
    Assignees: Sony Corporation, Sony/Tektronix Corporation
    Inventors: Seijiro Tomita, Takashige Nabeshima
  • Patent number: 5598068
    Abstract: A plurality of LEDs are divided into multiple groups with the LEDs in each group being connected in series and being driven by a single current source. A region to be illuminated is divided into many areas with no spacing between adjacent ones of the areas. The LEDs in each group are positioned in different areas such that each area includes many LEDs from different groups. If one of the current sources and/or one of the LEDs of one group breaks down, the broken current source and/or LED does not affect the current sources and/or LEDs of the other groups.
    Type: Grant
    Filed: March 10, 1995
    Date of Patent: January 28, 1997
    Assignee: Sony/Tektronix Corporation
    Inventor: Kiyokazu Shirai
  • Patent number: 5596309
    Abstract: A coaxial type electrical resistor has a cylindrical conductor, a cylindrical insulator inserted into the opening of the conductor and a cylindrical resistor inserted into the opening of the insulator. Since the insulator is between the conductor and the resistor, a distance between the conductor and resistor may be small and magnetic flux leakage reduced. Thus the resistor has a small inductance and is appropriate as a high frequency large current resistor.
    Type: Grant
    Filed: July 22, 1994
    Date of Patent: January 21, 1997
    Assignee: Sony/Tektronix Corporation
    Inventors: Takashige Nabeshima, Katsuhisa Kato, Toshiaki Hidaka
  • Patent number: 5589952
    Abstract: A high resolution scanner apparatus has a disc upon which is mounted an original to be scanned. The disc may include a track for providing high accuracy tracing of the original. If the original is transparent, such as a photographic film, the disc may include a transparent first disc upon which the original is mounted and a second disc upon which a spiral track is provided, the first and second discs being mounted coaxially to rotate together. The discs may be compact or laser discs. A slide structure has at least a first arm for reading the original. The slide structure may include a second arm for tracing the track when included. The second arm may also include a light source for illuminating the original through the transparent first disc. The slide structure moves radially with respect to the discs, either using a precision controller or according to the tracing of the track by the second arm.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: December 31, 1996
    Assignee: Sony/Tektronix Corporation
    Inventors: Yasushi Sato, Kaname Kamibayashi
  • Patent number: 5568035
    Abstract: A variable-capacitance power supply apparatus has an inexpensive structure for variably supplying a desired high power to a load by selecting an appropriate total capacitance for storing charge. A number "n" (an arbitrary integer) of series-coupled capacitors each having capacitance C are independently charged to produce an appropriate output voltage. The total capacitance Cs of the series-coupled capacitors is obtained as Cs=C/n. The total charge Q stored in the series-coupled capacitors is proportional to the total capacitance Cs. The series-coupled capacitors are selectively charged to produce an appropriate output voltage and the desired high power to be supplied to the load.
    Type: Grant
    Filed: September 28, 1994
    Date of Patent: October 22, 1996
    Assignee: Sony/Tektronix Corporation
    Inventors: Katsuhisa Kato, Toshihiko Onozawa
  • Patent number: 5563541
    Abstract: A load current detection circuit restrains the generation of noise spikes with a minimum of circuitry when changing between current detection sensitivity ranges by providing a plurality of sensitivity resistors between the output of a voltage source, such as a negative feedback voltage amplifier, and a load. Sensitivity range changing is performed via switches that increase or decrease the number of sensitivity resistors between the voltage source and the load. When a current detection sensitivity change is commanded, a voltage difference across the sensitivity resistors is measured, and a control processor generates a control voltage for changing voltage difference gradually until the voltage difference is zero without changing the voltage across the load. The sensitivity range switching then occurs when no current flows through the sensitivity resistors so that no noise spikes are produced.
    Type: Grant
    Filed: May 11, 1995
    Date of Patent: October 8, 1996
    Assignee: Sony/Tektronix Corporation
    Inventors: Katsuhiro Koga, Hiroyuki Kano
  • Patent number: 5455502
    Abstract: A power control circuit for replacing a current limiting fuse in an electrical protection circuit or for switching large currents rapidly has an array of transistors, each having an identical characteristic to each other and to a device under test, to provide parallel current paths. All of the rows of the transistor array are biased "on" except for a predetermined row. A gate signal is generated to control the "on/off" state of the transistors in the predetermined row, the gate signal being a function of the presence of excessive current--holding the predetermined row of transistors biased "on" in normal operation, and turning the predetermined row of transistors "off" when excessive current is detected.
    Type: Grant
    Filed: September 7, 1994
    Date of Patent: October 3, 1995
    Assignee: Sony/Tektronix Corporation
    Inventors: Katsuhisa Kato, Toshihiko Onozawa
  • Patent number: 5424667
    Abstract: A DDS type variable frequency signal generator generates a jitter free and stable output signal regardless of the address interval. If the total number of addressable memory locations of a memory storing digital data is divisible without remainder by an initial address interval, then the memory is read every initial address interval with a clock signal of a predetermined frequency. If the total number of addressable memory locations is not divisible without remainder by the initial address interval, then the address interval is modified to a value that is divisible without remainder into the total number of addressable memory locations and the clock frequency is modified in accordance with this modification of the address interval. The memory is read every modified address interval with the modified clock signal.
    Type: Grant
    Filed: October 15, 1992
    Date of Patent: June 13, 1995
    Assignee: Sony/Tektronix Corporation
    Inventors: Ryoichi Sakai, Iwao Akiyama, Yasumasa Fujisawa
  • Patent number: 5373309
    Abstract: A variable under operator control is set to a desired value by taking a pause when the value of the variable has been modified such that it would surpass the desired value. Upon meeting the desired value, the value of the variable is set to the desired value for the duration of a pause period, during which the value of the variable remains fixed regardless of further attempts to modify the variable. Therefore, even if the operator is careless, the variable does not pass over the desired values. The variable may represent a voltage or current, or the position of a cursor.
    Type: Grant
    Filed: December 3, 1992
    Date of Patent: December 13, 1994
    Assignee: Sony/Tektronix Corporation
    Inventors: Masatoshi Totsuka, Tohru Takai
  • Patent number: 5319303
    Abstract: A current source consists of a transistor having an emitting electrode connected to one end of a first resistor and a first operational amplifier that compares the voltage of the emitting electrode with a control voltage and controls a control electrode of the transistor through a second resistor. The voltage at the emitting electrode of the transistor is kept at a predetermined voltage by a second operational amplifier that compares the voltage at the emitting electrode with the predetermined voltage and controls the voltage at the other end of the first resistor. The control voltage source has a known source resistance. A third resistor is inserted between the non-inverting input and output terminals of the first operational amplifier. The second operational amplifier serves to make the maximum output voltage at the collecting electrode of the transistor high so that a power voltage usage efficiency of an electronic load is improved.
    Type: Grant
    Filed: November 14, 1992
    Date of Patent: June 7, 1994
    Assignee: Sony/Tektronix Corporation
    Inventor: Koichi Yamada
  • Patent number: 5011265
    Abstract: An optical attenuator includes a first beam splitter for receiving an incident light beam from a light source at a predetermined angle of incidence and splitting it into a first reflected light beam and a first transmitted light beam, and a second beam splitter for receiving the first reflected light beam at the same predetermined angle of incidence and splitting it into a second refelected light beam and a second transmitted light beam. The first and second beam splitters are arranged such that the planes of incidence of the first and second beam splitters are perpendicular to each other. The optical attenuator further includes a first deflector for deflecting the first transmitted light beam to cause the deflected light to be propagated in other than the incident direction of the first transmitted light beam. A second deflector is also provided to deflect the second transmitted light beam to cause the deflected light to be propagated in other than the incident direction of the second transmitted light beam.
    Type: Grant
    Filed: February 7, 1990
    Date of Patent: April 30, 1991
    Assignee: Sony/Tektronix Corporation
    Inventors: Hisashi Tamamura, Shoji Sekiguchi
  • Patent number: 4818934
    Abstract: An electronic device measurement apparatus measures a characteristic of an electronic device under test (DUT) by applying a smoothly changing voltage from one terminal of a voltage supply to an ungrounded terminal of the DUT and detecting a current flowing through the DUT. The current flowing through the DUT does not include a looping error component. A current detection resistor is connected between another terminal of the voltage supply and a grounded terminal of the DUT. Since the voltage applied to the DUT is a sine squared wave voltage, the pure current flowing through the DUT is detected by detcting cosine-wave and sine-wave components from the ungrounded terminal of the DUT and obtaining the difference between the voltage across the current detection resistor and the cosine-wave and sine-wave components.
    Type: Grant
    Filed: January 5, 1988
    Date of Patent: April 4, 1989
    Assignee: Sony/Tektronix Corporation
    Inventor: Hisashi Tamamura
  • Patent number: 4736189
    Abstract: The phase relation of clock signals to be applied to an interleave type analog-to-digital conversion apparatus having N analog-to-digital converters is calibrated by applying a repetitive reference signal to the N analog-to-digital converters. The digital values from the N analog-to-digital converters are selected at corresponding sampling points of successive cycles of the reference signal. The clock phase relation is adjusted such that the selected digital values are made substantially equal to each other.
    Type: Grant
    Filed: October 8, 1986
    Date of Patent: April 5, 1988
    Assignee: Sony/Tektronix Corporation
    Inventors: Hiromi Katsumata, Rikichi Murooka, Takeko Yumoto
  • Patent number: 4727318
    Abstract: An electronic device measurement apparatus measures a characteristic of an electronic device under test (DUT) by applying a sine-wave voltage to the DUT, detecting the voltage across the DUT as well as the current flowing through the DUT and displaying a characteristic curve in accordance with the detected voltage and current. The sine-wave voltage is generated in phase with an AC line voltage but the amplitude thereof is independent of the line voltage, and consequently the circuits in the measurement apparatus are not affected by variations in phase and amplitude in the line. Moreover, the generated sine-wave voltage is symmetrical, whereby display distortion is substantially eliminated. A voltage limiter and a current limiter are provided for limiting the voltage and current to be applied to the DUT to values determined by a display window, for protecting a current detecting resistor and a voltage divider connected to the DUT.
    Type: Grant
    Filed: September 27, 1985
    Date of Patent: February 23, 1988
    Assignee: Sony/Tektronix Corporation
    Inventors: Ryoichi Sakai, Hisashi Tamamura