Patents Assigned to STMicroelectronics (Crolles 2)
  • Publication number: 20230260574
    Abstract: Memory devices such as phase change memory (PCM) devices utilizing Ovonic Threshold Switching (OTS) selectors may be used to fill the gap between dynamic random-access memory (DRAM) and mass storage and may be incorporated in high-end microcontrollers. Since the programming efficiency and reading phase efficiency of such devices is directly linked to the leakage current of the OTS selector as well as sneak-path management, a sense amplifier disclosed herein generates an auto-reference that takes into account the leakage currents of unselected cells and includes a regulation loop to compensate for voltage drop due to read current sensing. This auto-referenced sense amplifier, built utilizing the principle of charge-sharing, may be designed on a 28 nm fully depleted silicon-on-insulator (FDSOI) technology, provides robust performance for a wide range of sneak-path currents and consequently for a large range of memory array sizes, and is therefore suitable for use in embedded memory in high-end microcontroller.
    Type: Application
    Filed: February 16, 2022
    Publication date: August 17, 2023
    Applicants: Universite D'Aix Marseille, Centre National De La Recherche Scientifique, STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Rousset) SAS
    Inventors: Jean-Michel PORTAL, Vincenzo DELLA MARCA, Jean-Pierre WALDER, Julien GASQUEZ, Philippe BOIVIN
  • Publication number: 20230263082
    Abstract: An integrated circuit includes a substrate with an active area, a first insulating layer, a second insulating layer, and a phase-change material. The integrated circuit further includes a heating element in an L-shape, with a long side in direct physical contact with the phase-change material and a short side in direct physical contact with a via. The heating element is surrounded by first, second, and third insulating spacers, with the first insulating spacer having a planar first sidewall in contact with the long side of the heating element, a convex second sidewall, and a planar bottom face in contact with the short side of the heating element. The second and third insulating spacers are in direct contact with the first insulating spacer and the long side of the heating element.
    Type: Application
    Filed: April 3, 2023
    Publication date: August 17, 2023
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Rousset) SAS
    Inventors: Franck ARNAUD, David GALPIN, Stephane ZOLL, Olivier HINSINGER, Laurent FAVENNEC, Jean-Pierre ODDOU, Lucile BROUSSOUS, Philippe BOIVIN, Olivier WEBER, Philippe BRUN, Pierre MORIN
  • Publication number: 20230258498
    Abstract: An imaging device includes a first layer made of quantum dots and a second layer including at least two filter regions extending over the first layer. The at least two filter regions are configured to transmit distinct wavelengths. The quantum dots of the first layer are configured to generate charges upon reception of light in the distinct wavelengths.
    Type: Application
    Filed: February 10, 2023
    Publication date: August 17, 2023
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics, Inc.
    Inventors: Jonathan STECKEL, Andras G. PATTANTYUS-ABRAHAM
  • Publication number: 20230260835
    Abstract: A method of manufacturing a contact on a semiconductor region includes a step of forming a stack of layers on lateral walls and at a bottom of an orifice (aligned with the semiconductor region) crossing a dielectric region along a longitudinal direction. The step of forming step is carried out from a first surface of the dielectric region and includes forming a polysilicon layer and a layer of a first metal in contact with the polysilicon layer. The first metal is preferably a metal selected from the group of transition metals and is well suited to forming with the polysilicon layer a metal silicide. The method further includes a step of performing thermal anneal causing a reaction between the first metal and the polysilicon layer to produce a layer of metal silicide. At least a portion of that layer of metal silicide extends in the longitudinal direction of the orifice.
    Type: Application
    Filed: February 14, 2023
    Publication date: August 17, 2023
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Christian RIVERO, Pascal FORNARA
  • Patent number: 11725998
    Abstract: A method includes collecting, at a building opening, air pressure signals from a pressure sensor and sound signals from a sound sensor. The method also includes sensing pressure peaks occurring in the air pressure signals and sensing sound pulses occurring in the sound signals. A joint occurrence of a pressure peak in the air pressure signals and a sound pulse in the sound signals is indicative of an opening/closing event of the building opening.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: August 15, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Saverio Grutta, Enrico Rosario Alessi
  • Patent number: 11726514
    Abstract: An active compensation circuit for compensating the stability of a regulator is provided. The active compensation circuit presents an equivalent capacitance and an equivalent resistance and compensates stability of system using the equivalent capacitance and the equivalent resistance. The regulator includes a power transistor that receives a driving signal and channelize the required current to the Ips driven by this block. The regulator's stability is compensated using the active compensation circuit to provide an accurate output voltage without significantly compromising the accuracy (load regulation) and area of the system.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: August 15, 2023
    Assignee: STMicroelectronics International N.V.
    Inventors: Shashwat, Rajesh Narwal
  • Patent number: 11726543
    Abstract: Systems and devices are provided to enable granular control over a retention or active state of each of a plurality of memory circuits, such as a plurality of memory cell arrays, within a memory. Each respective memory array of the plurality of memory arrays is coupled to a respective ballast driver and a respective active memory signal switch for the respective memory array. One or more voltage regulators are coupled to a ballast driver gate node and to a bias node of at least one of the respective memory arrays. In operation, the respective active memory signal switch for a respective memory array causes the respective memory array to transition between an active state for the respective memory array and a retention state for the respective memory array.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: August 15, 2023
    Assignees: STMICROELECTRONICS S.r.l., STMicroelectronics International N.V.
    Inventors: Nitin Chawla, Anuj Grover, Giuseppe Desoli, Kedar Janardan Dhori, Thomas Boesch, Promod Kumar
  • Patent number: 11726140
    Abstract: In an embodiment, a method for performing scan includes: entering scan mode; receiving a test pattern; applying the test pattern through a first scan chain by asserting and deasserting a scan enable signal to respectively perform shift and capture operations to the first scan chain; while applying the test pattern through the first scan chain, controlling a further scan flip-flop with the first scan chain without transitioning a further scan enable input of the further scan flip-flop; and evaluating an output of the first scan chain to detect faults.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: August 15, 2023
    Assignee: STMicroelectronics International N.V.
    Inventors: Venkata Narayanan Srinivasan, Shiv Kumar Vats, Tripti Gupta
  • Patent number: 11724932
    Abstract: A method for making an integrated micro-electromechanical device includes forming a first body of semiconductor material having a first face and a second face opposite the first face. The first body includes a buried cavity forming a diaphragm delimited between the buried cavity and the first face. The diaphragm is monolithic with the first body. The method further includes forming at least one first magnetic via extending between the second face and the buried cavity of the first body, forming a first magnetic region extending over the first face of the first body, and forming a first coil extending over the second face of the first body and being magnetically coupled to the first magnetic via.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: August 15, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Pagani, Alessandro Motta
  • Patent number: 11728621
    Abstract: An electronic device includes laser emitters, and a laser driver generating a laser drive signal for the laser emitters based upon a feedback control signal. A steering circuit selectively steers the laser drive signal to a different selected one of the plurality of laser emitters and prevents the laser drive signal from being steered to non-selected ones of the plurality of laser emitters, during each of a plurality of time periods. Control circuitry senses a magnitude of a current of the laser drive signal and generates the feedback control signal based thereupon. The feedback control signal is generated so as to cause the laser driver to generate the laser drive signal as having a current with a substantially constant magnitude.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: August 15, 2023
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventor: John Kevin Moore
  • Patent number: 11728422
    Abstract: A power MOSFET device includes an active area accommodating a first body region and a second body region having a first and, respectively, a second conductivity value. The second value is higher than the first value. A first channel region is disposed in the first body region between a first source region and a drain region, and the first channel region has and having a first channel length. A second channel region is disposed in the second body region between a second source region and the drain region, and the second channel region has and having a second channel length smaller than the first channel length. A first device portion, having a first threshold voltage, includes the first channel region, and a second device portion, having a second threshold voltage higher than the first threshold voltage, includes the second channel region.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: August 15, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Angelo Magri', Stefania Fortuna
  • Patent number: 11727719
    Abstract: An electronic device includes a depth sensor and an inertial measurement unit. The electronic device detects a presence of the user of the electronic device by analyzing a combination of inertial sensor signals from the inertial measurement unit and depth sensor signals from the depth sensor.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: August 15, 2023
    Assignee: STMicroelectronics, Inc.
    Inventors: Xiaoyong Yang, Kalyan-Kumar Vadlamudi-Reddy
  • Patent number: 11726542
    Abstract: In an embodiment, an electronic circuit includes: a supply management circuit for receiving an input supply voltage and providing a first supply voltage; and a main circuit configured to: when the input supply voltage becomes higher than a first threshold, cause the electronic circuit to transition into an initialization state in which an oscillator is enabled and configuration data is copied from an NVM to configuration registers, and then to transition into a standby state in which the oscillator is disabled and content of the configuration registers is preserved by the first supply voltage, and, upon reception of a wakeup event, cause the configuration data from the configuration registers to be applied to the first circuit, and cause the electronic circuit to transition into an active state in which the first oscillator is enabled and the first circuit is configured to operate based on the configuration data.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: August 15, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Vincenzo Polisi, CalogeroAndrea Trecarichi
  • Publication number: 20230253519
    Abstract: A carrier substrate is configured to carry at least one electronic chip and includes a mounting front face. An encapsulating cover is mounted on the front face of the carrier substrate through a mounting. This mounting includes at least one seating surface through which the cover and the carrier substrate make contact. At least one adhesive bead is located elsewhere than the seating surface in order to securely fasten the encapsulation cover and the carrier substrate.
    Type: Application
    Filed: April 19, 2023
    Publication date: August 10, 2023
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: Karine SAXOD, Nicolas MASTROMAURO
  • Publication number: 20230251556
    Abstract: Disclosed herein is a microelectromechanical device that features a fixed structure defining a cavity, a tiltable structure elastically suspended within the cavity, and a piezoelectrically driven actuation structure that rotates the tiltable structure about a first rotation axis. The actuation structure includes driving arms with piezoelectric material, elastically coupled to the tiltable structure by decoupling elastic elements that are stiff to out-of-plane movements but compliant to torsional movements. The tiltable structure is elastically coupled to the fixed structure at the first rotation axis using elastic suspension elements, while the fixed structure forms a frame surrounding the cavity with supporting elements. A lever mechanism is coupled between a supporting element and a driving arm.
    Type: Application
    Filed: April 14, 2023
    Publication date: August 10, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Nicolo' BONI, Roberto CARMINATI, Massimiliano MERLI
  • Publication number: 20230251829
    Abstract: A first multiplier multiplies a first input with a first coefficient and a first adder sums an output of the first multiplier and a second input to generate a first output. A second multiplier multiplies a third input with a second coefficient, a third multiplier multiplies a fourth input with a third coefficient, and a second adder sums outputs of the second and third multipliers to generate a second output. The second and third inputs are derived from the first output and the first and fourth inputs are derived from the second output. The first and second outputs generate digital values for first and second digital sinusoids, respectively.
    Type: Application
    Filed: April 14, 2023
    Publication date: August 10, 2023
    Applicant: STMicroelectronics International N.V.
    Inventors: Ankur BAL, Rupesh SINGH
  • Publication number: 20230252258
    Abstract: A contactless communication device includes an electronic integrated circuit chip and an antenna coupled to the electronic integrated circuit chip to supply an electric signal for powering the electronic integrated circuit chip. An ambient luminosity detection element is coupled to the electronic integrated circuit chip. An ambient luminosity level measured by the ambient luminosity detection element is supplied to the electronic integrated circuit chip for comparison to a darkness threshold. A contactless communication is authorized only when the measured ambient luminosity level is greater than the darkness threshold.
    Type: Application
    Filed: February 8, 2023
    Publication date: August 10, 2023
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: Nicolas CORDIER
  • Publication number: 20230251926
    Abstract: A processing system includes configuration registers and a non-volatile memory with memory slots storing configuration data bits and error detection bits. A hardware configuration circuit sequentially reads the data bits from the non-volatile memory for storage in respective configuration registers by: receiving bits from a current memory slot; selectively asserting an error signal in response to comparison of received error detection bits with calculated error detection bits; storing the received bits to temporary registers where the error signal deasserted and other otherwise asserting a further error signal where the error signal is asserted. Otherwise, predetermined configuration data is stored to the temporary registers. The content of the temporary registers is then sequentially stored to the configuration registers. A reset signal is generated in response to the further error signal to reset the configuration registers.
    Type: Application
    Filed: February 6, 2023
    Publication date: August 10, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Gianluca TORTORA, Mario BARONE
  • Publication number: 20230249960
    Abstract: This disclosure pertains to a microelectromechanical systems (MEMS) device with a tiltable structure, a fixed supporting structure, and an actuation structure with driving arms connected to the tiltable structure by elastic decoupling elements. Described herein, particularly, is a planar stop structure between the driving arms and the tiltable structure, which functions to limit movement in the tiltable plane. This stop structure includes a first projection/abutment surface pair formed by a projection extending from a driving arm and an abutment surface formed by a recess in the tiltable structure. The projection and abutment surface are adjacent and spaced apart in the device's rest condition.
    Type: Application
    Filed: April 13, 2023
    Publication date: August 10, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Nicolo' BONI, Roberto CARMINATI, Massimiliano MERLI
  • Publication number: 20230253213
    Abstract: The present disclosure is directed to a lead frame including a die pad with cavities, and methods for attaching a semiconductor die to the lead frame. The cavities allow for additional adhesive to be formed on the die pad at the corners of the semiconductor die, and prevent the additional adhesive from overflowing on to active areas of the semiconductor die.
    Type: Application
    Filed: April 19, 2023
    Publication date: August 10, 2023
    Applicant: STMicroelectronics, Inc.
    Inventors: Rennier RODRIGUEZ, Maiden Grace MAMING, Jefferson Sismundo TALLEDO