Patents Assigned to Sumitomo Electric Industries Co., Ltd.
  • Patent number: 11965801
    Abstract: A measurement system includes a measurement device including a light source, and a first power meter, and one or a plurality of connection members each configured to optically connect a pair of optical fiber lines of the plurality of optical fiber lines. A first optical fiber line of the pair of optical fiber lines includes a first end and a second end, a second optical fiber line of the pair of optical fiber lines includes a third end and a fourth end, the one or plurality of connection members optically connect the second end to the fourth end, the light source causes testing light to be incident on the first end, and the first power meter measures first intensity of first output light output from the third end by causing the testing light to propagate through the pair of optical fiber lines.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: April 23, 2024
    Assignees: SUMITOMO ELECTRIC OPTIFRONTIER CO., LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Kazuya Masuda, Tomohiko Ueda, Kenichiro Otsuka, Tsuneari Ito, Tetsufumi Tsuzaki, Yoshifumi Hishikawa, Hitoshi Hatayama
  • Publication number: 20240103235
    Abstract: An optical connector includes a ferrule, a ferrule holder, a housing, and an anti-rotation structure. The ferrule includes a through hole that extends in a first direction and holds an optical fiber inside the through hole. The ferrule holder is disposed on the outer periphery of the ferrule and is fixed to the ferrule. The anti-rotation structure is provided inside the housing and outside the ferrule, and prevents rotation of the ferrule about an axis with the ferrule holder. The ferrule holder includes a tubular holder main body that accommodates the ferrule therein, and a flange part that protrudes outward from the outer periphery of the holder main body. The flange part includes a configuration to fit with the anti-rotation structure. A center of the flange part in the first direction is located in a central region of the ferrule in the first direction.
    Type: Application
    Filed: February 21, 2022
    Publication date: March 28, 2024
    Applicants: SUMITOMO ELECTRIC OPTIFRONTIER CO., LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masayuki YAMAZAKI, Masakazu SHIGEHARA
  • Patent number: 6681072
    Abstract: An optical fiber comprising a core region 100 doped with Cl which raises the refractive index; and a cladding region 200, provided at the outer periphery of the core region 100, having a cladding layer 201 doped with F which lowers the refractive index is formed. The cladding region 201 to become the outermost cladding layer is configured such that the doping amount of F successively decreases within an outer peripheral part 205 including the outer periphery thereof to a predetermined doping amount which is the minimum doping amount of F within the cladding layer 201. Therefore, the stress within the optical fiber is dispersed into the outer peripheral part 205 having an enhanced viscosity, whereby the stress concentration into the core is suppressed. Since the favorable tension range at the time of drawing the optical fiber becomes wider at this time, tension control is facilitated.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: January 20, 2004
    Assignee: Sumitomo Electric Industries Co., Ltd.
    Inventors: Katsuya Nagayama, Kiichiro Kawasaki, Takatoshi Kato
  • Patent number: 6597846
    Abstract: An optical fiber (1) which does not readily suffer influences of side pressures and can realize superior transmission characteristics, having a glass part (2, 3) having a core (2) and at least one cladding (3) and at least one covering layer (4a, 4b) formed around the glass part (2, 3), characterized in that the Young's modulus at 23° C. of the covering layer (4) without the glass part (2, 3) is not greater than 400 MPa. The Young's modulus measurement of the covering layer (4) is obtained by removing the glass part (2, 3) from the optical fiber (1) and putting the covering layer (4) to a tensile test.
    Type: Grant
    Filed: May 8, 2001
    Date of Patent: July 22, 2003
    Assignee: Sumitomo Electric Industries Co., Ltd.
    Inventors: Takashi Fujii, Toshifumi Hosoya, Kenji Tamano, Keiichiro Fukuda, Eisuke Sasaoka, Shigeru Tanaka, Kohei Kobayashi
  • Patent number: 5851599
    Abstract: A battery electrode substrate which is constituted of a porous metallic body structure having communicating pores at a porosity of at least 90% and an Fe/Ni multilayer structure wherein the skeletal portion of the porous metallic body is composed mainly of Fe and has an Ni covering layer on the surface thereof while pores communicating with the inside and outside of Fe skeletal portion exist in the Fe skeletal portion and the inside of the pores is covered with Ni. The electrode substrate is produced by applying an iron oxide powder of at most 20 .mu.m in an average particle size on a porous resin core body; heat treating the core to remove an organic resin component while simultaneously sintering Fe to obtain a porous Fe body; and then covering the Fe skeletal portion with Ni by electroplating. In this process, the iron oxide can be used in combination with carbon powder. Further, a nickel porous sintered body can also be produced using nickel oxide in place of iron oxide.
    Type: Grant
    Filed: September 20, 1996
    Date of Patent: December 22, 1998
    Assignees: Sumitomo Electric Industries Co., Ltd., Matsushita Electric Industrial Co., Ltd.
    Inventors: Keizo Harada, Kenichi Watanabe, Shosaku Yamanaka, Kiyoshi Hayashi, Nobuyasu Morishita, Hiroki Takeshima, Hideo Kaiya, Munehisa Ikoma
  • Patent number: 5656077
    Abstract: A method of preparing a compound semiconductor crystal in a crucible involves first forming a boron or boron compound containing layer on an inner surface of the crucible and heat treating the same to form a B.sub.2 O.sub.3 containing layer. The resulting preheated crucible is then employed for preparing the compound semiconductor crystal. By pretreating the crucible in this manner, it is possible to previously form a homogenous B.sub.2 O.sub.3 film on the crucible interior surface while preventing incomplete and heterogeneous coating of the B.sub.2 O.sub.3 film. Consequently, it is possible to prevent a raw material melt from wetting the crucible interior surface and thus to suppress polycrystallization, thereby preparing a compound semiconductor single crystal with an excellent yield.
    Type: Grant
    Filed: July 18, 1995
    Date of Patent: August 12, 1997
    Assignee: Sumitomo Electric Industries, Co., Ltd.
    Inventor: Tomohiro Kawase
  • Patent number: 5451122
    Abstract: A chip collector is proposed which can collect chips efficiently and which is easy to maintain and allows replacement of throwaway inserts without removing the cutting tool from a spindle of a machine tool. The cylindrical casing is divided into two casing halves, one of which is pivotable from the other around a hinge. The chip collector is provided with a sub-chamber connected to a chip suction port and a discharge duct connected to the sub-chamber. Also, a face milling cutter used in combination with the chip collector is proposed.
    Type: Grant
    Filed: October 4, 1994
    Date of Patent: September 19, 1995
    Assignee: Sumitomo Electric Industries Co., Ltd.
    Inventors: Mitsuaki Noda, Akio Nakamura, Katsutoshi Yamane