Patents Assigned to Tamura Corporation
  • Publication number: 20240379881
    Abstract: A semiconductor substrate includes at least one main surface as a crystal growth base surface, and a gallium oxide-based semiconductor single crystal. The growth base surface is a (001) plane. An off angle in a [010] direction in a continuous region of not less than 70 area % of the growth base surface is in a range of more than ?0.3° and not more than ?0.01°, or in a range of not less than 0.01° and less than 0.3°. An off angle in a [001] direction in the region of the growth base surface is in a range of not less than ?1° and not more than 1°. The semiconductor substrate has a diameter of not less than 2 inches.
    Type: Application
    Filed: August 3, 2022
    Publication date: November 14, 2024
    Applicants: Tamura Corporation, Novel Crystal Technology, Inc.
    Inventors: Akio TAKATSUKA, Kohei SASAKI
  • Publication number: 20240355621
    Abstract: A semiconductor substrate includes at least one main surface as a crystal growth base surface, and a gallium oxide-based semiconductor single crystal. The growth base surface is a (001) plane. An off angle in a [010] direction in a continuous region of not less than 70 area % of the growth base surface is in a range of more than ?0.3° and not more than ?0.01°, or in a range of not less than 0.010 and less than 0.3°. An off angle in a [001] direction in the region of the growth base surface is in a range of not less than ?1° and not more than 1°. The semiconductor substrate has a diameter of not less than 2 inches.
    Type: Application
    Filed: August 3, 2022
    Publication date: October 24, 2024
    Applicants: TAMURA CORPORATION, Novel Crystal Technology, Inc.
    Inventors: Kohei SASAKI, Chia-Hung LIN
  • Publication number: 20240343866
    Abstract: The present disclosure is related to providing a polyamic acid that can form a polyimide exhibiting a low dielectric property and high heat resistance and that has good film formability, and a polyamic acid composition, polyimide, polyimide film, and printed circuit board that are produced by using this polyamic acid. A polyamic acid that is a product obtained by polyaddition reaction between a tetracarboxylic dianhydride (A) and at least two diamines (B), wherein the at least two diamines (B) contain a diamine having a fluorene skeleton (B1) and a dimer diamine (B2).
    Type: Application
    Filed: March 14, 2024
    Publication date: October 17, 2024
    Applicant: TAMURA CORPORATION
    Inventors: Taiki ENDO, Atsushi HORI
  • Publication number: 20240327575
    Abstract: The present disclosure is related to providing a polyamic acid that can form a polyimide exhibiting a low dielectric property and a low hygroscopic property, and a polyamic acid composition, polyimide, polyimide film, and printed circuit board that are produced by using the polyamic acid. A polyamic acid that is a product obtained by polyaddition reaction between an ester-type acid dianhydride (A) and at least two diamines (B), wherein a dimer diamine (B1) is contained at a molar ratio of 0.3 or more relative to an entirety of the diamine component.
    Type: Application
    Filed: March 14, 2024
    Publication date: October 3, 2024
    Applicant: TAMURA CORPORATION
    Inventors: Atsushi HORI, Taiki ENDO
  • Patent number: 12104276
    Abstract: Provided is a Ga2O3-based single crystal substrate capable of achieving a high processing yield. A Ga2O3-based single crystal substrate having a crack density of less than 0.05 cracks/cm can be obtained that has as a principal surface thereof a surface rotated 10-150° from the (100) plane, when a rotation direction from the (100) plane to the (001) plane via the (101) plane is defined as positive, having the [010] axis as the rotation axis.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: October 1, 2024
    Assignee: TAMURA CORPORATION
    Inventor: Kohei Sasaki
  • Patent number: 12087856
    Abstract: A field-effect transistor includes an n-type semiconductor layer that includes a Ga2O3-based single crystal and a plurality of trenches opening on one surface, a gate electrode buried in each of the plurality of trenches, a source electrode connected to a mesa-shaped region between adjacent trenches in the n-type semiconductor layer, and a drain electrode directly or indirectly connected to the n-type semiconductor layer on an opposite side to the source electrode.
    Type: Grant
    Filed: February 8, 2023
    Date of Patent: September 10, 2024
    Assignees: Tamura Corporation, Novel Crystal Technology, Inc.
    Inventor: Kohei Sasaki
  • Patent number: 11984879
    Abstract: A drive circuit is provided. When the switching element is in turn-on state and a collector-emitter voltage of the switching element is equal to or higher than a first predetermined voltage value, the first diode is turned on; the first transistor and the second transistor are turned on; and, after a mask time in which a first capacitor is started to be charged with a current from a current source and a voltage value at two ends becomes equal to or higher than a second predetermined voltage value higher than the first predetermined voltage value, an abnormality detection signal is output to the control unit. The control unit stops an output of the pulse signal to the switching element in response to the abnormality detection signal.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: May 14, 2024
    Assignee: TAMURA CORPORATION
    Inventors: Hisashi Shibata, Tomohiko Yoshino, Hiroo Ogawa
  • Patent number: 11982016
    Abstract: As one embodiment, the present invention provides a method for growing a ?-Ga2O3-based single crystal film by using HYPE method. The method includes a step of exposing a Ga2O3-based substrate to a gallium chloride-based gas and an oxygen-including gas, and growing a ?-Ga2O3-based single crystal film on a principal surface of the Ga2O3-based substrate at a growth temperature of not lower than 900° C.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: May 14, 2024
    Assignees: Tamura Corporation, National University Corporation Tokyo University of Agriculture and Technology
    Inventors: Ken Goto, Kohei Sasaki, Akinori Koukitu, Yoshinao Kumagai, Hisashi Murakami
  • Publication number: 20240105859
    Abstract: A Schottky barrier diode includes a semiconductor layer of a first conductivity type including a wide-bandgap semiconductor and a trench defining a mesa portion on a first surface thereof, a high-resistance region under the trench of the semiconductor layer, the high-resistance region including an impurity of a second conductivity type different from the first conductivity type, an insulating film or a semiconductor film of the second conductivity type, the insulating film or semiconductor film covering at least a bottom surface among inner surfaces of the trench, an anode electrode on the semiconductor layer through the insulating film or the semiconductor film, the anode electrode being connected to the mesa portion, and a cathode electrode directly or through another layer on a second surface of the semiconductor layer on the opposite side to the first surface.
    Type: Application
    Filed: July 28, 2023
    Publication date: March 28, 2024
    Applicants: TAMURA CORPORATION, Novel Crystal Technology, Inc.
    Inventor: Fumio OTSUKA
  • Patent number: 11923464
    Abstract: A Schottky barrier diode includes a semiconductor layer including a Ga2O3-based single crystal, an anode electrode that forms a Schottky junction with the semiconductor layer and is configured so that a portion in contact with the semiconductor layer includes Mo or W, and a cathode electrode. A turn-on voltage thereof is not less than 0.3 V and not more than 0.5 V.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: March 5, 2024
    Assignees: Tamura Corporation, Novel Crystal Technology, Inc.
    Inventors: Kohei Sasaki, Daiki Wakimoto, Yuki Koishikawa, Quang Tu Thieu
  • Publication number: 20240066638
    Abstract: A solder alloy includes 45 mass % or more and 63 mass % or less of Bi, 0.1 mass % or more and less than 0.7 mass % of Sb, 0.05 mass % or more and 1 mass % or less of In, and a balance including Sn.
    Type: Application
    Filed: June 28, 2023
    Publication date: February 29, 2024
    Applicant: TAMURA CORPORATION
    Inventors: Takanori SHIMAZAKI, Daisuke MARUYAMA, Genki OCHI, Masaya ARAI
  • Patent number: 11855612
    Abstract: A high-side driver circuit is a circuit that drives a power semiconductor switch. The high-side driver circuit comprises a main switch N-channel MOSFET that has a drain terminal that is connected to a plus-side Vdc of a power supply and has a source terminal that is connected to an OUT terminal for a signal that drives the power semiconductor switch, a charge storage circuit that stores charge from the Vdc, and a voltage detection-capable switch that detects the voltage difference between an output terminal of the charge storage circuit and the Vdc and, upon detecting that the output terminal voltage of the charge storage circuit is at least a specific voltage higher than the voltage of a plus-side Vcc of the power supply, applies part or all of the output voltage of the charge storage circuit to a gate terminal of the main switch N-channel MOSFET.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: December 26, 2023
    Assignee: TAMURA CORPORATION
    Inventor: Hiroo Ogawa
  • Patent number: 11842836
    Abstract: A reactor capable of suppressing a deformation of a resin material in a gap between partial cores is provided. This reactor includes: a core that includes T-shaped cores which are at least a pair of partial cores disposed via the gap therebetween; a coil attached to respective parts of the T-shaped cores; and a core casing that is a core molding member which is formed integrally by a resin material and which covers the T-shaped cores. The core casing includes the coupling portion that is provided between the T-shaped cores at a location corresponding to the gap, and the coupling portion is provided with a through-hole, and a pair of connection portions which face with each other across the through-hole and which connects a space between the T-shaped cores.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: December 12, 2023
    Assignee: TAMURA CORPORATION
    Inventors: Kotaro Suzuki, Yasuhiro Uekusa
  • Publication number: 20230395732
    Abstract: A Schottky barrier diode includes an n-type semiconductor layer including a gallium oxide-based semiconductor, an insulating film including SiO2 and covering a portion of an upper surface of the n-type semiconductor layer, and an anode electrode which is connected to the upper surface of the n-type semiconductor layer to form a Schottky junction with the n-type semiconductor layer and at least a portion of an edge of which is located on the insulating film. The insulating film further includes a first layer in contact with the n-type semiconductor layer and a second layer on the first layer. A refractive index of the first layer is lower than a refractive index of the second layer.
    Type: Application
    Filed: June 1, 2023
    Publication date: December 7, 2023
    Applicants: TAMURA CORPORATION, Novel Crystal Technology, Inc.
    Inventors: Shinya YAMAGUCHI, Akio TAKATSUKA
  • Publication number: 20230395731
    Abstract: A Schottky barrier diode includes an n-type semiconductor layer including a gallium oxide-based semiconductor, an insulating film including SiO2 and covering a portion of an upper surface of the n-type semiconductor layer, and an anode electrode which is connected to the upper surface of the n-type semiconductor layer to form a Schottky junction with the n-type semiconductor layer and at least a portion of an edge of which is located on the insulating film. The insulating film further includes a first layer in contact with the n-type semiconductor layer and a second layer on the first layer. A refractive index of the first layer is lower than a refractive index of the second layer. The n-type semiconductor layer further includes a guard ring surrounding a junction with the anode electrode.
    Type: Application
    Filed: June 1, 2023
    Publication date: December 7, 2023
    Applicants: TAMURA CORPORATION, Novel Crystal Technology, Inc.
    Inventors: Shinya YAMAGUCHI, Yuki UCHIDA, Daiki WAKIMOTO, Akio TAKATSUKA
  • Publication number: 20230323198
    Abstract: A wavelength conversion member includes a support, and a wavelength conversion layer that includes a phosphor particle group and a sealing member to seal the phosphor particle group and that is provided directly or through an other layer on the support. A predetermined region, in which a cross-sectional area rate of the phosphor particle group is not less than 50%, is included in an arbitrary cross section of the wavelength conversion layer taken parallel to a thickness direction thereof. The predetermined region includes a rectangular region with a width of 700 ?m and a thickness of 50 ?m from a bottom surface of the wavelength conversion layer when a thickness of the wavelength conversion layer is not less than 50 ?m, or a rectangular region with a width of 700 ?m and a thickness equal to the thickness of the wavelength conversion layer when it is less than 50 ?m.
    Type: Application
    Filed: September 30, 2020
    Publication date: October 12, 2023
    Applicants: TAMURA CORPORATION, NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Daisuke INOMATA, Rikiya SUZUKI, Yusuke ARAI, Yoshihiro YAMASHITA, Hiroyuki SAWANO, Kiyoshi SHIMAMURA, Encarnacion Antonia GARCIA VILLORA
  • Patent number: 11780035
    Abstract: A solder composition of the invention contains: a flux composition containing (A) a rosin resin, (B) an activator, (C) an imidazoline compound having a phenyl group, and (D) an antioxidant; and (E) solder powder, in which the (B) component contains (B1) an organic acid, the (B1) component contains at least one selected from the group consisting of (B11) 1-hydroxy-2-naphthoic acid, 3-hydroxy-2-naphthoic acid, and 1,4-dihydroxy-2-naphthoic acid, and the (C) component is at least one selected from the group consisting of 2-phenylimidazoline and 2-benzylimidazoline.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: October 10, 2023
    Assignee: Tamura Corporation
    Inventors: Ryutaro Shimoishi, Isao Sugiyama, Daigo Ichikawa
  • Patent number: 11776731
    Abstract: Downsized and weight reduced reactor is provided. An annular core 3 includes a first leg 31 and a second leg 32 to which a coil 2 is mounted and which generates magnetic flux, and a pair of yokes 33 which form a closed magnetic path together with the legs. Recess portions 35a is formed at four corners of the annular core 3, and a part of the end surfaces 31a and 32a of the legs which is a magnetic flux generating part or an end surface of the magnetic flux generating part is exposed from the recess portion 35a.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: October 3, 2023
    Assignee: TAMURA CORPORATION
    Inventors: Tsutomu Hamada, Asami Tsushima
  • Patent number: D1005142
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: November 21, 2023
    Assignee: TAMURA CORPORATION
    Inventors: Makoto Hashimoto, Tomoya Mitsugi
  • Patent number: D1005143
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: November 21, 2023
    Assignee: TAMURA CORPORATION
    Inventors: Makoto Hashimoto, Tomoya Mitsugi