Abstract: The present invention provides a receiver. In one embodiment, the receiver includes a receive portion employing transmission signals from a transmitter having multiple antennas and capable of providing channel estimates. The receiver also includes a feedback generator portion configured to provide to the transmitter a pre-coder selection for data transmission that is based on the channel estimates, wherein the pre-coder selection corresponds to a grouping of frequency-domain resource blocks. The present invention also provides a transmitter having multiple antennas. In one embodiment, the transmitter includes a transmit portion coupled to the multiple antennas and capable of applying pre-coding to a data transmission for a receiver. The transmitter also includes a feedback decoding portion configured to decode a pre-coder selection for the data transmission that is fed back from the receiver, wherein the pre-coder selection corresponds to a grouping of frequency-domain resource blocks.
March 20, 2007
September 20, 2007
Texas Instrumens Incorporated
Eko N. Onggosanusi, Badri Varadarajan, Anand G. Dabak
Abstract: An electronic digital processor system including an internal memory means further including an electrically programmable read-only memory for the storage of data and commands which define operations on the data. Also included is an arithmetic and logic unit for performing operations on the data and a register set for temporary storage of data and addresses. Further included is a plurality of data paths which couple the internal memory with the arithmetic and logic unit and registers. Control and timing circuitry is provided for the execution of commands that access the memory and arithmetic and logic unit by the registers and for the execution of commands for programming the electrically programmable read-only memory.