Abstract: An SRAM device and method of forming MOS transistors of the device having reduced defects associated with selective epitaxial growth in moat tip regions is discussed. The SRAM device comprises a core region and a logic region, logic transistors within the logic region of the SRAM, and selective epitaxial regions grown on both source and drain regions; and memory cell transistors within the core region of the SRAM, and having the selective epitaxial regions grown on only one of the source and drain regions. One method of forming the MOS transistors of the SRAM cell comprises forming a gate structure over a first conductivity type substrate to define a channel therein, masking one of the source and drain regions in the core region, forming a recess in the substrate of the unmasked side of the channel, epitaxially growing SiGe in the recess, removing the mask, and forming the source and drain extension regions in source/drain regions.

Abstract: Systems and Methods for task allocation in a multiprocessor environment employing power management techniques are described wherein tasks are allocated relative to the density given by the ratio of worst-case-execution time and deadline of a task and also the harmonicity of a task's period with respect to a task-set. Tasks are allocated to a given processor based on either minimum density or maximum harmonicity depending on which allocation results in a lower clock frequency. Assigning a task to the processor with lowest density results in balancing the density across processors while assigning task to the processor with maximum harmonicity attempts to maximize the utilization of the processor.

Abstract: A power on reset (POR) circuit is provided. For the POR circuit, a PMOS transistor is coupled to a first voltage rail at its source. A drive circuit is coupled to the drain of the PMOS transistor and is configured to output a POR signal. A voltage divider is coupled between the drain of the PMOS transistor and the second voltage rail. A switch network is provided as well, which has first and second switches. The first switch is coupled between the gate of the PMOS transistor and the voltage divider, and the second switch is coupled between the gate of the PMOS transistor and the voltage divider. A controller is also coupled to control the first and second switches, wherein the first and second switches are complementary driven.

Abstract: A method of processing a video sequence is provided that includes receiving a frame of the video sequence, identifying a plurality of blobs in the frame, computing at least one interior point of each blob of the plurality of blobs, and using the interior points in further processing of the video sequence. The interior points may be used, for example, in object tracking.

Abstract: Demodulation and decoding for frequency modulation (FM) receivers with radio data system (RDS) or radio broadcast data system (RBDS). An example of a method for processing a signal in a receiver includes quantizing a demodulated signal to generate bits in response to receipt of the demodulated signal. The method also includes grouping the bits into one or more blocks. The method further includes computing a syndrome for a block from the one or more blocks. Moreover, the method includes identifying error, corresponding to the syndrome, in the block based on type of demodulation. The type of demodulation includes a coherent demodulation and a differential demodulation. Furthermore, the method includes correcting the error in the block.

Abstract: To provide a disk drive capable of inhibiting the occurrence of acoustic noise caused by a voltage pulse when the head is retracted using a speed control method using voltage obtained by rectifying a back electromotive force after the power source has been cut off from the rotation of a spindle motor. Retraction control circuit is used to control the on and off modes of transistors in accordance with the speed of VCM. The voltage across VCM becomes a voltage that can be regulated with VCM voltage control circuit. At this time, voltage is supplied to the terminals based on the voltage of ISO5V that is the rectified voltage of the back electromotive force of the spindle motor and the pulsating voltage is synchronized and produced at both terminals. As a result, the potential difference across VCM is such that the pulsating voltage is negated and acoustic noise is inhibited.

Abstract: A method and apparatus for automatically deciding on the orientation of image. The method includes computing average and standard deviation of luminance of the top region of a portion of the image, of the bottom region of a portion of the image, of the left region of a portion of the image, and of the right region of a portion of the image, computing average luminance of the image, computing, in the digital signal processor, consolidated luminance difference and uniformity of top and bottom regions, and left and right regions, utilizing the computed average and standard deviation of at least one of the bottom region, the left region or the right region and utilizing portrait orientation if difLR?difTB>t1 && stdTB?stdLR>t2 or if difLR?difTB>t3 && stdTB?stdLR>t4, otherwise, utilizing landscape orientation.

Abstract: A circuit includes circuit portions operating from separate power supplies which are switched sequentially. An output of a first portion powered by a power supply (A) is provided as an input to a second portion powered by another power supply (B). Power supply (A) is switched-ON a delay interval later than power supply (B). In an embodiment, the first portion also receives a control input which enables or disables response of the first portion to changes in its inputs. An active circuit is connected between the control terminal and a constant reference potential node of the circuit, and has one transistor of a current-mirror pair connected across supplies (A) and (B). The active circuit connects the control terminal to the constant reference potential node in the delay interval, but is an open circuit otherwise. Power dissipation in the circuit is thereby reduced.

Abstract: A wireless transceiver is provided for transmitting and receiving audio data, comprising: a microphone configured to generate a digital audio signal that includes the audio data, based on a received sound sampled into digital format; a voice detection circuit configured to detect the presence of voice activity in the audio data, and to generate a voice detection signal indicating whether the voice activity is present in the audio data; a transceiver circuit configured to transmit the audio data over a wireless medium; and a control circuit configured to control transmission of the audio data over the wireless medium by the transceiver circuit, based on the voice detection signal. This allows saving of transmission power since no transmission is done during the silence periods. The digital audio signal is at least one of a pulse code modulated signal without compression, and a Bluetooth signal.

Abstract: A planar integrated MEMS device has a piezoelectric element on a dielectric isolation layer over a flexible element attached to a proof mass. The piezoelectric element contains a ferroelectric element with a perovskite structure formed over an isolation dielectric. At least two electrodes are formed on the ferroelectric element. An upper hydrogen barrier is formed over the piezoelectric element. Front side singulation trenches are formed at a periphery of the MEMS device extending into the semiconductor substrate. A DRIE process removes material from the bottom side of the substrate to form the flexible element, removes material from the substrate under the front side singulation trenches, and forms the proof mass from substrate material. The piezoelectric element overlaps the flexible element.

Abstract: In a disclosed embodiment, a stacked capacitor (100) has bottom, middle and top metal electrode layers (141A, 141B, 141C) interleaved with dielectric layers (142A, 142B) conformally disposed within holes (140A, 140B, 140C) in a protective overcoat or backend dielectric layer (110) over a top metal layer (115) of an integrated circuit (105). A top electrode (155) contacts the top metal electrode layer (141C). A bottom electrode (150) electrically couples an isolated part of the top metal electrode layer (141C) through a bottom electrode via (165A) to a first contact node (135A) in the top metal layer (115) which is in contact with the bottom metal electrode layer (141A). A middle electrode (160) electrically couples a part of the middle metal electrode layer (141B) not covered by the top metal layer (115) through a middle electrode via (165B) to a second contact node (135B) in the top metal electrode layer (115).

Abstract: A method and apparatus of an adaptive gain control (AGC) unit. The method includes receiving a noisy input signal and determining to utilize a stethoscope in at least one of a noise suppression mode or in amplification mode depending if the noise level is at least one of above or below a threshold, wherein the stethoscope is in noise suppression mode when K is less than the threshold and is amplification mode when K is above the threshold.

Abstract: A solid-state memory in which stability assist circuitry is implemented within each memory cell. Each memory cell includes a storage element, such as a pair of cross-coupled inverters, and an isolation gate connected between one of the storage nodes and the input of the opposite inverter. The isolation gate may be realized by complementary MOS transistors connected in parallel, and receiving complementary isolation control signals. In read cycles, or in unselected columns during write cycles, the isolation gate is turned off slightly before the word line is energized, and turned on at or after the word line is de-energized. By isolating the input of one inverted from the opposite storage node, the feedback loop of the cross-coupled inverters is broken, reducing the likelihood of a cell stability failure.

Abstract: A wavelength conversion device comprising a plurality of regions. Each region for absorbing radiant energy and emitting light having a characteristic dependent upon which region of the device emits the light.

Abstract: A handheld calculator with disable/re-enable capability. The calculator includes a keypad, a display screen, and circuitry internal to the calculator. The circuitry includes a microprocessor, a storage unit for storing data and programs for execution by the microprocessor to implement calculator functions. The storage unit has stored therein a disable/re-enable program that recognizes a first predetermined calculator event and in response thereto disables one or more programs, and that recognizes a second predetermined calculator event and in response thereto re-enables the disabled program. The invention allows Apps, programs and additional information that may be embedded within the Apps and programs in a calculator or other handheld calculating device to be rendered temporarily inaccessible within a relatively short period of time, and then to be restored to the calculator, again, in a relatively short period of time.

Abstract: The disclosed clock-data recovery architecture includes out-of-lock (including false lock) detection. Out-of-lock detection is accomplished by sampling retimed/recovered data with positive and negative edges of the received data. In example embodiments, an out-of-lock condition is determined either by detecting the occurrence of, or counting, missed edges corresponding to the failure of received data sampling to detect corresponding positive/negative edges of the retimed/recovered data.

Abstract: One embodiment of the present invention relates to a method of reducing imprint of a memory cell. The method comprises adding an inversion condition bit operably associated with one or more memory cells storing a memory word. The inversion condition bit indicates whether the memory word represents an actual payload or an inversion of the actual payload. The inversion condition bit and memory word are selectively toggled by a control circuitry. Inversion is performed by reading the inversion condition bit and memory word and rewriting the memory word back to the one or more memory cells in an inverted or non-inverted state, depending on an inversion condition bit. The inversion condition bit is then written to the inversion status bit value. The memory address is incremented, and the inversion status data state is toggled once the address counter addresses the entire memory array. Other methods and circuits are also disclosed.

Abstract: An array with cells that have adjacent similar structures that are displaced from each other across a common cell border in a direction that is not perpendicular to the cell border thus avoiding an across cell border design rule violation between the adjacent similar structures. A method of forming reduced area memory arrays by moving adjacent similar structures that is not perpendicular to a fully identical common cell border. A method of building arrays using conventional array building software by forming unit pairs with cells that are not identical and are not mirror images or rotated versions of each other.

Abstract: A system and method for reducing pulse width modulation contouring artifacts. Each input intensity value is translated to at least one non-binary bit pattern for display. Many of the input intensity values are translated to at least two alternate non-binary bit patterns. The alternate codes are used to smooth the transition between intensity codes as major bits are turned on. The smoothing occurs by the gradual transition from codes that do not use the major bit to codes that do use the major bit. Typically the alternate codes are selected based on the location of the pixel in a spatial pattern (100) and the alternate codes are spatially alternated from one pixel (102) to the next (104). Other embodiments temporally alternate the codes from one period—typically a frame period—to the next. Still other embodiments alternate the codes both spatially and temporally.

Abstract: The present invention provides a method for manufacturing a gate dielectric (710) that includes providing a nitrided dielectric layer (220) over a substrate (120). The nitrided dielectric layer (220) has a nonuniform concentration of nitrogen in a bulk thereof. The nitrided dielectric layer (220) is exposed to oxygen radicals (410), resulting in a reduction of the non-uniformity.