Patents Assigned to The Secretary of State for The Defence Evaluation and Research Agency in Her Britannic Majesty'Government of the United Kingdom of Great Britain and Northern Ireland
  • Patent number: 5880982
    Abstract: A digital arithmetic circuit includes an inverting circuit connected to a digital circuit in which errors are to be detected. An operand input to the circuit produces an output result in a first operation which is stored in a comparison circuit. The operand is inverted by the inverting circuit on a second cycle of operation of the circuit and the output result is compared by the comparison circuit with that from the first operation. A non-zero result from the comparison indicates the occurrence of an error or errors in the operation of the circuit.
    Type: Grant
    Filed: March 19, 1997
    Date of Patent: March 9, 1999
    Assignee: The Secretary of State for The Defence Evaluation and Research Agency in Her Britannic Majesty'Government of the United Kingdom of Great Britain and Northern Ireland
    Inventor: Richard A. Evans