Abstract: Compositions and methods for controlled polymerization and/or oligomerization of hydrosilanes compounds including those of the general formulae SinH2n and SinH2n+2 as well as alkyl- and arylsilanes, to produce soluble silicon polymers as a precursor to silicon films having low carbon content.

Abstract: Heterocyclosilane compounds and methods for making the same. Such compounds (and/or ink compositions containing the same) are useful for printing or spin coating a doped silane film onto a substrate that can easily be converted into a doped amorphous silicon film (that may also be hydrogenated to some extent) or doped polycrystalline semiconductor film suitable for electronic devices. Thus, the present invention advantageously provides commercial qualities and quantities of doped semiconductor films from a “doped liquid silicon” composition.

Abstract: The present invention relates to electrically active devices (e.g., capacitors, transistors, diodes, floating gate memory cells, etc.) having dielectric, conductor, and/or semiconductor layers with smooth and/or dome-shaped profiles and methods of forming such devices by depositing or printing (e.g., inkjet printing) an ink composition that includes a semiconductor, metal, or dielectric precursor. The smooth and/or dome-shaped cross-sectional profile allows for smooth topological transitions without sharp steps, preventing feature discontinuities during deposition and allowing for more complete step coverage of subsequently deposited structures. The inventive profile allows for both the uniform growth of oxide layers by thermal oxidation, and substantially uniform etching rates of the structures. Such oxide layers may have a uniform thickness and provide substantially complete coverage of the underlying electrically active feature.

Abstract: Circuits and circuit elements configured to generate a random delay, a monostable oscillator, circuits configured to broadcasting repetitive messages wireless systems, and methods for forming such circuits, devices, and systems are disclosed. The present invention advantageously provides relatively low cost delay generating circuitry based on TFT technology in wireless electronics applications, particularly in RFID applications. Such novel, technically simplified, low cost TFT-based delay generating circuitry enables novel wireless circuits, devices and systems, and methods for producing such circuits, devices and systems.

Abstract: An electronic component (1) and an electronic device (100) comprising one or more such components (1). The electronic component (1) comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one insulating or semi-insulating layer (7) between said electrodes. The stack further comprises a buffer layer (13), arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (?L) occurring in the protective layer (11) and thus preventing said dimensional change (?L) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.

Abstract: A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.

Abstract: A ferroelectric memory cell (1) and a memory device (100) comprising one or more such cells (1). The ferroelectric memory cell comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one ferroelectric memory material layer (7) between said electrodes. The stack further comprises a buffer layer (13) arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (?L) occurring in the protective layer (11) and thus preventing said dimensional change (?L) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.

Abstract: Methods, algorithms, processes, circuits, and/or structures for laser patterning suitable for customized RFID designs are disclosed. In one embodiment, a method of laser patterning of an identification device can include the steps of: (i) depositing a patternable resist formulation on a substrate having configurable elements and/or materials thereon; (ii) irradiating the resist formulation with a laser tool sufficiently to change the solubility characteristics of the resist in a developer; and (iii) developing exposed areas of the resist using the developer. Embodiments of the present invention can advantageously provide a relatively low cost and high throughput approach for customized RFID devices.

Abstract: In a non-volatile electric memory system a memory unit and a read/write unit are provided as physically separate units. The memory unit is based on a memory material that can be set to at least two distinct physical states by applying an electric field across the memory material. Electrodes and/or contacts are either provided in the memory unit or in the read/write unit and contacts are at least always provided in the read/write unit. Electrodes and contacts are provided in a geometrical arrangement, which defines geometrically one or more memory cells in the memory layer. Establishing a physical contact between the memory unit and the read/write unit closes an electrical circuit over the addressed memory cell such that read, write or erase operations can be effected. The memory material of the memory unit can be polarized into two discernible polarization states.

Abstract: In a non-volatile electric memory system a card-like memory unit (10) and a read/write unit (11) are provided as physically separate units. The memory unit (10) is based on a memory material (4) that can be set to at least two distinct physical states by applying an electric field across the memory material. The read/write unit (10) comprises contact means (9) provided in a determined geometrical pattern enabling a definition of memory cells in memory unit (10) in an initial write operation, the memory cells being located in a geometrical pattern corresponding to that of the contact means (9). Establishing a physical contact between the memory unit (10) and the read/write unit (11) closes an electrical circuit over an addressed memory cell such that read, write or erase operations can be effected.

Abstract: In a method for obviating the effect of disturb voltages in a data storage apparatus employing passive matrix addressing, an application of electric potentials for an addressing operation is according to a voltage pulse protocol. The data storage cells of the apparatus are provided in two or more electrically separated segments each constituting non-overlapping physical address subspaces of the data storage apparatus physical address space. A number of data storage cells in each segment are preset to the same polarization by an active voltage pulse with a specific polarization. In a first addressing operation one or more data storage cells are read by applying an active pulse with the same polarization to each data storage cell and recording the output charge response. On basis thereof the output data in subsequent second addressing operation are copied onto preset data storage cells in another segment of the data storage apparatus, this segment being selected on the basis of its previous addressing history.

Abstract: In a method for forming ferroelectric thin films of vinylidene fluoride oligomer or vinylidene fluoride co-oligomer, oligomer material is evaporated in vacuum chamber and deposited as a thin film on a substrate which is cooled to a temperature in a range determined by process parameters and physical properties of the deposited VDF oligomer or co-oligomer thin film. In an application of the method of the invention for fabricating ferroelectric memory cells or ferroelectric memory devices, a ferroelectric memory material is provided in the form of a thin film of VDF oligomer or VDF co-oligomer located between electrode structures. A ferroelectric memory cell or ferroelectric memory device fabricated in this manner has the memory material in the form of a thin film of VDF oligomer or VDF co-oligomer provided on at least one of first and second electrode structures, such that the thin film is provided on at least one of the electrode structures or between first and second electrode structures.

Abstract: In an organic electronic circuit, particularly a memory circuit with an organic ferroelectric or electret material the active material comprises fluorine atoms and consists of various organic materials. The active material is located between a first electrode and a second electrode. A cell with a capacitor-like structure is defined in the active material and can be accessed for an addressing operation via the first and the second electrode. At least one of these electrodes comprises a layer of chemically modified gold. In a passive matrix-addressable electronic device, particularly a ferroelectric or electret memory device, circuits of this kind with the active material as a ferroelectric or electret memory material form the elements of a matrix-addressable array and define the memory cells provided between first and second set of addressing electrodes. At least the electrodes of at least one of the sets then comprise at least a layer of gold.

Abstract: In a non-volatile electric memory system a memory unit (4) and a read/write unit (11) are provided as physically separate units. The memory unit (10) is based on a memory material (4) that can be set to at least two distinct physical states by applying an electric field across the memory material. Electrode means and/or contact means are either provided in the memory unit or in the read/write unit and contact means are at least always provided in the read/write unit. Electrodes and contacts are provided in a geometrical arrangement, which defines geometrically one or more memory cells in the memory layer. Contact means in the read/write unit are provided connectable to driving, sensing and control means located in the read/write unit or in an external device connected with the latter. Establishing a physical contact between the memory unit and the read/write unit closes an electrical circuit over the addressed memory cell such that read, write or erase operations can be effected.

Abstract: In a method for reducing detrimental phenomena related to disturb voltages in a data storage apparatus employing passive matrix addressing, particularly a memory device or a sensor device, an application of electric potentials conforming to an addressing operation is generally controlled in a time-coordinated manner according to a voltage pulse protocol. In an addressing operation a data storage cell is set to a first polarization state by means of a first active voltage pulse and then, dependent on the voltage pulse protocol, a second voltage pulse which may be a second active voltage pulse of opposite polarity to that of the first voltage pulse, is applied and used for switching the data storage cell to a second polarization state. The addressed cell is thus set to a predetermined polarization state as specified by the addressing operation.

Abstract: In a method for reading the memory cell in a passive matrix-addressable ferroelectric or electret memory array with memory cells in the form of ferroelectric or electret capacitors, sensing means connected to the bit line of memory cell is activated in order to initiate a charge measurement and a first charge value is registered, whereafter a switching voltage is applied to the memory cell and a second charge value is registered. A readout value is obtained by subtracting the first charge value from the second charge value. A sensing device for performing an embodiment of the method comprises a first amplifier stage with an integrator circuit and connected with a second amplifier stage (A2) following the first amplifier stage and with an integrator circuit, and a sampling capacitor connected between an output of the first amplifier stage and an input of the second amplifier stage.

Abstract: In an organic electronic circuit, particularly memory circuit with an organic ferroelectric or electret material the active material comprises fluorine atoms and consists of various organic materials. The active material is located between first and second electrode sets constituting respectively bottom and top electrodes of the device. A cell with a capacitor like structure is defined in the active material and can be accessed for an addressing operation via the electrodes. At least one top electrode comprises a layer of gold in contact with active material. A second layer on the top electrode comprises conducting material different from gold or can alternatively also be made of gold. A via connection extends between the second electrode layer and a bottom electrode or another electrode in the bottom electrode layer. In case the second electrode layer is made of gold the via metal of the via connection can also be gold and integral with the second electrode layer.

Abstract: An organic electronic device consists of one or more electro-active organic or polymer materials sandwiched between electrodes. Critical in such devices is the interface between the electrode and the polymer, where degradation or chemical reaction products may develop that are deleterious to the proper functioning of the device. This is solved by introducing a functional interlayer composed of one or more materials consisting of a molecular backbone bearing phosphonate or phosphate functions, either directly attached or through side chains, said functional layer being disposed between at least one of the respective electrodes and said one or more electro-active materials in the device.

Abstract: In a method for enhancing the data storage capability of ferroelectric or electret memory cell which has been applied to storage of data and attained an imprint condition, suitable voltage pulses are used for evoking a temporary relaxation of the imprint condition into a volatile polarization state that can be discriminated from the imprinted polarization state in a non-destructive readout operation. Sequences of one or more voltage pulses are used to evoke readout signals respectively indicative of a non-volatile and a volatile polarization state of the memory cell, but without altering said polarization states.

Abstract: An apparatus/method for producing fabric-like electronic circuit patterns created by methodically joining electronic elements using textile fabrication-like methods in a predetermined arrangement.