Abstract: A stacked semiconductor device encompasses a mother-substrate, rectangular chips mounted on the mother-substrate, and bump-connecting mechanisms connecting the mother-substrate and the chips by a non-provisional joint-process with a height lower than the height of a provisional joint-process jointing the mother-substrate and the chips. The mother-substrate has unit elements arranged in each of unit-element areas assigned to a first lattice defined on a first main surface of the mother-substrate, the first main surface is divided into chip-mounting areas along a second lattice having a smaller number of meshes than the first lattice. The bump-connecting mechanisms are arranged along a third lattice corresponding to the arrangement of the unit elements, and transmit signals from the unit elements independently to each of the circuits merged in the chips. After the provisional joint-process, the bump-connecting mechanisms can be separated into substrate-side and chip-side connection-elements.

Abstract: A stacked semiconductor device encompasses a mother-plate having a mounting-main surface and a bottom-main surface, an onboard-element having a connection face facing to the mounting-main surface, a parent bump provided on the mother-plate, having a mother-site wall made of a layer of conductor, mother-site wall is perpendicular to the mounting-main surface, and a repair bump provided on the onboard-element at a side of the connection face, having a repair-site wall made of a layer of conductor having different hardness from the mother-site wall, the repair-site wall is perpendicular to the connection face, configure to bite each other with the parent bump at an intersection between the mother-site wall and the repair-site wall conductor.

Abstract: A stacked semiconductor device encompasses a mother-plate having a mounting-main surface and a bottom-main surface, an onboard-element having a connection face facing to the mounting-main surface, a parent bump provided on the mother-plate, having a mother-site wall made of a layer of conductor, mother-site wall is perpendicular to the mounting-main surface, and a repair bump provided on the onboard-element at a side of the connection face, having a repair-site wall made of a layer of conductor having different hardness from the mother-site wall, the repair-site wall is perpendicular to the connection face, configure to bite each other with the parent bump at an intersection between the mother-site wall and the repair-site wall conductor.

Abstract: A stacked semiconductor device encompasses a mother-substrate, rectangular chips mounted on the mother-substrate, and bump-connecting mechanisms connecting the mother-substrate and the chips by a non-provisional joint-process with a height lower than the height of a provisional joint-process jointing the mother-substrate and the chips. The mother-substrate has unit elements arranged in each of unit-element areas assigned to a first lattice defined on a first main surface of the mother-substrate, the first main surface is divided into chip-mounting areas along a second lattice having a smaller number of meshes than the first lattice. The bump-connecting mechanisms are arranged along a third lattice corresponding to the arrangement of the unit elements, and transmit signals from the unit elements independently to each of the circuits merged in the chips. After the provisional joint-process, the bump-connecting mechanisms can be separated into substrate-side and chip-side connection-elements.

Abstract: In a method for manufacturing a radiation detector, counter pixel electrodes 33 are formed on a counter substrate 2 at positions facing a plurality of pixel electrodes formed on a signal reading substrate, and wall bump electrodes 34 are further formed on the counter pixel electrodes 33. In order to achieve the above, a resist R is applied, and the resist R is exposed to light to form openings O. When Au sputter deposition is performed on the openings O, only some of the Au is deposited on the bottom surface in the openings O as the counter pixel electrodes 33. The rest of the Au is not deposited on the bottom surface in the openings O, and the most of the remaining Au adheres to the inner walls of the openings O to form wall bump electrodes 34. The bump electrodes 34 are cylindrical, making it possible to reduce the pressure acting on the signal reading substrate by an extent corresponding to the decrease in the bonding area in comparison to conventional bump-shaped bump electrodes.

Abstract: A semiconductor device encompasses a connecting base including a semiconductor substrate and a surface insulating-film on the semiconductor substrate, a passivation film covering the surface insulating-film and surface electrode on the surface insulating-film, establishing a groove that exposes a central part of the surface electrode, a barrier-metal film spanning from the bottom of the groove to an upper face of the passivation film, and micro-bumps arranged on the barrier-metal film located on the passivation film.

Abstract: A solid-state imaging device encompasses a detector substrate having a first main-surface, on which a plurality of first lands are arranged in a matrix, and a signal-circuit substrate having a second main-surface, on which plurality of second lands are arranged so as to face the arrangement of the first lands. A plurality of tubular bumps, each of which having a flattened plane pattern, and is provided between each of the first lands and each of the second lands. The tubular bumps respectively have major-axis directions to define inclined angles, and are arranged in the matrix such that the inclined angles differ depending on locations of the plurality of tubular bumps.

Abstract: A solid-state imaging device encompasses a detector substrate having a first main-surface, on which a plurality of first lands are arranged in a matrix, and a signal-circuit substrate having a second main-surface, on which plurality of second lands are arranged so as to face the arrangement of the first lands. A plurality of tubular bumps, each of which having a flattened plane pattern, and is provided between each of the first lands and each of the second lands. The tubular bumps respectively have major-axis directions to define inclined angles, and are arranged in the matrix such that the inclined angles differ depending on locations of the plurality of tubular bumps.

Abstract: A semiconductor device encompasses a connecting base including a semiconductor substrate and a surface insulating-film on the semiconductor substrate, a passivation film covering the surface insulating-film and surface electrode on the surface insulating-film, establishing a groove that exposes a central part of the surface electrode, a barrier-metal film spanning from the bottom of the groove to an upper face of the passivation film, and micro-bumps arranged on the barrier-metal film located on the passivation film.

Abstract: A stacked device encompasses a lower chip including a plurality of wiring lands and a plurality of wall-block patterns, each of the wall-block patterns is allocated at a position except locations where the wiring lands are disposed, each of the wall-block patterns has a inclined plane, a height of each of the wall-block patterns measured from a reference plane of the array of the wiring lands is higher than the wiring lands, and an upper chip including a plurality of wiring bumps assigned correspondingly to the positions of the wiring lands, respectively, and a plurality of cone bumps assigned correspondingly to the positions of the wall-block patterns, respectively.

Abstract: A brain electrode system comprises: a brain electrode body which is placed in the cranium and has an electrode which detects a brain wave signal and a first coil through which an electric current corresponding to the brain wave signal flows; and a communication unit which is disposed on the scalp, has a second coil which magnetically connects with the first coil and in which an induced electromotive force occurs due to a change in the current that flows through the first coil and receives the brain wave signal with the second coil.

Abstract: A stacked device encompasses a lower chip including a plurality of wiring lands and a plurality of wall-block patterns, each of the wall-block patterns is allocated at a position except locations where the wiring lands are disposed, each of the wall-block patterns has a inclined plane, a height of each of the wall-block patterns measured from a reference plane of the array of the wiring lands is higher than the wiring lands, and an upper chip including a plurality of wiring bumps assigned correspondingly to the positions of the wiring lands, respectively, and a plurality of cone bumps assigned correspondingly to the positions of the wall-block patterns, respectively.

Abstract: A brain probe includes: a core probe made from a metal; and n electrode plates attached so as to cover an entire side surface circumference of the core probe and forming n side planes providing an n-angular cross section (n is an integer equal to or greater than 3). Each of the electrode plates is manufactured by a LSI manufacturing process, and provided with at least one electrode and a lead-out wiring extending in a longitudinal direction of a side plane from each of the at least one electrode.