Patents Assigned to Tokyo Electron Limited
  • Patent number: 12020943
    Abstract: A substrate processing method includes: a preparing process of preparing a substrate in which a zirconium oxide film as a mask has been formed on a laminated film and dry-etched into a given shape; after the preparing process, a mask removing process of removing the zirconium oxide film by supplying a mask removing liquid containing sulfuric acid as a main component to the substrate; and after the mask removing process, a drying process of drying a surface of the substrate that is wet with a rinsing liquid.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: June 25, 2024
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Atsushi Yamashita, Koji Kagawa
  • Patent number: 12018928
    Abstract: There is provided a film thickness measurement method which measures a film thickness of a specific film to be measured in a multilayer film in situ in a film formation system that forms the multilayer film on a substrate, the method comprising: regarding a plurality of films located under the film to be measured as one underlayer film, measuring a film thickness of the underlayer film, and deriving an optical constant of the underlayer film by spectroscopic interferometry; and after the film to be measured is formed, deriving a film thickness of the film to be measured by spectroscopic interferometry using the film thickness and the optical constant of the underlayer film.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: June 25, 2024
    Assignee: Tokyo Electron Limited
    Inventors: Kazunaga Ono, Kanto Nakamura, Toru Kitada, Atsushi Gomi
  • Patent number: 12018375
    Abstract: There is provided a film forming method of forming a carbon-containing film by a microwave plasma from a microwave source, the film forming method including: a dummy step of performing a dummy process by generating plasma of a first carbon-containing gas within a processing container; a placement step of placing a substrate on a stage within the processing container; and a film forming step of forming the carbon-containing film on the substrate using plasma of a second carbon-containing gas.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: June 25, 2024
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Ryota Ifuku, Takashi Matsumoto, Masahito Sugiura, Makoto Wada
  • Patent number: 12018370
    Abstract: A film-forming method includes: forming a first film by performing an operation of forming a unit film a plurality of times, the operation including sub-step of supplying a first raw material gas containing a first element to a substrate and causing the first raw material gas to be adsorbed thereon, and sub-step of supplying a first reaction gas to the substrate; and forming a second film on the substrate by performing an operation of forming a unit film at least once, the operation including sub-step of supplying a second raw material gas containing a second element to the substrate and causing the second raw material gas to be adsorbed thereon, and sub-step of supplying a second reaction gas to the substrate, wherein a mixed film is formed by performing the forming the first film and the forming the second film, respectively once, or a plurality of times.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: June 25, 2024
    Assignee: Tokyo Electron Limited
    Inventors: Tatsuhiko Tanimura, Toru Kanazawa, Toshiyuki Ikeuchi
  • Patent number: 12020913
    Abstract: A temperature regulator includes a first member, a channel, and a cavity. The first member has a first surface that is subjected to temperature control. The channel is along the first surface in the first member, and refrigerant flows in the channel. The cavity is provided in the first member adjacently to a flow rate change region of the channel. A flow rate of refrigerant in the flow rate change region is higher than a flow rate of refrigerant in another region of the channel.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: June 25, 2024
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Makoto Kato, Sho Murano
  • Patent number: 12020902
    Abstract: A plasma system includes a plasma apparatus including: a plasma chamber; a pedestal configured to hold a substrate in the chamber; and a radio frequency (RF) electrode configured to excite plasma in the chamber; an electromagnetic (EM) circuit block coupled to the RF electrode, the EM circuit block including: a function generator configured to output a broadband RF waveform, the waveform having EM power distributed over a range of frequencies; a broadband amplifier coupled to an output of the function generator, an operating frequency range of the amplifier including the range of frequencies; and a broadband impedance matching network having an input coupled to an output of the broadband amplifier and an output coupled to a terminal of the RF electrode, an operating frequency range of the broadband impedance matching network including the range of frequencies; and a controller configured to adjust an input parameter of the EM circuit block.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: June 25, 2024
    Assignee: Tokyo Electron Limited
    Inventors: Jianping Zhao, John Carroll, Charles Schlechte, Peter Lowell George Ventzek
  • Patent number: 12020898
    Abstract: One disclosed plasma processing system includes a chamber, a substrate support, a plasma generator, and first and second electric magnet assemblies. The substrate support is disposed in the chamber. A center of a substrate on the substrate support is positioned on a central axis of the chamber. The plasma generator is configured to generate a plasma in the chamber. The first electric magnet assembly includes one or more first annular coils and is disposed on or above the chamber and configured to generate a first magnetic field in the chamber. The second electric magnet assembly includes one or more second annular coils and is configured to generate a second magnetic field in the chamber. The second magnetic field reduces the intensity of the first magnetic field in the center of the substrate on the substrate support.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: June 25, 2024
    Assignee: Tokyo Electron Limited
    Inventor: Akihiro Yokota
  • Publication number: 20240203797
    Abstract: Aspects of the present disclosure provide a bonding device for bonding two wafers. For example, the bonding device can include a first bonding chuck and a second bonding chuck. The first bonding chuck can have a first bonding head for a first wafer to be mounted thereon. The second bonding chuck can have a plurality of second bonding heads for a second wafer to be mounted thereon. The second bonding heads can be controlled individually to apply local pressures onto the second wafer to move the second wafer toward the first wafer to bond the second wafer to the first wafer, the local pressures corresponding to bow measurement of the first wafer and the second wafer.
    Type: Application
    Filed: December 14, 2022
    Publication date: June 20, 2024
    Applicant: Tokyo Electron Limited
    Inventors: Andrew WELOTH, Daniel FULFORD, Anthony SCHEPIS, Mark I. GARDNER, H. Jim FULFORD, Anton DEVILLIERS, David CONKLIN
  • Publication number: 20240203698
    Abstract: Provided is an etching method that includes: (a) preparing a substrate, the substrate including a first region and a second region below the first region, the first region containing a first material and having at least one opening, the second region containing a second material that is different from the first material and contains silicon; and (b) etching the second region through the at least one opening by using a plasma generated from a processing gas containing a fluorine containing gas and a CxHyClz (x and y are each an integer of 0 or more, x+y?1, and z is an integer of 1 or more) gas.
    Type: Application
    Filed: December 20, 2023
    Publication date: June 20, 2024
    Applicant: Tokyo Electron Limited
    Inventors: Ryo MATSUBARA, Koki MUKAIYAMA, Maju TOMURA, Yoshihide KIHARA, Satoshi OHUCHIDA, Takuto KIKUCHI
  • Publication number: 20240202606
    Abstract: To provide an information processing method, an information processing apparatus, and a substrate processing system. Acquiring time series data from a plurality of types of sensors having different sampling periods provided in a substrate processing apparatus, performing learning of first learning models that output information relating to the substrate processing apparatus in a case where the time series data from the sensors are input, using each of the pieces of time series data having different sampling periods for each of the sensors individually, and inputting the time series data from the sensors into the corresponding first learning models after learning to output an estimation result based on information obtained from the first learning models are included.
    Type: Application
    Filed: February 28, 2024
    Publication date: June 20, 2024
    Applicant: Tokyo Electron Limited
    Inventors: Yukiya SAITOU, Yuki KATAOKA
  • Publication number: 20240203692
    Abstract: A plasma processing apparatus includes a processing container, an electromagnetic wave generator, and a resonator array structure. The processing container provides a processing space. The electromagnetic wave generator generates an electromagnetic wave for plasma excitation that is supplied to the processing space. The resonator array structure is formed by arranging resonators configured to resonate with a magnetic field component of the electromagnetic wave, each of the resonators having a size smaller than a wavelength of the electromagnetic wave, and is positioned in the processing container.
    Type: Application
    Filed: February 28, 2024
    Publication date: June 20, 2024
    Applicants: Tokyo Electron Limited, The University of Shiga Prefecture
    Inventors: Shin OOWADA, Kazushi KANEKO, Masaaki MATSUKUMA, Eiki KAMATA, Satoru KAWAKAMI, Taro IKEDA, Osamu SAKAI
  • Publication number: 20240201601
    Abstract: Aspects of the present disclosure provide a wafer processing device for optimizing wafer shape. For example, the wafer processing device can include a first hot plate, a second hot plate and a controller. The first hot plate can be configured to heat a wafer. For example, the first hot plate can provide uniform heating across a surface of the first hot plate. The second hot plate has multiple heating zones with each heating zone independently controllable such that each heating zone can be set to a temperature value independent of other heating zones. The controller is configured to control the first hot plate to provide the uniform heating, receive a bow measurement from wafer curvature measurement of a wafer, and set the multiple heating zones of the second hot plate to their respective temperature values that correspond to the bow measurement.
    Type: Application
    Filed: March 1, 2024
    Publication date: June 20, 2024
    Applicant: Tokyo Electron Limited
    Inventors: Andrew WELOTH, Michael MURPHY, Daniel J. FULFORD, Steven GUECI, David C. CONKLIN
  • Publication number: 20240202607
    Abstract: To provide an information processing method, an information processing apparatus, and an information processing system. Acquiring a feature value of data processed by a plurality of first learning models, performing learning of a second learning model that outputs information relating to an estimation result in a case where the feature value of data processed by the first learning model is input based on the acquired feature value, and inputting the acquired feature value of data into the second learning model after learning to output an estimation result based on information obtained from the second learning model are included.
    Type: Application
    Filed: February 28, 2024
    Publication date: June 20, 2024
    Applicant: Tokyo Electron Limited
    Inventors: Yukiya SAITOU, Yuki KATAOKA
  • Publication number: 20240203778
    Abstract: A method includes providing a carrier substrate having a die bonded thereto, where the die includes a first alignment mark on a first surface. The method includes positioning a target substrate with a second surface on a substrate stage, where the target substrate includes a second alignment mark on the second surface. The method includes positioning the carrier substrate with respect to a die handler, where the die handler includes a third alignment mark. The method includes coupling the die to the die handler, where the step of coupling includes aligning the first alignment mark with the third alignment mark. The method includes positioning the coupled die and the die handler over the target substrate, where the step of positioning includes aligning the second alignment mark with at least one of the first alignment mark and the third alignment mark. The method includes bonding the first surface with the second surface.
    Type: Application
    Filed: December 20, 2022
    Publication date: June 20, 2024
    Applicant: Tokyo Electron Limited
    Inventors: David POWER, David CONKLIN, Anthony SCHEPIS, Andrew WELOTH, Anton DEVILLIERS
  • Patent number: 12014984
    Abstract: A method for forming a semiconductor apparatus includes forming a plurality of repetitive initial structures over a substrate of the semiconductor apparatus. An initial structure in the plurality of repetitive initial structures is formed by forming a first stack of transistors along a Z direction substantially perpendicular to a substrate plane, and forming local interconnect structures. Each of the transistors in the first stack of transistors is sandwiched between two of the local interconnect structures. Vertical conductive structures are formed substantially parallel to the Z direction, a height of one of the vertical conductive structures along the Z direction being at least a height of the initial structure. The initial structure is functionalized into a final structure by forming one or more connections each electrically coupling one of the local interconnect structures to one of the vertical conductive structures.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: June 18, 2024
    Assignee: Tokyo Electron Limited
    Inventors: Lars Liebmann, Jeffrey Smith, Anton deVilliers
  • Patent number: 12014930
    Abstract: In an etching method, plasma from a processing gas containing a fluorocarbon gas is formed within a chamber of a plasma processing apparatus, and a deposit containing fluorocarbon is formed on a substrate. The substrate includes a first region formed of a silicon containing material and a second region formed of a metal containing material. Subsequently, plasma from a rare gas is formed within the chamber, and rare gas ions are supplied to the substrate. As a result, the first region is etched by the fluorocarbon contained in the deposit. When the plasma from the rare gas is formed, a magnetic field distribution in which a horizontal component on an edge side of the substrate is higher than a horizontal component on a center of the substrate is formed by an electromagnet.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: June 18, 2024
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Mitsuhiro Iwano, Masanori Hosoya
  • Patent number: 12011738
    Abstract: A substrate processing method includes forming a film of an ionic liquid on a surface of a substrate, on which a pattern is formed, by supplying the ionic liquid to the surface of the substrate, wherein the ionic liquid has a cation containing a hydrocarbon chain having six or more carbon atoms, and wherein at least one hydrogen atom in the hydrocarbon chain is substituted with a fluorine atom.
    Type: Grant
    Filed: January 12, 2023
    Date of Patent: June 18, 2024
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takeo Nakano, Hirokazu Ueda, Mitsuaki Iwashita, Naoki Umeshita, Ryuichi Asako, Kenichi Uki
  • Patent number: 12013429
    Abstract: According to one aspect of the present disclosure, a transport system includes a mobile cassette unit capable of storing a plurality of structures and supplying the structures to an inspection unit, wherein each of the structures includes a substrate on which a plurality of devices are formed, and an interconnect member including a contact section that electrically contacts an electrode of the plurality of devices.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: June 18, 2024
    Assignee: Tokyo Electron Limited
    Inventor: Seiichiro Motomura
  • Patent number: 12014907
    Abstract: A method of forming a graphene structure, includes: providing a substrate; performing a preprocessing by supplying a first processing gas including a carbon-containing gas to the substrate while heating the substrate, without using plasma; and after the preprocessing, forming the graphene structure on a surface of the substrate through a plasma CVD using plasma of a second processing gas including a carbon-containing gas.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: June 18, 2024
    Assignee: Tokyo Electron Limited
    Inventors: Ryota Ifuku, Takashi Matsumoto, Masahito Sugiura
  • Patent number: 12014911
    Abstract: An example of a sputtering apparatus comprises a first target and a second target that emit sputter particles, a substrate support configured to support a substrate, a shielding plate disposed between the first and the second target and the substrate and having a through-hole through which the sputter particles pass, and an obstructing mechanism. The through-hole has a first opening region through which the sputter particles emitted from the fit target pass and a second opening region through which the sputter particles emitted from the second target pass, and the obstructing mechanism is configured to obstruct the sputter particles emitted from the first target in passing through the second opening region and the sputter particles emitted in the second target from passing through the first opening region.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: June 18, 2024
    Assignee: Tokyo Electron Limited
    Inventors: Shota Ishibashi, Tatsuo Hirasawa, Hiroyuki Toshima, Hiroyuki Iwashita