Patents Assigned to Tokyo Shibaura Denki Kabushiki Kaisha
  • Patent number: 4763407
    Abstract: A semiconductor device mounted on a printed circuit board is disclosed. The semiconductor device is surrounded by a frame having a stopper portion on the inner wall thereof at a level higher than tops of bonding wires as well as a semiconductor element housed in the frame. An insulating resin is filled in the frame to protect the semiconductor element from external stress and humidity. A method of mounting a semiconductor device on a printed circuit board is further disclosed. In this method a sealing solid resin block is first sustained on a stopper portion provided on the inner wall of a frame surrounding a semiconductor element and bonding wires, and then melted to seal the semiconductor element and bonding wires.
    Type: Grant
    Filed: May 21, 1987
    Date of Patent: August 16, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Takemi Abe
  • Patent number: 4764965
    Abstract: A data processing apparatus permitting editing of document blocks associated with voice block data, wherein various document blocks, stored in a memory section, are read out and displayed on a display. A desired document block is designated by a cursor, and the corresponding voice data is input, thereby associating the desired document block with the corresponding voice block data which is stored in another memory section. Input sentences are divided into document blocks, to be edited and displayed. Even if the document block displayed is moved during editing, the voice data corresponding to the moved document block can be output, by operating a voice output key.
    Type: Grant
    Filed: March 13, 1987
    Date of Patent: August 16, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Susumu Yoshimura, Isamu Iwai
  • Patent number: 4763178
    Abstract: A dynamic random access memory is disclosed which has memory cell units formed on a silicon substrate, each of which includes four memory cells, each of these including a MOS transistor and a MOS capacitor. One cell unit occupies a substantially square area of the surface of the substrate. The four memory cells included in this cell unit are arranged along the diagonal lines of the square area in the shape of a cross. The four transistors are connected to a common drain through a common drain region. The capacitors are respectively arranged at the four corners of the square area so as to have a relatively increased capacitor area, thereby obtaining a large capacitance.
    Type: Grant
    Filed: November 7, 1986
    Date of Patent: August 9, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Koji Sakui, Mitsugi Ogura
  • Patent number: 4761775
    Abstract: An optical disc and an apparatus using it. Prepits are preformed on a surface of the disc at a pitch to facilitate tracking thereof. The prepits are used for both tracking and clock generation. A processed tracking signal and a processed clocking signal are generated from signals generated solely from the preformed prepits.
    Type: Grant
    Filed: January 23, 1987
    Date of Patent: August 2, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Hiroyasu Murakami
  • Patent number: 4756663
    Abstract: A method for operating pumps in a pumping-up power plant having a single speed reversible pump-turbine and a booster pump, the booster pump being provided in a branch pipe which is provided in parallel with a portion of a draft tunnel between the pump-turbine and a lower reservoir, is disclosed. The method includes the steps of, closing guide vanes of the pump-turbine, opening the portion of the draft tunnel which runs in parallel with the branch pipe, closing the branch pipe, then starting the pump-turbine in air as a pump, and starting the booster pump.
    Type: Grant
    Filed: December 29, 1980
    Date of Patent: July 12, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Sachio Tsunoda, Katsunori Shirasu
  • Patent number: 4755235
    Abstract: An electrically conductive copper alloy material for such as electric wires is disclosed whose grain size number is adjusted to be not less than 7 (JIS G 0551) which corresponds substantially to ASTM E112 by making an ingot of a copper alloy containing Cr and/or Zr, hot-working it to a wire of suitable diameter, and repeatedly annealing and cold-working it. A method for manufacturing such material is also disclosed.
    Type: Grant
    Filed: March 17, 1986
    Date of Patent: July 5, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Seika Matidori, Masato Sakai
  • Patent number: 4754166
    Abstract: A transistor circuit has a first series circuit of first and second resistors coupled between a power source line and a circuit ground line. A second series circuit of third and fourth resistors is connected in parallel to the first series circuit. A first transistor is coupled at its collector-emitter path between the junction of third and fourth resistors and the circuit ground line. The first transistor is on-off controlled by a potential appearing at the junction of the first and second resistors. A second transistor is coupled at its collector-emitter path between an output terminal of the transistor circuit and the circuit ground line. The second transistor is on-off controlled by a potential appearing at the junction of the third and fourth resistors. The ratio of the resistance value of the first resistor to that of the second resistor is larger than the ratio of the resistance value of the third resistor to that of the fourth resistor.
    Type: Grant
    Filed: December 3, 1986
    Date of Patent: June 28, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Katsumi Nagano
  • Patent number: 4752693
    Abstract: A current source circuit contains a transistor for controlling current flowing into an electric/photo converting element in a control photo coupler so that current flowing into a photo/electric converting element in the control photo coupler is equal to a predetermined ratio of an input current from an input current source. The control photo coupler and an output photo coupler are interconnected so that the current proportional to the current flowing into the electric/photo converting circuit of the control photo coupler is fed into the electric/photo converting circuit of the output photo coupler.
    Type: Grant
    Filed: January 6, 1987
    Date of Patent: June 21, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Katsumi Nagano
  • Patent number: 4752870
    Abstract: In a decentralized information processing system comprising a system controller and work station, initial program loading is done by transferring a program from one of the work stations to the system controller, or to another work station that has issued a request for initial program loading.
    Type: Grant
    Filed: January 9, 1987
    Date of Patent: June 21, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Tomoyoshi Matsumura
  • Patent number: 4751397
    Abstract: A power source circuit for base drive circuits in a transistor inverter comprises a high frequency transformer having a plurality of secondary windings respectively provided in association with the base drive circuits, a high frequency inverter connected to receive a DC power and supply a high frequency current to the primary of the high frequency transformer, and a plurality of converters respectively provided in association with the base drive circuits, and hence in association with the secondary windings, and connected to receive the outputs of the associated secondary windings and provide DC voltages for energizing the associated base drive circuits.
    Type: Grant
    Filed: April 19, 1983
    Date of Patent: June 14, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Yuichi Ide
  • Patent number: 4747066
    Abstract: Arthmetic unit for transferring the information at one bit of an accumulator or one of general registers into another bit. The accumulator comprises a first memory circuit while a flag register is used as a second memory circuit. Selection circuits for selecting the data at each bit of the first and second memory circuits are provided. When a given instruction is such that the data stored in the second memory circuit is transferred into a specified bit of the first memory circuit, only the selection circuit corresponding to the specified bit is selected so that the data stored in the second memory circuit is written, whereby the data stored in the second memory circuit is written or transferred into the specified bit of the first memory circuit.
    Type: Grant
    Filed: January 20, 1984
    Date of Patent: May 24, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Masahiko Sumi
  • Patent number: 4745536
    Abstract: Apparatus and method for effectively decreasing current spike, ringing, and electromagnetic noise in a circuit containing a semiconductor device when a voltage applied to the semiconductor is inverted. The core of the reactor is made of an amorphous magnetic alloy having a magnetic flux density of not less than 6 kilogauss at an external magnetic field of 1 oersted, a coercive force of not more than 0.5 oersted, and a squareness ratio of not less than 0.8 when a frequency is set to be 100 kilohertz. The reactor includes the core having a through hole and conductor wound around the core through the through hole. The core is insulated from the conductor.
    Type: Grant
    Filed: December 1, 1986
    Date of Patent: May 17, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Yorio Hirose, Yasunobu Sakamizu
  • Patent number: 4744719
    Abstract: A multi-joint arm robot apparatus comprises a multi-joint arm having a plurality of unit arms coupled in tandem with each other through joints, and a movable support for supporting the proximal portion of the multi-joint arm. The multi-joint arm robot apparatus has motors for controlling joint angles of the joints and a motor for moving the movable support. These motors are driven by a control system. The control system controls the motors to obtain proper joint angles, in such a way that the joints of the multi-joint arm are put into a given path when the movable support is moved a given unit distance.
    Type: Grant
    Filed: April 30, 1987
    Date of Patent: May 17, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Kuniji Asano, Yoshiaki Arimura, Masao Obama, Yutaka Hitomi, Mitsunori Kondoh
  • Patent number: 4742219
    Abstract: Optical apparatus for controlling the focusing and positional accuracy of a light beam incident on an optical disk tracking guide in an optical read/write system. Laser beams are converged by an objective lens and directed onto the tracking guide to form a beam spot. Light reflected from the tracking guide is reconverged by the objective lens and directed toward a light shielding plate. The reflected light contains an image of the beam spot and diffraction patterns within the beam spot image which are caused by light reflected from the tracking guide. The plate allows only a portion of the reconverged light beam to pass, a portion which is displaced from the optical axis of the beam. The passed portion is converged by a projection lens and passed to a cylindrical lens. The beam spot image in the light passing through the cylindrical lens will become elongated. This light is directed to a photosensitive surface having a plurality of signal producing photosensitive regions.
    Type: Grant
    Filed: August 29, 1986
    Date of Patent: May 3, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Hideo Ando
  • Patent number: 4740825
    Abstract: An opening is formed at a position substantially midway along the widthwise direction of a wide metal wiring layer formed on a semiconductor substrate. A second metal wiring layer is formed in the opening in the same step for forming the wide first metal wiring layer. Drain electrodes of a CMOS inverter formed below the wide first metal wiring layer are connected to the second metal wiring layer through contact holes. The second metal wiring layer is connected to a polycrystalline silicon layer as an output wiring layer through a contact hole.
    Type: Grant
    Filed: January 30, 1987
    Date of Patent: April 26, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Yukihiro Saeki
  • Patent number: 4740750
    Abstract: Reception signal processing apparatus in nuclear magnetic resonance diagnostic apparatus to display as an image the distribution of the spin density or relaxation time of specific atomic nuclei existing in an object utilizing nuclear magnetic resonance phenomena including a phase demodulator for phase demodulating a nuclear magnetic resonance signal evoked by nuclear magnetic resonance phenomena in accordance with two reference waves, the phases of which are different by 90.degree., an analog-to-digital convertor for digitalizing the separated two signals obtained by the phase demodulator, and a noise correction processor for eliminating the low frequency component noises included in the demodulated signals from the phase demodulator to obtain an image without artifacts.
    Type: Grant
    Filed: February 10, 1986
    Date of Patent: April 26, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Yoshio Machida
  • Patent number: 4739172
    Abstract: A phosphor screen constructed by forming a phosphor layer on one side of an optical fiber plate consisting of a large number of bundled single optical fibers, each of which fibers comprises a cylindrical core and a clad surrounding the curved surface of the fiber core. At least that side of the respective fiber cores which faces the phosphor layer is removed, to provide a depression. Sufficiently large spaces are formed between the fiber cores and phosphor layer, to prevent both members from being brought into optical contact with each other.
    Type: Grant
    Filed: January 5, 1987
    Date of Patent: April 19, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Yoshiharu Obata, Takashi Noji, Masahiro Sugiyama, Shigeharu Kawamura
  • Patent number: 4737780
    Abstract: A display control circuit comprises dynamic memory chips as a video RAM for storing pattern data or character codes to be displayed on a screen, and a read controller for generating a reading address (including a raster address and a memory address). For refreshing all memory cells for the dynamic memory chips within a predetermined refresh period, the circuit further comprises an address converter for supplying a part of the raster address and a part of the memory address to a row address of the memory chips and for supplying all or a part of the remaining reading address to a column address thereof so that a part of the raster address is assigned to the lower bit location of the row address.
    Type: Grant
    Filed: September 16, 1983
    Date of Patent: April 12, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Takatoshi Ishii
  • Patent number: 4737862
    Abstract: In a record mode, a record video signal applied to an input terminal is separated into a luminance signal and a color signal by a comb filter made up of a 1H delay line, an adder circuit and a subtraction circuit. In a playback mode, the reproduced luminance signal and color signal are added together in an adder circuit, thereby to form a video signal. This video signal is applied to the comb filter through switches and then is separated into a luminance signal and a color signal.
    Type: Grant
    Filed: November 21, 1983
    Date of Patent: April 12, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Takashi Koga
  • Patent number: 4736200
    Abstract: A graphic apparatus of the invention having a clip function includes a clip register storing coordinates of points defining a display designation clip area. The contents of the clip register and an address supplied to a bit map memory are compared by a comparator. Control operation for clipping is performed such that only data falling within the clip area is written in the bit map memory in accordance with the comparison result of the comparator.
    Type: Grant
    Filed: November 21, 1983
    Date of Patent: April 5, 1988
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Shouji Ounuma