Patents Assigned to TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
  • Patent number: 12034415
    Abstract: According to one embodiment, a semiconductor circuit includes: an amplifier including an input terminal; an output circuit including a first node connected to the amplifier, and first and second output terminals, the output circuit performing a first output mode using one of the first and second output terminals or a second output mode using the first and second output terminals; and a bypass circuit between the input terminal and the first node. The output circuit includes a first switch between a second node and the first output terminal, a second switch between a third node and the second output terminal, a third switch between the second and third nodes, a first passive circuit connected to the second node, a second passive circuit connected to the third node, and a third passive circuit between the second and third nodes.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: July 9, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Toshiki Seshita, Yasuhiko Kuriyama
  • Patent number: 12033676
    Abstract: According to one embodiment, a magnetic head includes first and second magnetic poles, and a stacked body provided between the first and second magnetic poles. The stacked body includes a first magnetic layer, a second magnetic layer provided between the second magnetic pole and the first magnetic layer, a third magnetic layer provided between the second magnetic pole and the second magnetic layer, a fourth magnetic layer provided between the second magnetic pole and the third magnetic layer, a first non-magnetic layer provided between the first magnetic layer and the first magnetic pole, a second non-magnetic layer provided between the second and first magnetic layers, a third non-magnetic layer provided between the third and second magnetic layers, a fourth non-magnetic layer provided between the fourth magnetic layer and the third magnetic layer, and a fifth non-magnetic layer provided between the second magnetic pole and the fourth magnetic layer.
    Type: Grant
    Filed: November 1, 2022
    Date of Patent: July 9, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yuji Nakagawa, Naoyuki Narita, Masayuki Takagishi, Tomoyuki Maeda, Tazumi Nagasawa, Hirofumi Suto
  • Patent number: 12033662
    Abstract: A magnetic disk device includes a disk including a plurality of error sectors including a defect, a first track having a first parity sector, and a controller. The controller is configured to, upon receiving a write command to write first data in a first region of a portion of the first track, which is a portion of the first track, first perform an XOR operation on all sectors of the first track other than one or more sectors of the first region and the first parity sector of the first track, and then write the first data in the one or more sectors of the first region, perform a second XOR operation on the one or more sectors of the first region and the result of the first XOR operation, and write the result of the second XOR operation in the first parity sector.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: July 9, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Kana Furuhashi, Hiroyuki Takeda
  • Patent number: 12033335
    Abstract: According to one embodiment, a motion estimation device includes a first receiving circuit that receives a first input frame and a calculation circuit that performs motion estimation processing on the first input frame. The calculation circuit estimates a distance for each pixel of the first input frame and estimates a reliability of the distance for each pixel of the first input frame based on pixel information of the first input frame.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: July 9, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Yutaka Yamada, Yuichi Oda, Manabu Nishiyama, Yutaka Oki
  • Publication number: 20240222499
    Abstract: A semiconductor device according to an embodiment includes first to third semiconductor regions, a structure body, a gate electrode, and a high resistance part. The structure body includes an insulating part and a conductive part. The insulating part is arranged with the third semiconductor region, the second semiconductor region, and a portion of the first semiconductor region. The conductive part is located in the insulating part. The conductive part includes a portion facing the first semiconductor region. The high resistance part is located in the first semiconductor region and has a higher electrical resistance than the first semiconductor region. A plurality of the structure bodies includes first to third structure bodies. The second and third structure bodies are next to the first structure body. The high resistance part overlaps a circle center of an imaginary circle passing through centers of the first to third structure bodies.
    Type: Application
    Filed: March 19, 2024
    Publication date: July 4, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Takuo KIKUCHI, Kazuyuki ITO, Satoshi AKUTSU
  • Patent number: 12027611
    Abstract: A semiconductor device includes: a first electrode; a first semiconductor layer located on the first electrode in a diode region; a second semiconductor layer located on the first electrode in an IGBT region; a third semiconductor layer located in the diode region, the boundary region, and the IGBT region and positioned on the first semiconductor layer and the second semiconductor layer; a fourth semiconductor layer located on the third semiconductor layer in the boundary region and the IGBT region; a fifth semiconductor layer located on the third semiconductor layer and the fourth semiconductor layer; a second electrode located in the diode region; a third electrode located in the IGBT region; and a fourth electrode extending from an upper surface of the fifth semiconductor layer toward the third semiconductor layer in the boundary region and electrically insulated from the third electrode.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: July 2, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Yoko Iwakaji, Tomoko Matsudai
  • Patent number: 12027180
    Abstract: A magnetic disk device according to one embodiment includes a magnetic disk on which multiple tracks are provided, a magnetic head, and a controller. At least one of the multiple tracks includes first sectors and a second sector. Each of the first sectors stores data segments. The second sector stores a parity for error correction. The magnetic head executes writing/reading to/from the magnetic disk. The controller executes processing of adjusting a guaranteed number of times by using a second sector being invalid. The guaranteed number of times indicates a number of times of writing for guaranteeing reading from an adjacent track.
    Type: Grant
    Filed: August 22, 2023
    Date of Patent: July 2, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Takato Uchida
  • Patent number: 12026443
    Abstract: A non-transitory computer readable recording medium includes simulation data input into a computing device executing a simulation of a semiconductor device, wherein the simulation data includes part shape information describing shape and terminal information of the semiconductor device, logical model information describing operation and connection information of an element in the semiconductor device, and functional block information describing positional information of a functional block in the semiconductor device, and the computing device causes the part shape information, the logical model information, and the functional block information to correspond to each other to execute the simulation of the semiconductor device.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: July 2, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hitoshi Imi, Motochika Okano, Yoshinori Fukuba
  • Patent number: 12027614
    Abstract: A semiconductor device of an embodiment includes: a semiconductor layer including an element region and an element isolation region; a first insulation film provided on the semiconductor layer; a first electrode provided on the first insulation film and extending in a first direction; a second electrode provided on the semiconductor layer, arranged in a second direction intersecting with the first direction, and extending in the first direction; a third electrode provided on the semiconductor layer, arranged in the second direction, and extending in the first direction; second insulation films provided between the first insulation film and the semiconductor layer, and interposing the third electrode in the second direction; a first field plate electrode provided on the first electrode and connected to the first electrode; a second field plate electrode provided on the first field plate electrode and connected to the second electrode; and a third field plate electrode provided on the third electrode and connec
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: July 2, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hitoshi Kobayashi, Yasuhiro Isobe, Hung Hung
  • Patent number: 12027187
    Abstract: According to one embodiment, a magnetic disk device comprises a magnetic head including a main pole, an auxiliary magnetic pole, side shields disposed on both sides of the main pole in a track width direction with a side gap therebetween, a high frequency oscillation element disposed in the write gap between the main pole and the auxiliary magnetic pole, and a magnetic flux control element disposed in the side gap between the main pole and the side shield to control oscillation frequency of the high frequency oscillation element, an oscillation element controller configured to control bias current supplied to the high frequency oscillation element, and a magnetic flux control element controller configured to control bias current supplied to the magnetic flux control element.
    Type: Grant
    Filed: March 8, 2023
    Date of Patent: July 2, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Gaku Koizumi
  • Patent number: 12027188
    Abstract: According to one embodiment, in a disk device, a controller adjusts a correction value of a radial position of servo track according to a ratio between amplitude of a correction value spectrum of a radial position of the servo track at a first circumferential position and at a second circumferential position when positioning control of the head to a target data track is performed on a basis of servo information read from the servo track. At the first circumferential position, a relative speed of a change in the radial position of the servo track with respect to a radial position of the target data track becomes a first speed. At the second circumferential position, a relative speed of a change in the radial position of the servo track with respect to the radial position of the target data track becomes a second speed.
    Type: Grant
    Filed: March 7, 2023
    Date of Patent: July 2, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Takuya Ogawa, Wataru Tsukahara
  • Patent number: 12025705
    Abstract: A distance measuring device is a distance measuring device that performs processing on a time-series luminance signal generated on the basis of a sensor output corresponding to reflected light of laser light. The distance measuring device includes a storage circuit and a determination circuit. The storage circuit stores a first time-series luminance signal based on reflected light from a first measurement target of laser light and a second time-series luminance signal based on reflected light from a second measurement target of laser light. The determination circuit determines, on the basis of correlation between the first time-series luminance signal and the second time-series luminance signal, whether the first measurement target and the second measurement target are the same measurement target.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: July 2, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroshi Kubota, Nobu Matsumoto
  • Patent number: 12027189
    Abstract: According to one embodiment, a magnetic disk device includes a magnetic disk, a magnetic head including a write head which writes data to the magnetic disk, a read head which reads data from the magnetic disk, a first heater which adjusts a flying height of the write head, a second heater which adjusts a flying height of the read head and a controller which controls powers supplied to the first heater and the second heat, and controls a power value of the power supplied to the first heater according to a ratio between an electric resistance value of the first heater and an electric resistance value of the second heater.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: July 2, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Takao Furuhashi
  • Patent number: 12021513
    Abstract: A semiconductor device includes an input terminal, an output terminal, and a plurality of transistors. The transistors are coupled through serial coupling. The transistors include a first transistor and a second transistor. The first transistor has a first end and a second end. The second transistor has a third end, a fourth end, a first gate, and a first body. The third end is coupled to the second end. The semiconductor device further includes a third transistor and a first diode. The third transistor and the first diode are serially coupled between the first body and the first end. The third transistor includes a second gate coupled to the first gate.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: June 25, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Yosuke Ogasawara, Takayuki Teraguchi
  • Patent number: 12019462
    Abstract: According to one embodiment, a constant voltage circuit includes: a first gain stage configured to output a first voltage amplified based on an output voltage and a reference voltage; a first transistor configured to control the output voltage based on the first voltage; a second transistor configured to control a current that flows through the first gain stage; a first circuit configured to convert an amount of fluctuation in the output voltage into a first current; and a second circuit configured to control a gate voltage of the second transistor based on the first current. A third current or a fourth current greater than the third current flows through the first gain stage based on the gate voltage of the second transistor.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: June 25, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Toru Hashimoto, Akio Ogura
  • Patent number: 12014757
    Abstract: According to one embodiment, a disk device includes a rotatable magnetic disk, an actuator which supports and moves a head, a ramp which holds the head at an unloaded position, a motor which rotates the magnetic disk, and a controller which performs a load operation and a seek operation. When a radial travel speed of the head during the load operation is referred to as Vr1, a circumferential travel speed of the head is referred to as Vt1, a radial travel speed of the head during the seek operation is referred to as Vrs, and a circumferential travel speed is referred to as Vts, the controller controls at least one of the radial travel speed of the head and number of revolutions of the magnetic disk to satisfy a relationship (Vr1/Vt1)<(Vrs/Vts).
    Type: Grant
    Filed: February 15, 2023
    Date of Patent: June 18, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Shinichi Kobatake, Toru Watanabe, Masami Yamane
  • Publication number: 20240194739
    Abstract: According to one embodiment, a semiconductor device include first to third electrode, a semiconductor member, a first conductive member, and a first insulating member. A second insulating region of the first insulating member includes a first face facing the third partial region of the first semiconductor region. The third insulating region of the first insulating member includes a second face facing the third partial region of the first semiconductor region. The first face includes a first end on a side of the first electrode in the first direction. The second face includes a second end on a side of the second electrode in the first direction. A second position of the second end in the second direction is different from a first position of the first end in the second direction.
    Type: Application
    Filed: August 15, 2023
    Publication date: June 13, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Shotaro BABA, Tomoaki INOKUCHI, Tatsuo SHIMIZU, Tatsuya NISHIWAKI
  • Publication number: 20240195408
    Abstract: The semiconductor drive device includes a third turn-off gate resistor that is electrically connected to the third gate electrode of each of the first semiconductor device and the second semiconductor device, and that is inserted into a third turn-off interconnect configured to apply a potential for turning off the third gate electrode. And R CGsoff ? Vth ? 3 min ? ( C CGsgc ) ? dv dt ( 1 ) where, in each of the first semiconductor device and the second semiconductor device, a threshold voltage of the third gate electrode being Vth3, a resistance value of the third turn-off gate resistor being RCGsoff, a minimum value of a capacitance between the third gate electrode and the collector electrode in a voltage dependence characteristic being min (CCGsgc), and a time displacement of a voltage at a time of turning on being dv/dt.
    Type: Application
    Filed: August 21, 2023
    Publication date: June 13, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Kento ADACHI, Tatsunori SAKANO
  • Patent number: 12007481
    Abstract: A sensor includes an avalanche photodiode (APD), a first resistor, a second resistor, and a rectification element. The first resistor is connected between a current output terminal of the APD and a first output terminal. The second resistor and the rectification element are connected in series between the current output terminal and a second output terminal. The rectification element is connected between the second resistor and the second output terminal.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: June 11, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hiroshi Kubota, Nobu Matsumoto
  • Patent number: 12009739
    Abstract: A power supply circuit in an embodiment includes a first transistor controlled to be turned on and off by a control signal supplied to a gate to output an output voltage following a predetermined voltage, a second transistor, one end of a current path of which is connected to an input terminal for supplying a power supply voltage, the second transistor outputting the predetermined voltage according to the control signal, and an amplifier circuit configured to amplify a voltage difference between a reference voltage and the predetermined voltage, and output the voltage difference as the control signal.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: June 11, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Chen Kong Teh