Patents Assigned to TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
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Patent number: 11862698Abstract: A semiconductor device of embodiments includes a first electrode, a second electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, a conductive portion, a first insulating portion, a gate electrode, a second insulating portion, and a third insulating portion. The first to third semiconductor regions are provided between the first electrode and the second electrode. The conductive portion includes a first conductive portion and a second conductive portion on the second electrode side and having a lower impurity concentration than the first conductive portion. The first insulating portion is provided between the first conductive portion and the first semiconductor region. The gate electrode is provided between the second semiconductor region and the second conductive portion. The second insulating portion is provided between the second conductive portion and the gate electrode.Type: GrantFiled: September 13, 2021Date of Patent: January 2, 2024Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Saya Shimomura, Hiroaki Katou, Toshifumi Nishiguchi
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Patent number: 11862206Abstract: According to one embodiment, a magnetic recording/reproducing device includes a plurality of magnetic recording medium each including a recording surface, a plurality of assisted magnetic recording heads each provided with the recording surface in order to perform assisted recording, and an assisting amount adjustment part connected to the assisted magnetic recording heads in order to adjust an assisting amount of each assisted magnetic recording head corresponding to a recording capacity of the recording surface.Type: GrantFiled: July 8, 2022Date of Patent: January 2, 2024Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Kaori Kimura, Masaya Ohtake, Akihiko Takeo
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Patent number: 11861183Abstract: A disk device includes a volatile memory, a nonvolatile memory, and a controller. The controller is configured to receive, from a host, a key setting request that includes a cryptographic key, a key ID thereof, and tag information of the cryptographic key and generate generation information of the cryptographic key. The controller is also configured to store a first entry including the tag information, the cryptographic key, and the generation information associated with each other in the volatile memory, and store a second entry including the key ID and the generation information associated with each other in the nonvolatile memory.Type: GrantFiled: February 24, 2022Date of Patent: January 2, 2024Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Kazumasa Nomura, Kana Furuhashi
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Patent number: 11862213Abstract: According to one embodiment, a magnetic disk device includes a disk that has a track including a first servo sector and a second servo sector that is different from the first servo sector, a head that writes data to the disk and reads data from the disk, and a controller that records first signal strength record data related to a signal strength at which first target servo data that is a target of the first servo sector is read, and standardizes first signal strength data related to a signal strength at which the first target servo data is read when the first target servo data is read.Type: GrantFiled: July 14, 2022Date of Patent: January 2, 2024Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Nobuhiro Maeto
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Patent number: 11862196Abstract: A method reduces the effect of accelerating/decelerating an “aggressor actuator” in a multi-actuator drive on a “victim actuator” in the drive. Measurements of fractional-wedge timing-offsets for an aggressor head are used to adjust the aggressor actuator commands that are inputted to a victim disturbance feedforward signal generator when a timing offset exists between the currently-used aggressor head and the aggressor head that was used to measure transfer functions for determining victim feedforward signals. When such a timing offset is equivalent to a specific fraction of the time period separating servo wedges, values of the aggressor actuator commands that are inputted to the victim disturbance feedforward signal generator may be modified based on the specific fraction. Feedforward signals may be modified when a timing offset exists between and the current timing of the currently-used victim head and an original timing of the currently-used victim head.Type: GrantFiled: August 1, 2022Date of Patent: January 2, 2024Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Richard M. Ehrlich
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Patent number: 11862677Abstract: A semiconductor device includes a semiconductor part, a first electrode and control electrodes at the front side of the semiconductor part. The semiconductor part includes first to fourth layers, first and third layers being of a first conductivity type, second and fourth layers being of a second conductivity type. The control electrodes are provided in a plurality of trenches, respectively. The control electrodes include a first control electrode, and a second control electrode next to the first control electrode. The second layer is provided between the first layer and the first electrode. The third and fourth layers are provided between the second layer and the first electrode. The semiconductor part further includes a first region partially provided between the first and second layers. The first region is provided between the first and third layers, the first region including a material having a lower thermal conductivity than the first layer.Type: GrantFiled: July 26, 2021Date of Patent: January 2, 2024Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Takeshi Suwa, Tomoko Matsudai, Yoko Iwakaji, Hiroko Itokazu
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Patent number: 11862193Abstract: According to one embodiment, a magnetic disk device comprises an actuator, a controller that controls the actuator, a loop shaping filter connected in parallel with the controller, the loop shaping filter having a parameter for suppressing a rotation asynchronous disturbance affecting the actuator, the parameter of the loop shaping filter being determined using a transfer function from an output of the loop shaping filter to before an input of the rotation asynchronous disturbance, and a notch filter that suppresses mechanical resonance of the actuator.Type: GrantFiled: August 23, 2022Date of Patent: January 2, 2024Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Takuji Matsuzawa
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Patent number: 11862629Abstract: According to an embodiment, a semiconductor device includes a first electrically conductive portion, a first semiconductor chip of a reverse-conducting insulated gate bipolar transistor, a second electrically conductive portion, a third electrically conductive portion, a second semiconductor chip of an insulated gate bipolar transistor, and a fourth electrically conductive portion. The first semiconductor chip includes a first electrode and a second electrode. The first electrode is electrically connected to the first electrically conductive portion. The second electrically conductive portion is electrically connected to the second electrode. The third electrically conductive portion is electrically connected to the first electrically conductive portion. The second semiconductor chip includes a third electrode and a fourth electrode. The third electrode is electrically connected to the third electrically conductive portion.Type: GrantFiled: December 14, 2021Date of Patent: January 2, 2024Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Kenji Itakura
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Patent number: 11852659Abstract: A current detection device of an embodiment includes a conductor, a first magnetic field detector, a second magnetic field detector, and a conductive film. The conductor includes a first region, a second region, and a third region connecting an edge of the first region and an edge of the second region. The first magnetic field detector is disposed between the first and second regions. The second magnetic field detector is disposed opposite to the first magnetic field detector with respect to the third region. The conductive film is bonded to a conductor layer including a slit having a width larger than each of widths of magneto-sensitive parts of the first and second magnetic field detectors and covers the slit, the conductor layer being provided between the conductor and each of the first and second magnetic field detectors.Type: GrantFiled: February 24, 2022Date of Patent: December 26, 2023Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Jia Liu, Yasuyuki Fujiwara
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Patent number: 11855659Abstract: An isolator of embodiments includes a ?? analog-digital converter configured to convert an analog signal into a digital signal of one bit and transmit the digital signal of one bit as normal data, a time direction multiplexing circuit configured to perform time direction multiplexing of alternately performing conversion of the normal data into a digital differential signal and transmission of the digital differential signal, and transmission of a special signal different from the normal data, and an insulated transmission circuit configured to transmit the digital differential signal and the special signal transmitted from the time direction multiplexing circuit via an insulating layer.Type: GrantFiled: November 30, 2022Date of Patent: December 26, 2023Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Masaki Nishikawa, Shoji Ootaka
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Patent number: 11856112Abstract: According to one embodiment, a server device includes a memory and a processor. The memory stores verification information. The processor accepts a request to transmit a certificate number, generates information in which identification information of one of storage devices from which data is to be erased, a public key, a secret key, and the certificate number are associated with one another, transmits the certificate number, performs verification using an authenticator transmitted by the one storage device and verification information, generates, based on a result of the verification, an erasure certificate that includes the identification information and the certificate number and is signed using the secret key, and transmits the erasure certificate.Type: GrantFiled: August 30, 2021Date of Patent: December 26, 2023Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Mika Fujishiro, Yasuto Aramaki, Tatsuaki Iwata, Hiromi Sakata, Taichiro Yamanaka, Daisuke Mito
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Patent number: 11855206Abstract: A semiconductor device includes first and second metal layers, a dielectric layer, first, second, and third semiconductor regions, a first control electrode, and a first electrode. The dielectric layer is located on the first metal layer. The second metal layer is located on the dielectric layer, and electrically connected with the first metal layer. The first semiconductor region is located on the second metal layer and electrically connected with the second metal layer. The second semiconductor region is located on the first semiconductor region. The third semiconductor region is located on the second semiconductor region. The first control electrode faces the second semiconductor region via a first insulating film. The first electrode is located on the third semiconductor region and the first control electrode, electrically connected with the third semiconductor region, and insulated from the first control electrode by a first insulating portion.Type: GrantFiled: September 1, 2021Date of Patent: December 26, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Masataka Ino
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Patent number: 11855157Abstract: A semiconductor device includes a semiconductor part, a first electrode at a back surface of the semiconductor part; a second electrode at a front surface of the semiconductor part; third and fourth electrodes provided between the semiconductor part and the second electrode. The third and fourth electrodes are arranged in a first direction along the front surface of the semiconductor part. The third electrode is electrically insulated from the semiconductor part by a first insulating film. The third electrode is electrically insulated from the second electrode by a second insulating film. The fourth electrode is electrically insulated from the semiconductor part by a third insulating film. The fourth electrode is electrically isolated from the third electrode. the third and fourth electrodes extend into the semiconductor part. The fourth electrode includes a material having a larger thermal conductivity than a thermal conductivity of a material of the third electrode.Type: GrantFiled: December 14, 2022Date of Patent: December 26, 2023Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Takeshi Suwa, Tomoko Matsudai, Yoko Iwakaji
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Patent number: 11843370Abstract: A gate of the first p-type MOS transistor and the first and second control circuits are electrically coupled to a first node. The first control circuit lowers a voltage or the first node between a first time and a second time at which the first p-type MOS transistor is off. The second control circuit lowers the voltage of the first node between a third time and a fourth time at which the first p-type MOS transistor is on. The second time is later than the first time. The fourth time is later than the second and third times. The first p-type MOS transistor is turned on during a first period. A voltage decrease amount of the first node per unit time in the first control circuit is greater than that in the second control circuit.Type: GrantFiled: September 8, 2022Date of Patent: December 12, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Tsuneyuki Hayashi
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Patent number: 11842047Abstract: According to one embodiment, a magnetic disk device includes a power supply, a magnetic disk, a magnetic head, a communication unit that is communicable with a host computer and transmits a signal to the host computer at a first interval, a power supply monitor, a volatile memory that stores data related to read/write processing on the magnetic disk by the magnetic head, a non-volatile memory, and a controller that controls the communication unit to start processing of backing up the data stored in the volatile memory to the non-volatile memory and transmit the signal at a second interval longer than the first interval if power supplied from the power supply is detected to be disconnected based on monitoring of the power supply monitor.Type: GrantFiled: March 10, 2022Date of Patent: December 12, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Kenji Koyama
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Patent number: 11838008Abstract: A current detection circuit includes normally-on-type and a first normally-off-type switching elements with main current paths that are connected in series, and a second normally-off-type switching element that has a source and a gate that are connected to a source and a gate of the first normally-off-type switching element and a drain that is connected to a constant current source, and executes a division process by using drain voltages of the two normally-off-type switching elements.Type: GrantFiled: December 20, 2022Date of Patent: December 5, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Hideaki Majima
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Patent number: 11838013Abstract: A semiconductor device that normally-off drives a first transistor that normally-on drives, the semiconductor device includes a first circuitry, a second circuitry, and a first diode. The first circuitry that is connected with a power supply voltage and a ground voltage, detects the power supply voltage, and outputs a transition state of the power supply voltage. The second circuitry that is connected with the power supply voltage, the ground voltage, the first circuitry, and a second transistor, and outputs a drive voltage of a second transistor connected in series with the first transistor, based on an output of the first circuitry. The first diode having an anode connected with a drive terminal of the first transistor and a cathode connected with an output terminal of the second transistor.Type: GrantFiled: May 31, 2022Date of Patent: December 5, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Yasuyuki Fujiwara, Yiyao Liu, Yusuke Sato, Naotsugu Kako, Hideaki Majima
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Patent number: 11837654Abstract: A semiconductor device includes first and second electrodes, a semiconductor part therebetween, and a control electrode between the semiconductor part and the first electrode. The semiconductor part includes first, third and fifth layers of a first conductivity type and second and fourth layers of a second conductivity type. The second layer is provided between the first layer and the first electrode. The third layer is provided between the second layer and the first electrode. The fourth layer and the fifth layer are selectively provided between the first layer and the second electrode. In a method for controlling the semiconductor device, first to third voltages are applied in order to the control electrode while a p-n junction between the first and second layers is biased in a forward direction. The second and third voltages are greater than the first voltage, and the third voltage is less than the second voltage.Type: GrantFiled: December 20, 2022Date of Patent: December 5, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Ryohei Gejo, Tatsunori Sakano
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Publication number: 20230386510Abstract: According to one embodiment, a magnetic recording device includes a magnetic head and a controller. The magnetic head includes first and second magnetic poles, a magnetic element provided between the first magnetic pole and the second magnetic pole, first and second terminals electrically connected to one end and another end of the magnetic element, respectively, and a coil. The controller is electrically connected to the magnetic element and the coil, and performs a recording operation. In the recording operation, the controller supplies a recording current to the coil while applying an element voltage between the first and second terminals. When the applied voltage is changed while the recording current is supplied, a differential resistance of the magnetic element becomes a first differential resistance peak when the applied voltage is a first voltage, and becomes a second differential resistance peak when the applied voltage is a second voltage.Type: ApplicationFiled: February 3, 2023Publication date: November 30, 2023Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Yuji NAKAGAWA, Naoyuki NARITA, Masayuki TAKAGISHI, Tomoyuki MAEDA
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Patent number: 11830920Abstract: A semiconductor device includes a semiconductor part including a first semiconductor layer of a first conductivity type; a first electrode provided on a back surface of the semiconductor part; and a second electrode provided on a front surface of the semiconductor part. The second electrode includes a barrier layer and a metal layer. The barrier layer contacts the first semiconductor layer and including vanadium or a vanadium compound as a major component. The metal layer is provided on the barrier layer.Type: GrantFiled: August 19, 2021Date of Patent: November 28, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Naofumi Hirata, Tomomi Kuraguchi, Shinichi Ueki, Yoichi Hori, Kei Tanihira