Abstract: To achieve high accuracy and high processing speed, a time series data evaluation device is equipped with a probability calculation unit 201 that calculates the probability p(i) that ?t?Ai; a division entropy calculation unit 202 that calculates division entropy using the measure in the subdivision interval by setting a subdivision section Bi (i=1, 2, . . . , M×Q) by further dividing the divided section Ai (i=1, 2, . . . , M) into Q equal parts; and a summation calculation unit 203 that performs a summation calculation of the divided interval range regarding the multiplication of the probability p(i) and the division entropy.

Abstract: A hardware trojan detection method is provided including an input and output updating step of updating input and output values of all logic cells by performing computations according to logical expressions of all logic cells included in a netlist to be verified and a detection step of performing hardware trojan detection based on a comparison result of the updated input and output values and a threshold.

Abstract: An apparatus of analog-neuron includes a synapse circuit for performing arithmetic processing for multiplying an input signal that arrives at an input terminal by a weight value, a synapse output holding means for holding an output signal of the synapse circuit, and a power control unit for controlling whether to supply power at least to the synapse circuit or to stop supplying power in response to whether the input signal has arrived at the input terminal or has been lost.

Abstract: According to one embodiment, a memory system includes a nonvolatile memory device to store data; and a memory controller configured to: manage first information allocated to each user and including first management data; perform first processing for an access to the nonvolatile memory device when an access request to the nonvolatile memory device has been received from the user and the first management data is equal to or larger than a first value; and perform second processing for an access to the nonvolatile memory device when the first management data is equal to or larger than a second value.

Abstract: According to one embodiment, a memory system is configured to include a nonvolatile memory and a controller circuit. The controller circuit is electrically connected to the nonvolatile memory. The controller circuit executes a first process and a second process. The first process manages a history of accesses to first storage areas of the nonvolatile memory. The second process manages a progress of accesses to all storage areas of the first storage areas within a first time limit, based on the history of the accesses.

Abstract: According to one embodiment, a storage device includes a first memory cell; a second memory cell; and a controller configured to, in response to receiving a first command set, execute a first erase operation which is included in an erase operation of data of the first memory cell, and suspend the first erase operation, and in response to receiving a second command set, execute a read operation or a write operation of the second memory cell and subsequently resume the suspended first erase operation.

Abstract: A neural network not requiring massive changes in configuration when changing the number of stages (number of levels) of the neural network. This neural network is provided with at least one neuron core 10 performing an analog multiply-accumulate operation and a weight-value-supply control unit 30 supplying the weight value to the neuron core 10. This neural network is subjected to control processing by a control-processor unit 40 controlling the supply of the weight value from said weight-value-supply control unit 30 in synchronization with the timing of the analog multiply-accumulate operation of the neuron core 10, and processing the data output from the neuron core 10 at every analog multiply-accumulate operation performed by said neuron core as serial data and/or parallel data.

Abstract: A terminal detection method that includes a search step, a first acquisition step, a second acquisition step, and a detection step. The search step transmits a response request through broadcast communication and searches a terminal device that exists within a predetermined range. The first acquisition step acquires, from the terminal device, at least specific information of the terminal device. The second acquisition step executes communication with the terminal device based on the specific information acquired in the first acquisition step and acquires second information that indicates a function possessed by the terminal device. The detection step detects that the terminal device has a desired function based on the first information acquired in the first acquisition step and the second information acquired in the second acquisition step.

Abstract: A terminal detection method that includes a search step, a first acquisition step, a second acquisition step, and a detection step. The search step transmits a response request through broadcast communication and searches a terminal device that exists within a predetermined range. The first acquisition step acquires, from the terminal device, at least specific information of the terminal device. The second acquisition step executes communication with the terminal device based on the specific information acquired in the first acquisition step and acquires second information that indicates a function possessed by the terminal device. The detection step detects that the terminal device has a desired function based on the first information acquired in the first acquisition step and the second information acquired in the second acquisition step.

Abstract: According to one embodiment, a storage device includes a first memory cell; a second memory cell; and a controller configured to, in response to receiving a first command set, execute a first erase operation which is included in an erase operation of data of the first memory cell, and suspend the first erase operation, and in response to receiving a second command set, execute a read operation or a write operation of the second memory cell and subsequently resume the suspended first erase operation.

Abstract: According to one embodiment, a semiconductor memory device includes a plurality of stacked first chips and a second chip. The second chip outputs a first signal to the first chips. The first chip outputs status information at timing based on the received first signal. The first chip shifts the received first signal and outputs the shifted first signal to the first chip of a next stage in synchronization with the first clock signal. The second chip receives a plurality of status information output in a serial manner from the first chips.

Abstract: In a determination as to similarity on parts of a piece of data, high-speed processing is performed without the need for a database. Division signal lines (L1 to Lk) that transmit signals corresponding to division data are used.

Abstract: According to one embodiment, a vertical selection circuit that sets an electronic shutter state and a read-out state in time division multiplexing for each selected row of a pixel array unit in which the pixels are arranged in a matrix pattern, a pulse selector circuit that drives the pixels belonging to the selected row in accordance with the electronic shutter state and the read-out state, and a timing generator circuit that controls operational timing of the vertical selection circuit and the pulse selector circuit are included.

Abstract: Encryption, having sufficient concealment, is carried out through chaotic computation using integer arithmetic. There is provided a cipher generating device, for carrying out computation, for plain text information, to apply chaotic noise obtained using a mapping function for generating chaotic noise based on encrypted key data, to generate a cipher. This cipher generation device comprises parameter generation means 102 for generating a parameter string for use in chaotic computation based on the key data, chaotic noise generating means 103 for carrying out chaotic computation using the parameter string generated by the parameter generating means 102 and obtaining the chaotic noise, and scheduling means 104 for carrying out scheduling of the parameter string so as to cause a change in the parameter string every fixed cycle the parameter string is used in the chaotic computation.

Abstract: Encryption, having sufficient concealment, is carried out through chaotic computation using integer arithmetic. There is provided a cipher generating device, for carrying out computation, for plain text information, to apply chaotic noise obtained using a mapping function for generating chaotic noise based on encrypted key data, to generate a cipher. This cipher generation device comprises parameter generation means 102 for generating a parameter string for use in chaotic computation based on the key data, chaotic noise generating means 103 for carrying out chaotic computation using the parameter string generated by the parameter generating means 102 and obtaining the chaotic noise, and scheduling means 104 for carrying out scheduling of the parameter string so as to cause a change in the parameter string every fixed cycle the parameter string is used in the chaotic computation.

Abstract: It is necessary to authenticate each access by permitting or refusing it when a client makes an access to a server in a client-server system in which clients and servers are interconnected via a network. The client utilizes memory medium which stores both the server address and the memory medium's identification information. The client also uses a read-out device to fetch the contents of the memory medium and uses thus read out server address, to be connected to a desired server and then transmits the abovementioned read out identification information to ask for server access permission. The server, in response, when having received a server access permission request from the client, compares the memory medium identification information sent upon permission requesting to identification information stored beforehand and, based on the comparison results, sends the client the authentication of server access permission or refusal.

Abstract: It is necessary to authenticate each access by permitting or refusing it when a client makes an access to a server in a client-server system in which clients and servers are interconnected via a network. The client utilizes memory medium which stores both the server address and the memory medium's identification information. The client also uses a read-out device to fetch the contents of the memory medium and uses thus read out server address, to be connected to a desired server and then transmits the abovementioned read out identification information to ask for server access permission. The server, in response, when having received a server access permission request from the client, compares the memory medium identification information sent upon permission requesting to identification information stored beforehand and, based on the comparison results, sends the client the authentication of server access permission or refusal.