Patents Assigned to Toshiba Techno Center Inc.
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Publication number: 20150171059Abstract: A light emitting diode (LED) assembly may include an LED semiconductor attached to a first surface of a submount made of optically transparent material. The submount may redirect back side light emitted by the LED semiconductor light away from the LED semiconductor to increase recovery of back side light. The submount may be used with an external bulk reflecting element. The submount may itself include a reflective coating at a second surface opposite from the first surface and be mounted on a reflecting substrate. The submount may include a phosphor forming the first surface or the second surface. The first surface or the second surface may be a textured surface. An array of LED semiconductors may be mounted to the submount. The array of LED semiconductors may be disposed on the submount in an arrangement that optimizes total light output of the LED assembly.Type: ApplicationFiled: June 28, 2013Publication date: June 18, 2015Applicant: TOSHIBA TECHNO CENTER, INC.Inventor: Syn-Yem Hu
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Publication number: 20150069434Abstract: A blue LED device has a transparent substrate and a reflector structure disposed on the backside of the substrate. The reflector structure includes a Distributed Bragg Reflector (DBR) structure having layers configured to reflect yellow light as well as blue light. In one example, the DBR structure includes a first portion where the thicknesses of the layers are larger, and also includes a second portion where the thicknesses of the layers are smaller. In addition to having a reflectance of more than 97.5 percent for light of a wavelength in a 440 nm-470 nm range, the overall reflector structure has a reflectance of more than 90 percent for light of a wavelength in a 500 nm-700 nm range.Type: ApplicationFiled: October 16, 2013Publication date: March 12, 2015Applicant: TOSHIBA TECHNO CENTER INC.Inventor: Chao-Kun LIN
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Publication number: 20140213000Abstract: A device having a carrier, a light-emitting structure, and first and second electrodes is disclosed. The light-emitting structure includes an active layer sandwiched between a p-type GaN layer and an n-type GaN layer, the active layer emitting light of a predetermined wavelength in the active layer when electrons and holes from the n-type GaN layer and the p-type GaN layer, respectively, combine therein. The first and second electrodes are bonded to the surfaces of the p-type and n-type GaN layers that are not adjacent to the active layer. The n-type GaN layer has a thickness less than 1.25 ?m. The carrier is bonded to the light emitting structure during the thinning of the n-type GaN layer. The thinned light-emitting structure can be transferred to a second carrier to provide a device that is analogous to conventional LEDs having contacts on the top surface of the LED.Type: ApplicationFiled: January 30, 2013Publication date: July 31, 2014Applicant: TOSHIBA TECHNO CENTER INC.Inventors: Steven D. Lester, Frank T. Shum
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Patent number: 8759127Abstract: Gold is used as a micromask to roughen a gallium nitride (GaN) surface in an LED device. In one example, a mesh of ITO (Indium Tin Oxide) is formed on a GaN layer. The mesh has holes that extend down to the GaN. A layer of silicon dioxide is deposited so that it covers the GaN at the bottoms of the holes. A layer of gold is formed over the oxide. A thermal treatment causes the gold to ball up into small gold features. These gold features are used as a micromask in a subsequent etching step. Areas of the bottoms of the holes that are not covered by a gold feature are etched. Etching occurs through the oxide and down into the GaN. The roughening process involves no silver, and involves no harsh cleaning solvents or processes that might otherwise have been used were the micromask made of silver.Type: GrantFiled: January 26, 2012Date of Patent: June 24, 2014Assignee: Toshiba Techno Center Inc.Inventor: Syn-Yem Hu
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Publication number: 20140167082Abstract: Enlightening device and method for making the same are disclosed. Individual light emitting devices such as LEDs are separated to form individual dies by process in which a first narrow trench cuts the light emitting portion of the device and a second trench cuts the substrate to which the light emitting portion is attached. The first trench can be less than 10 ?m. Hence, a semiconductor area that would normally be devoted to dicing streets on the wafer is substantially reduced thereby increasing the yield of devices. The devices generated by this method can also include base members that are electrically conducting as well as heat conducting in which the base member is directly bonded to the light emitting layers thereby providing improved heat conduction.Type: ApplicationFiled: September 13, 2013Publication date: June 19, 2014Applicant: TOSHIBA TECHNO CENTER INC.Inventor: Long Yang
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Publication number: 20140151728Abstract: A light emitting device and method for making the same is disclosed. The light-emitting device includes an active layer sandwiched between a p-type semiconductor layer and an n-type semiconductor layer. The active layer emits light when holes from the p-type semiconductor layer combine with electrons from the n-type semiconductor layer therein. The active layer includes a number of sub-layers and has a plurality of pits in which the side surfaces of a plurality of the sub-layers are in contact with the p-type semiconductor material such that holes from the p-type semiconductor material are injected into those sub-layers through the exposed side surfaces without passing through another sub-layer. The pits can be formed by utilizing dislocations in the n-type semiconductor layer and etching the active layer using an etching atmosphere in the same chamber used to deposit the semiconductor layers without removing the partially fabricated device.Type: ApplicationFiled: February 7, 2014Publication date: June 5, 2014Applicant: TOSHIBA TECHNO CENTER INC.Inventors: Steven LESTER, Jeff RAMER, Jun WU, Ling ZHANG
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Patent number: 8729580Abstract: A light emitting device based on a AlInGaN materials system wherein a coating is used to improve the extraction of light from a device. A coating has a very low optical loss and an index of refraction greater than 2. In a preferred embodiment the coating is made from Ta2O5, Nb2O5, TiO2, or SiC and has a thickness between about 0.01 and 10 microns. A surface of a coating material may be textured or shaped to increase its surface area and improve light extraction. A surface of the coating material can also be shaped to engineer the directionality of light escaping the layer. A coating can be applied directly to a surface or multiple surfaces of a light emitting device or can be applied onto a contact material. A coating may also serve as a passivation or protection layer for a device.Type: GrantFiled: December 6, 2005Date of Patent: May 20, 2014Assignee: Toshiba Techno Center, Inc.Inventor: Steven D. Lester
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Publication number: 20140131734Abstract: A light emitting diode (LED) comprises an n-type Group III-V semiconductor layer, an active layer adjacent to the n-type Group III-V semiconductor layer, and a p-type Group III-V semiconductor layer adjacent to the active layer. The active layer includes one or more V-pits. A portion of the p-type Group III-V semiconductor layer is in the V-pits. A p-type dopant injection layer provided during the formation of the p-type Group III-V layer aids in providing a predetermined concentration, distribution and/or uniformity of the p-type dopant in the V-pits.Type: ApplicationFiled: January 17, 2014Publication date: May 15, 2014Applicant: TOSHIBA TECHNO CENTER INC.Inventor: Steve Ting
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Publication number: 20140134775Abstract: A method for forming a light emitting device comprises forming a buffer layer having a plurality of layers comprising a substrate, an aluminum gallium nitride layer adjacent to the substrate, and a gallium nitride layer adjacent to the aluminum gallium nitride layer. During the formation of each of the plurality of layers, one or more process parameters are selected such that an individual layer of the plurality of layers is strained.Type: ApplicationFiled: January 17, 2014Publication date: May 15, 2014Applicant: TOSHIBA TECHNO CENTER INC.Inventors: Long YANG, Will FENWICK
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Publication number: 20140134765Abstract: A vertical GaN-based blue LED has an n-type GaN layer that was grown over a ZnS layer that in turn was grown directly on a silicon substrate. In one example, the ZnS layer is a transitional buffer layer that is 50 nm thick, and the n-type GaN layer is at least 2000 nm thick. Growing the n-type GaN layer on the ZnS buffer layer reduces lattice defect density in the n-type layer. The ZnS buffer layer provides a good lattice constant match with the silicon substrate and provides a compound polar template for subsequent GaN growth. After the epitaxial layers of the LED are formed, a conductive carrier is wafer bonded to the structure. The silicon substrate and the ZnS buffer layer are then removed. Electrodes are added and the structure is singulated to form finished LED devices.Type: ApplicationFiled: January 17, 2014Publication date: May 15, 2014Applicant: TOSHIBA TECHNO CENTER INC.Inventor: Zhen Chen
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Publication number: 20140131658Abstract: A strain release layer adjoining the active layer in a blue LED is bounded on the bottom by a first relatively-highly silicon-doped region and is also bounded on the top by a second relatively-highly silicon-doped region. The second relatively-highly silicon-doped region is a sublayer of the active layer of the LED. The first relatively-highly silicon-doped region is a sublayer of the N-type layer of the LED. The first relatively-highly silicon-doped region is also separated from the remainder of the N-type layer by an intervening sublayer that is only lightly doped with silicon. The silicon doping profile promotes current spreading and high output power (lumens/watt). The LED has a low reverse leakage current and a high ESD breakdown voltage. The strain release layer has a concentration of indium that is between 5×1019 atoms/cm3 and 5×1020 atoms/cm3, and the first and second relatively-highly silicon-doped regions have silicon concentrations that exceed 1×1018 atoms/cm3.Type: ApplicationFiled: January 17, 2014Publication date: May 15, 2014Applicant: TOSHIBA TECHNO CENTER INC.Inventors: Zhen Chen, Yi Fu
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Publication number: 20140127841Abstract: A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling structure is disposed adjacent to one of the first layer and the second layer. In some cases, the light coupling structure is disposed adjacent to the first layer. An orifice formed in the light coupling structure extends to the first layer. An electrode formed in the orifice is in electrical communication with the first layer.Type: ApplicationFiled: January 14, 2014Publication date: May 8, 2014Applicant: TOSHIBA TECHNO CENTER INC.Inventors: Li YAN, Chao-kun LIN, Chih-Wei CHUANG
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Publication number: 20140117404Abstract: A light-emitting device includes first and second semiconductor layers and a light-emitting layer between the first and second semiconductor layers. The light-emitting device also includes an improved electrode structures.Type: ApplicationFiled: January 8, 2014Publication date: May 1, 2014Applicant: TOSHIBA TECHNO CENTER INC.Inventors: Steven D. LESTER, Chao-Kun LIN
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Publication number: 20140106493Abstract: A light emitting diode (LED) comprises an n-type Group III-V semiconductor layer, an active layer adjacent to the n-type Group III-V semiconductor layer, and a p-type Group III-V semiconductor layer adjacent to the active layer. The active layer includes one or more V-pits. A portion of the p-type Group III-V semiconductor layer is in the V-pits. A p-type dopant injection layer provided during the formation of the p-type Group III-V layer aids in providing a predetermined concentration, distribution and/or uniformity of the p-type dopant in the V-pits.Type: ApplicationFiled: December 18, 2013Publication date: April 17, 2014Applicant: TOSHIBA TECHNO CENTER INC.Inventor: Steve Ting
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Patent number: 8698163Abstract: A light emitting diode (LED) comprises an n-type Group III-V semiconductor layer, an active layer adjacent to the n-type Group III-V semiconductor layer, and a p-type Group III-V semiconductor layer adjacent to the active layer. The active layer includes one or more V-pits. A portion of the p-type Group III-V semiconductor layer is in the V-pits. A p-type dopant injection layer provided during the formation of the p-type Group III-V layer aids in providing a predetermined concentration, distribution and/or uniformity of the p-type dopant in the V-pits.Type: GrantFiled: September 29, 2011Date of Patent: April 15, 2014Assignee: Toshiba Techno Center Inc.Inventor: Steve Ting
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Patent number: 8691606Abstract: A light emitting diode comprising an epitaxial layer structure, a first electrode, and a second electrode. The first and second electrodes are separately disposed on the epitaxial layer structure, and the epitaxial layer structure has a root-means-square (RMS) roughness less than about 3 at a surface whereon the first electrode is formed.Type: GrantFiled: April 16, 2012Date of Patent: April 8, 2014Assignee: Toshiba Techno Center Inc.Inventors: Chao-Kun David Lin, Heng Liu
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Patent number: 8684749Abstract: A light emitting device and method for making the same is disclosed. The light-emitting device includes an active layer sandwiched between a p-type semiconductor layer and an n-type semiconductor layer. The active layer emits light when holes from the p-type semiconductor layer combine with electrons from the n-type semiconductor layer therein. The active layer includes a number of sub-layers and has a plurality of pits in which the side surfaces of a plurality of the sub-layers are in contact with the p-type semiconductor material such that holes from the p-type semiconductor material are injected into those sub-layers through the exposed side surfaces without passing through another sub-layer. The pits can be formed by utilizing dislocations in the n-type semiconductor layer and etching the active layer using an etching atmosphere in the same chamber used to deposit the semiconductor layers without removing the partially fabricated device.Type: GrantFiled: August 5, 2013Date of Patent: April 1, 2014Assignee: Toshiba Techno Center Inc.Inventors: Steven Lester, Jeff Ramer, Jun Wu, Ling Zhang
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Patent number: 8686430Abstract: A buffer layer of zinc telluride (ZnTe) or titanium dioxide (TiO2) is formed directly on a silicon substrate. Optionally, a layer of AlN is then formed as a second layer of the buffer layer. A template layer of GaN is then formed over the buffer layer. An epitaxial LED structure for a GaN-based blue LED is formed over the template layer, thereby forming a first multilayer structure. A conductive carrier is then bonded to the first multilayer structure. The silicon substrate and the buffer layer are then removed, thereby forming a second multilayer structure. Electrodes are formed on the second multilayer structure, and the structure is singulated to form blue LED devices.Type: GrantFiled: September 7, 2011Date of Patent: April 1, 2014Assignee: Toshiba Techno Center Inc.Inventor: Zhen Chen
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Publication number: 20140080234Abstract: A light emitting diode comprising an epitaxial layer structure, a first electrode, and a second electrode. The first and second electrodes are separately disposed on the epitaxial layer structure, and the epitaxial layer structure has a root-means-square (RMS) roughness less than about 3 at a surface whereon the first electrode is formed.Type: ApplicationFiled: November 20, 2013Publication date: March 20, 2014Applicant: TOSHIBA TECHNO CENTER INC.Inventors: Chao-Kun Lin, Heng Liu
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Patent number: 8669585Abstract: A strain release layer adjoining the active layer in a blue LED is bounded on the bottom by a first relatively-highly silicon-doped region and is also bounded on the top by a second relatively-highly silicon-doped region. The second relatively-highly silicon-doped region is a sublayer of the active layer of the LED. The first relatively-highly silicon-doped region is a sublayer of the N-type layer of the LED. The first relatively-highly silicon-doped region is also separated from the remainder of the N-type layer by an intervening sublayer that is only lightly doped with silicon. The silicon doping profile promotes current spreading and high output power (lumens/watt). The LED has a low reverse leakage current and a high ESD breakdown voltage. The strain release layer has a concentration of indium that is between 5×1019 atoms/cm3 and 5×102° atoms/cm3, and the first and second relatively-highly silicon-doped regions have silicon concentrations that exceed 1×1018 atoms/cm3.Type: GrantFiled: September 1, 2012Date of Patent: March 11, 2014Assignee: Toshiba Techno Center Inc.Inventors: Zhen Chen, Yi Fu