Abstract: A bandpass amplifier for use in a communication system is described. The amplifier includes first and second first-order filters, first and second multipliers, a quantizer, and a driver. In one embodiment, the first and second first-order filters are coupled in series. The first multiplier multiplies a signal from the first first-order filter by a coefficient k1, and the second multiplier multiplies a signal from the second first-order filter by a coefficient k2. The quantizer quantizes a summation of the signals from the first and second multipliers into one of two values, thereby generating a quantized signal. The driver amplifies the quantized signal, and generating an output signal. At least one of the coefficients k1 and k2 is adjusted based on a level of the output signal.

Abstract: Methods and apparatus are described for switching a switch from a first logic state to a second logic state. The switch has a gate terminal having a gate capacitance and a resistance associated therewith. The gate terminal also has a series inductance coupled thereto. While the switch is in the first logic state, a pulse corresponding to the second logic state is applied to the inductance. The pulse has a first level of energy associated therewith which is sufficiently high to overcome damping by the resistance (thus allowing the gate terminal to reach a signal level corresponding to the second logic state thereby switching the switch to the second logic state), and sufficiently low to mitigate oscillation due to the inductance and the gate capacitance (such that the gate terminal settles at the signal level before a subsequent transition of the switch to the first logic state).

Abstract: An amplifier is described having an amplification stage in a first feedback loop. The amplification stage is operable to open the first feedback loop during operation of the amplifier. The amplifier further comprises a feed forward path bypassing the amplification stage. The feed forward path is operable to provide a second feedback loop when the first feedback loop is open.

Abstract: Methods and apparatus are described for generating or amplifying a differential signal. The output of a first op amp corresponds to one end of the differential signal. The output of a second op amp corresponds to the other end of the differential signal. The inverting input of the first op amp is coupled to the noninverting input of the second op amp.

Abstract: An integrated circuit is described having a substrate, a power transistor in a first region of the substrate, and a plurality of barrier regions of the substrate around the first region. Each barrier region includes a barrier transistor and at least one substrate connection connecting the barrier transistor to at least one floating region of the substrate adjacent the barrier region. During operation of the integrated circuit, the floating regions and the barrier transistors operate to inhibit operation of parasitic devices associated with the power transistor.

Abstract: An electronic device includes sampling circuitry and at least one switching device. Each switching device has resonance circuitry associated with the output terminal thereof. The resonance circuitry and the at least one switching device have at least one resonance oscillation associated therewith. The electronic device further comprises clock generation circuitry which generates a clock signal for the sampling circuitry at least in part from the at least one resonance oscillation.

Abstract: The present invention monitors the average switching frequency at the output of the comparator and adjusts the delay compensation accordingly. That is, the switching frequency monitoring circuit looks at the average switching frequency and maintains the average switching frequency in a “frequency zone” which corresponds to a high elbow and a low noise floor.

Abstract: A mixed signal processing unit with non-linear feedforward paths to improve total harmonic distortion (THD) and noise characteristics of the processor. Specifically the signal processing unit includes a first integrator stage configured to receive an input signal and configured to generate a first integrated signal in response thereto, a second integrator stage coupled to the first integrator stage and configured to generate a second integrated signal from the first integrated signal, a sampling stage coupled to the second integrator stage and configured to sample the second integrated signal received from the second integrator stage at a sample frequency and to generated a logic signal, and a non-linear feed-forward signal path coupled between the first integrator stage and the sampling stage.

Abstract: A differential amplifier includes first and second outputs and first and second supply rails. The differential amplifier further includes offset cancellation circuitry. The offset cancellation circuitry is operable during a calibration mode to generate an offset cancellation signal when the first and second outputs are both coupled to a voltage between the first supply rail and the second supply rail. The offset cancellation signal is for facilitating at least partial cancellation of an offset voltage associated with the first and second outputs during a normal operation mode of the differential amplifier.

Abstract: A noise shaped differential amplifier having a reduced common mode signal in accordance with an embodiment of the invention is described. In the described embodiment, the noise shaped differential amplifier includes a noise shaper having a common mode signal controlled by an attenuation operational amplifier that is coupled to a voltage divider circuit and a sense resistor divider. In this arrangement, the attenuation operational amplifier controls a virtual ground applied to the sense resistor divider.

Abstract: A bandpass amplifier for use in a communication system is described. The amplifier includes a filter, a quantizer, a driver, and a feedback loop. The filter filters the input signal, thereby generating a filtered signal. The quantizer quantizes the filtered signal into one of two values, thereby generating a quantized signal. The driver amplifies the quantized signal, thereby generating the output signal. The feedback loop feeds the output signal to the filter. The quantizer has characteristics in which the quantized signal does not fluctuate between the two values when the input signal is substantially stable.

Abstract: A switching amplifier is described which includes an input stage having a first node associated therewith and a power stage having a second node associated therewith. An actual loop delay is defined with reference to the first and second nodes. Delay detection circuitry compares the actual loop delay to a reference loop delay. A dynamic delay line controlled by the delay detection circuitry controls the actual loop delay to correspond to the reference loop delay.

Abstract: A modulator loop is described having an associated band pass frequency range and including a switching stage having a first delay associated therewith. The modulator loop also includes a modulator stage having a feedback input. The output of the modulator stage is coupled to the input of the switching stage. A first feedback path is coupled between the output of the switching stage and the modulator stage. A notch filter corresponding to the band pass frequency range is coupled between the output of the modulator stage and the feedback input of the modulator stage for compensating for the first delay.

Abstract: A noise shaped differential amplifier having a reduced common mode signal in accordance with an embodiment of the invention is described. In the described embodiment, the noise shaped differential amplifier includes a noise shaper having a common mode signal controlled by an attenuation operational amplifier that is coupled to a voltage divider circuit and a sense resistor divider. In this arrangement, the attenuation operational amplifier controls a virtual ground applied to the sense resistor divider.

Abstract: A bandpass amplifier for use in a communication system is described. The amplifier includes first and second first-order filters, first and second multipliers, a quantizer, and a driver. In one embodiment, the first and second first-order filters are coupled in series. The first multiplier multiplies a signal from the first first-order filter by a coefficient k1, and the second multiplier multiplies a signal from the second first-order filter by a coefficient k2. The quantizer quantizes a summation of the signals from the first and second multipliers into one of two values, thereby generating a quantized signal. The driver amplifies the quantized signal, and generating an output signal. At least one of the coefficients k1 and k2 is adjusted based on a level of the output signal.

Abstract: Methods and apparatus are described for reducing or eliminating break-before-make distortion in switching amplifiers. A switching amplifier has an input stage for generating a switching signal. Break-before-make distortion compensation circuitry alters the switching signal. Break-before-make generator circuitry generates two drive signals from the altered switching signal. A power stage includes two switches which are alternately driven by the two drive signals. Break-before-make distortion detection circuitry detects a distortion pattern at the power stage output node and controls the break-before-make distortion compensation circuitry to alter the switching signal in response to the distortion pattern detected to thereby eliminate at least some break-before-make distortion.

Abstract: Circuits and techniques are described for compensating for a first parasitic current corresponding to a first parasitic capacitance associated with a first switch. A second switch is configured substantially the same as the first switch, the second switch having a second parasitic capacitance associated therewith. A current mirror coupled to the second switch generates a compensating current in response to a second parasitic current corresponding to the second parasitic capacitance. The compensating current compensates for at least a portion of the first parasitic current.

Abstract: A switching amplifier is described which includes an input stage having a first node associated therewith and a power stage having a second node associated therewith. An actual loop delay is defined with reference to the first and second nodes. Delay detection circuitry compares the actual loop delay to a reference loop delay. A dynamic delay line controlled by the delay detection circuitry controls the actual loop delay to correspond to the reference loop delay.

Abstract: An electronic device is described which includes at least two sampling circuits, and at least two switching stages configured in parallel. Each of the switching stages is coupled to one of the sampling circuits. The sampling circuits and the switching stages enable the electronic device to exhibit more than two quantization states. The electronic device further includes clock generation circuitry for generating independent clock signals for each of the sampling circuits.

Abstract: Methods and apparatus are described for generating or amplifying a differential signal. The output of a first op amp corresponds to one end of the differential signal. The output of a second op amp corresponds to the other end of the differential signal. The inverting input of the first op amp is coupled to the noninverting input of the second op amp.