Patents Assigned to Ultratech, Inc.
  • Publication number: 20170025272
    Abstract: Masking methods for atomic-layer-deposition processes for electrode-based devices are disclosed, wherein solder is used as a masking material. The methods include exposing electrical contact members of an electrical device having an active device region and a barrier layer formed by atomic layer deposition. This includes depositing solder elements on the electrical contact members, then forming the barrier layer using atomic layer deposition, wherein the barrier layer covers the active device region and also covers the solder elements that respectively cover the electrical contact members. The solder elements are then melted, which removes respective portions of the barrier layer covering the solder elements. Similar methods are employed for exposing contacts when forming layered capacitors.
    Type: Application
    Filed: July 14, 2016
    Publication date: January 26, 2017
    Applicant: Ultratech, Inc.
    Inventor: Ritwik Bhatia
  • Publication number: 20170025287
    Abstract: High-efficiency line-forming optical systems and methods that employ a serrated aperture are disclosed. The line-forming optical system includes a laser source, a beam conditioning optical system, a first aperture device, and a relay optical system that includes a second aperture device having the serrated aperture. The serrated aperture is defined by opposing serrated blades configured to reduce intensity variations in a line image formed at an image plane as compared to using an aperture having straight-edged blades.
    Type: Application
    Filed: July 14, 2016
    Publication date: January 26, 2017
    Applicant: Ultratech, Inc.
    Inventor: Serguei Anikitchev
  • Publication number: 20160363440
    Abstract: Polarization-based coherent gradient-sensing systems and methods for measuring at least one surface-shape property of a specularly reflective surface are disclosed. The method includes: reflecting a first circularly polarized laser beam from a sample surface to form a second circularly polarized laser beam that contains surface-shape information; converting the second circularly polarized laser beam to a linearly polarized reflected laser beam; directing respective first and second portions of the linearly polarized reflected laser beam to first and second relay assemblies that constitute first and second interferometer arms. The first and second relay assemblies each use a pair of axially spaced-apart gratings to generate respective first and second interference patterns at respective first and second image sensors. Respective first and second signals from the first and second image sensors are processed to determine the at least one surface-shape property.
    Type: Application
    Filed: May 12, 2016
    Publication date: December 15, 2016
    Applicant: Ultratech, Inc.
    Inventor: David G. Stites
  • Publication number: 20160354865
    Abstract: Microchamber laser processing systems and methods that use a localized process-gas atmosphere are disclosed. The method includes processing a substrate with a surface by providing a process gas to a central region of the microchamber that includes the surface of the substrate and providing a curtain gas to a peripheral region of the chamber that includes the surface of the substrate. The method also includes providing a vacuum to a region of the chamber between its central and peripheral regions of the chamber, wherein the vacuum removes the process gas and curtain gas, thereby forming a localized process-gas atmosphere at the surface of the substrate in the central region of the chamber and a gas curtain of the curtain gas in the peripheral region of the chamber. The method also includes irradiating the surface of the substrate through the localized process-gas atmosphere with a laser beam that forms a laser line to perform a laser process on the surface of the substrate.
    Type: Application
    Filed: May 4, 2016
    Publication date: December 8, 2016
    Applicant: Ultratech, Inc.
    Inventor: James T. McWhirter
  • Publication number: 20160351682
    Abstract: Disclosed is an improved semiconductor structure (e.g., a silicon germanium (SiGe) hetero-junction bipolar transistor) having a narrow essentially interstitial-free SIC pedestal with minimal overlap of the extrinsic base. Also, disclosed is a method of forming the transistor which uses laser annealing, as opposed to rapid thermal annealing, of the SIC pedestal to produce both a narrow SIC pedestal and an essentially interstitial-free collector. Thus, the resulting SiGe HBT transistor can be produced with narrower base and collector space-charge regions than can be achieved with conventional technology.
    Type: Application
    Filed: August 13, 2016
    Publication date: December 1, 2016
    Applicant: Ultratech, Inc.
    Inventors: Oleg Gluschenkov, Rajendran Krishnasamy, Kathryn T. Schonenberg
  • Publication number: 20160343583
    Abstract: Laser annealing of a semiconductor wafers using a forming gas for localized control of ambient oxygen gas to reduce the amount of oxidization during laser annealing is disclosed. The forming gas includes hydrogen gas and an inert buffer gas such as nitrogen gas. The localized heating of the oxygen gas and the forming gas in the vicinity of the annealing location on the surface of the semiconductor wafer creates a localized region within which combustion of oxygen gas and hydrogen gas occurs to generate water vapor. This combustion reaction reduces the oxygen gas concentration within the localized region, thereby locally reducing the amount of ambient oxygen gas, which in turn reduces oxidation rate at the surface of the semiconductor wafer during the annealing process.
    Type: Application
    Filed: May 18, 2015
    Publication date: November 24, 2016
    Applicant: ULTRATECH, INC.
    Inventors: James McWhirter, Arthur W. Zafiropoulo
  • Patent number: 9488811
    Abstract: A 1× Wynne-Dyson optical system for microlithography having a variable magnification is disclosed. The 1× Wynne-Dyson optical system has first and second prisms, and a positive lens group that includes a split lens having first and second split lens elements that reside adjacent the first and second prisms, respectively. The first and second split lens elements are axially movable to change the magnification by up to about 500 parts per million. An adjustable positive lens group for a 1× Wynne-Dyson optical system is also disclosed, wherein the positive lens group allows for small changes in the optical system magnification.
    Type: Grant
    Filed: July 26, 2014
    Date of Patent: November 8, 2016
    Assignee: Ultratech, Inc.
    Inventor: David G. Stites
  • Patent number: 9490128
    Abstract: Methods of annealing a thin semiconductor wafer are disclosed. The methods allow for high-temperature annealing of one side of a thin semiconductor wafer without damaging or overheating heat-sensitive electronic device features that are either on the other side of the wafer or embedded within the wafer. The annealing is performed at a temperature below the melting point of the wafer so that no significant dopant redistribution occurs during the annealing process. The methods can be applied to activating dopants or to forming ohmic contacts.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: November 8, 2016
    Assignee: Ultratech, Inc.
    Inventors: Yun Wang, Andrew M. Hawryluk, Xiaoru Wang, Xiaohua Shen
  • Patent number: 9475150
    Abstract: Systems and methods for performing semiconductor laser annealing using dual loop control are disclosed. The first control loop operates at a first frequency and controls the output of the laser and controls the 1/f laser noise. The second control loop also controls the amount of output power in the laser and operates at second frequency lower than the first frequency. The second control loop measures the thermal emission of the wafer over an area the size of one or more die so that within-die emissivity variations are average out when determining the measured annealing temperature. The measured annealing temperature and an annealing temperature set point are used to generate the control signal for the second control loop.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: October 25, 2016
    Assignee: Ultratech, Inc.
    Inventors: James T. McWhirter, David Gaines, Joseph Lee, Paulo Zambon
  • Publication number: 20160306177
    Abstract: A line-forming optical system and method are disclosed that form a line image with high-efficiency. A method includes forming a laser beam having a first intensity profile with a Gaussian distribution in at least a first direction and passing at least 50% of the laser beam in the first direction to form a first transmitted light. The method also includes: focusing the first transmitted light at an intermediate image plane to define a second intensity profile having a central peak and first side peaks immediately adjacent the central peak; then truncating the second intensity profile within each of first side peaks to define a second transmitted light; and then forming the line image at an image plane from the second transmitted light.
    Type: Application
    Filed: June 24, 2016
    Publication date: October 20, 2016
    Applicant: Ultratech, Inc.
    Inventor: Serguei Anikitchev
  • Publication number: 20160281223
    Abstract: An improved Plasma Enhanced Atomic Layer Deposition (PEALD) system and related operating methods are disclosed. A vacuum reaction chamber includes a vacuum system that separates a first outflow from the reaction chamber, comprising unreacted first precursor, from a second outflow from the reaction chamber, comprising second precursor and any reaction by products from the reaction of the second precursor with the coating surfaces. A trap, including trap material surfaces, is provided to remove first precursor from the first outflow when the first precursor reacts with the trap material surfaces. When the second precursor includes a plasma generated material, the second precursor is not passed through the trap. An alternate second precursor source injects a suitable second precursor into the trap to complete a material deposition layer onto the trap surfaces thereby preparing the trap material surfaces to react with the first precursor on the next material deposition cycle.
    Type: Application
    Filed: November 21, 2014
    Publication date: September 29, 2016
    Applicant: Ultratech, Inc.
    Inventors: Mark Sowa, Robert Kane, Michael Sershen
  • Publication number: 20160276184
    Abstract: Systems and methods for reducing pulsed laser beam profile non-uniformities for laser annealing are disclosed. The methods include directing an initial pulsed laser beam along an optical axis, and imparting to each light pulse a time-varying angular deflection relative to the optical axis. This forms a new laser beam wherein each light pulse is smeared out over an amount of spatial deflection ? sufficient to reduce the micro-scale intensity variations in the laser beam. The new laser beam is then used to form the line image, which has better intensity uniformity as compared using the initial laser beam to form the line image.
    Type: Application
    Filed: March 9, 2016
    Publication date: September 22, 2016
    Applicant: Ultratech, Inc.
    Inventor: Yun Wang
  • Patent number: 9450069
    Abstract: Disclosed is an improved semiconductor structure (e.g., a silicon germanium (SiGe) hetero-junction bipolar transistor) having a narrow essentially interstitial-free SIC pedestal with minimal overlap of the extrinsic base. Also, disclosed is a method of forming the transistor which uses laser annealing, as opposed to rapid thermal annealing, of the SIC pedestal to produce both a narrow SIC pedestal and an essentially interstitial-free collector. Thus, the resulting SiGe HBT transistor can be produced with narrower base and collector space-charge regions than can be achieved with conventional technology.
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: September 20, 2016
    Assignee: Ultratech, Inc.
    Inventors: Oleg Gluschenkov, Rajendran Krishnasamy, Kathryn T. Schonenberg
  • Patent number: 9436103
    Abstract: A Wynne-Dyson projection lens for use in an ultraviolet optical lithography system is disclosed, wherein the projection lens is configured to have reduced susceptibility to damage from ultraviolet radiation. The projection lens utilizes lens elements that are made of optical glasses that are resistant to damage from ultraviolet radiation, but that also provide sufficient degrees of freedom to correct aberrations. The glass types used for the lens elements are selected from the group of optical glasses consisting of: fused silica, S-FPL51Y, S-FSL5Y, BSM51Y and BAL15Y.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: September 6, 2016
    Assignee: Ultratech, Inc.
    Inventors: Peiqian Zhao, Emily M. True, Raymond Ellis, Andrew M. Hawryluk
  • Publication number: 20160240407
    Abstract: Laser annealing systems and methods for annealing a semiconductor wafer with ultra-short dwell times are disclosed. The laser annealing systems can include one or two laser beams that at least partially overlap. One of the laser beams is a pre-heat laser beam and the other laser beam is the annealing laser beam. The annealing laser beam scans sufficiently fast so that the dwell time is in the range from about 1 ?s to about 100 ?s. These ultra-short dwell times are useful for annealing product wafers formed from thin device wafers because they prevent the device side of the device wafer from being damaged by heating during the annealing process. Embodiments of single-laser-beam annealing systems and methods are also disclosed.
    Type: Application
    Filed: September 18, 2014
    Publication date: August 18, 2016
    Applicant: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Serguei Anikitchev
  • Publication number: 20160240440
    Abstract: Provided are systems and processes for forming a three-dimensional circuit on a substrate. A radiation source produces a beam that is directed at a substrate having an isolating layer interposed between circuit layers. The circuit layers communicate with each other via a seed region exhibiting a crystalline surface. At least one circuit layer has an initial microstructure that exhibits electronic properties unsuitable for forming circuit features therein. After being controllably heat treated, the initial microstructure of the circuit layer having unsuitable properties is transformed into one that exhibits electronic properties suitable for forming circuit feature therein. Also provided are three-dimensional circuit structures optionally formed by the inventive systems and/or processes.
    Type: Application
    Filed: April 28, 2016
    Publication date: August 18, 2016
    Applicant: Ultratech, Inc.
    Inventors: Arthur W. Zafiropoulo, Yun Wang, Andrew M. Hawryluk
  • Patent number: 9411163
    Abstract: A line-forming optical system and method are disclosed that form a line image with high-efficiency. A method includes forming a laser beam having a first intensity profile with a Gaussian distribution in at least a first direction and passing at least 50% of the laser beam in the first direction to form a first transmitted light. The method also includes: focusing the first transmitted light at an intermediate image plane to define a second intensity profile having a central peak and first side peaks immediately adjacent the central peak; then truncating the second intensity profile within each of first side peaks to define a second transmitted light; and then forming the line image at an image plane from the second transmitted light.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: August 9, 2016
    Assignee: Ultratech, Inc.
    Inventor: Serguei Anikitchev
  • Patent number: 9401277
    Abstract: Provided are systems and methods for processing the surface of substrates that scan a laser beam at one or more selected orientation angles. The orientation angle or angles may be selected to reduce substrate warpage. When the substrates are semiconductor wafers having microelectronic devices, the orientation angles may be selected to produce controlled strain and to improve electronic performance of the devices.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: July 26, 2016
    Assignee: Ultratech, Inc.
    Inventors: Yun Wang, Shaoyin Chen
  • Patent number: 9401278
    Abstract: Methods and apparatuses are provided for improving the intensity profile of a beam image used to process a semiconductor substrate. At least one photonic beam may be generated and manipulated to form an image having an intensity profile with an extended uniform region useful for thermally processing the surface of the substrate. The image may be scanned across the surface to heat at least a portion of the substrate surface to achieve a desired temperature within a predetermined dwell time. Such processing may achieve a high efficiency due to the large proportion of energy contained in the uniform portion of the beam.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: July 26, 2016
    Assignee: Ultratech, Inc.
    Inventors: Andrew M Hawryluk, Boris Grek, David A Markle
  • Publication number: 20160203972
    Abstract: Atomic Layer Deposition (ALD) is used for heteroepitaxial film growth at reaction temperatures ranging from 80-400° C. The substrate and film materials are preferably selected to take advantage of Domain Matched Epitaxy (DME). A laser annealing system is used to thermally anneal deposition layers after deposition by ALD. In preferred embodiments a silicon substrate is overlaid with an AIN nucleation layer and laser annealed. Thereafter a GaN device layers is applied over the AIN layer by an ALD process and then laser annealed. In a further example embodiment a transition layer is applied between the GaN device layer and the AIN nucleation layer. The transition layer comprises one or more different transition material layers each comprising a AlxGa1-x compound wherein the composition of the transition layer is continuously varied from AIN to GaN.
    Type: Application
    Filed: September 17, 2014
    Publication date: July 14, 2016
    Applicant: Ultratech, Inc.
    Inventors: Ganesh Sundaram, Andrew M. Hawryluk, Daniel Stearns