Patents Assigned to Unitrode Corporation
  • Patent number: 4716514
    Abstract: A synchronous power rectifier incorporating a bipolar power transistor operable in a switching mode to rectify the energy from a secondary winding of a power transformer. The synchronous rectifier reduces or eliminates the need of rectifier diodes, which provides power rectification without the power loss associated with the rectifier diode voltage drops. Moreover, the present invention includes further refinements of the circuit, including adjustment of the rectifier switching time to accommodate delayed turn-off times of bipolar power devices, and adjustment of the switching signal duration to provide output voltage regulation independent of the excitation of the transformer primary. The resulting embodiments of the present invention provide a modular switching power supply circuit of high efficiency, which may be operable together in combination to provide multiple output voltages.
    Type: Grant
    Filed: September 22, 1986
    Date of Patent: December 29, 1987
    Assignee: Unitrode Corporation
    Inventor: Raoji Patel
  • Patent number: 4626478
    Abstract: Spacing elements are integrally formed on the constituent surfaces of conductive interfaces of electronic circuit device components for providing uniform thickness solder or other bonding film between the surfaces. The interfaces may be electrically conductive interfaces such as those defined between leads and substrate contact pads as well as thermally conductive interfaces such as those defined between heat sinks and substrates. Any suitable spacers which maintain the constitutent surfaces a selected distance apart when the components are pressed together may be employed such as edge and corner flanges, convex dimples, annular protrusions, tangs, among others. A tool is disclosed for forming the annular protrusions that is advantageously employed with comparatively thick electronic circuit device components and with laminated electronic circuit device components having a comparatively hard layer.
    Type: Grant
    Filed: March 22, 1984
    Date of Patent: December 2, 1986
    Assignee: Unitrode Corporation
    Inventor: Herman F. van Dyk Soerewyn
  • Patent number: 4613767
    Abstract: An SCR having a reduced forward-voltage drop comprising an independently powered latch circuit driving an output transistor in combination with an additional turn-off transistor. The SCR provides saturated operation of the output transistor and self-commutation which allows for the SCR to turn-off. The present invention is particularly suitable for use in integrated circuit structures having additional circuit functions thereon.
    Type: Grant
    Filed: October 31, 1983
    Date of Patent: September 23, 1986
    Assignee: Unitrode Corporation
    Inventor: Varnum S. Holland
  • Patent number: 4590391
    Abstract: A multiple input window comparator for use in apparatus requiring sensing of a voltage window, such as power supplies and system monitors, including a first comparator having multiple input transistors, each of which receives a signal to be compared. The comparator characteristics for each input signal are balanced through the use of a current mirror circuit connected to each input transistor. A complementary second comparator circuit is provided which, in combination with the first comparator circuit, produces a signal indicating when one or more of the input signals exceeds the voltage boundaries (voltage window) defined by reference signals of the first and second comparator. The circuit topology of each of the first and second comparators produces a zero input voltage offset with respect to the respective reference voltage, such that the comparator output signal occurs substantially instantaneously and uniformly with the transition of the threshold voltage by one or more of the input signals.
    Type: Grant
    Filed: December 19, 1983
    Date of Patent: May 20, 1986
    Assignee: Unitrode Corporation
    Inventor: Richard L. Valley
  • Patent number: 4551353
    Abstract: A method for reducing leakage currents in passivated semiconductor devices includes subjecting the passivation layer to a corona discharge for reducing or eliminating the inversion layer produced by the characteristic passivation layer charge.
    Type: Grant
    Filed: July 24, 1984
    Date of Patent: November 5, 1985
    Assignee: Unitrode Corporation
    Inventors: Philip L. Hower, Eric K. Li
  • Patent number: 4538168
    Abstract: A high power semiconductor package having a unitary extruded metal housing which serves as an efficient thermal heat sink and which includes integral constituents for retaining an encapsulating material. The extruded housing has open sides and an open top to facilitate installation of the semiconductor die assemblies and associated electronic components and terminals prior to enclosure in a molded or otherwise formed encapsulant.
    Type: Grant
    Filed: April 3, 1984
    Date of Patent: August 27, 1985
    Assignee: Unitrode Corporation
    Inventor: Herman F. Van Dyk Soerewyn
  • Patent number: 4536825
    Abstract: The present invention discloses a plurality of severable alignment fingers integrally formed with a leadframe for selectively aligning one or more electronic circuit device components, that may be of different physical dimensions, positioned on the leadframe. Upstanding positioning tabs are integrally formed on the sides, on the ends, or on both the sides and on the ends of corresponding alignment fingers that abut the confronting surfaces of the one or more electronic circuit device components positioned on the leadframe to selectively align the components. The upstanding positioning tabs may be so spaced apart on corresponding alignment fingers as to provide a supporting surface for partially supporting the confronting bottom surface of the electronic circuit device component positioned on the leadframe.
    Type: Grant
    Filed: March 29, 1984
    Date of Patent: August 20, 1985
    Assignee: Unitrode Corporation
    Inventor: Herman F. van Dyk Soerewyn
  • Patent number: 4514587
    Abstract: A high power semiconductor package which includes a substantially continuous mounting surface for efficient thermal mounting to a heat sink and which can be electrically isolated or non-isolated. The package includes a metal header having a cylindrical section and a peripheral mounting flange. The cylindrical section has an annular portion adjacent to the mounting flange into which is press fitted a thermally conductive disk having an outer surface which is substantially coplanar with the mounting surface of the flange. One or more semiconductor devices are mounted within the cylindrical section in thermal communication with the conductive disk, and are electrically connected to leads which outwardly extend from the top of the header. An encapsulant can be provided within the header to enclose the semiconductor devices, and an electrically insulating cap can be secured to the cylindrical section and through which the leads extend.
    Type: Grant
    Filed: December 23, 1981
    Date of Patent: April 30, 1985
    Assignee: Unitrode Corporation
    Inventor: Herman F. Van Dyk Soerewyn
  • Patent number: 4443655
    Abstract: A high power semiconductor package having an extruded metal housing which includes electrical terminals integrally formed with the housing and which, after assembly and encapsulation of the package, are electrically isolated by selected removal of intermediate sections of a housing wall.
    Type: Grant
    Filed: November 27, 1981
    Date of Patent: April 17, 1984
    Assignee: Unitrode Corporation
    Inventor: Herman F. Van Dyk Soerewyn
  • Patent number: 3935345
    Abstract: A method of electroless plating together with electroless plating solutions for plating the substrate of a transition metal capable of forming metal peroxides such as molybdenum or tungsten with a layer of metal plate such as chromium, cobalt, nickel or rhodium. The plating process features an oxidation and reduction reaction in which unstable surface oxides on the substrate of the transition metal are replaced by the desired metal plate. The method of the invention provides an oxygen impervious plate which protects against oxidation of the metal substrate and eliminates oxide migration as well as providing an improved metal-to-metal plate bond.
    Type: Grant
    Filed: August 20, 1974
    Date of Patent: January 27, 1976
    Assignee: Unitrode Corporation
    Inventor: Luis E. Lema