Patents Assigned to Yageo Corporation
  • Patent number: 11935675
    Abstract: An anti-surge resistor and a fabrication method thereof are provided. The current anti-surge resistor includes a substrate made by a varistor material, a resistance layer disposed on the substrate, a first terminal electrode, and a second terminal electrode. In the fabrication method of the current anti-surge resistor, at first, the substrate made by the varistor material is provided. Then, the resistance layer is formed on the substrate to provide a main body, in which the main body includes the substrate and the resistance layer, and has two opposite terminals. Thereafter, the first terminal electrode is formed on one terminal of the main body, and the second terminal electrode is formed on the other terminal of the main body.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: March 19, 2024
    Assignee: YAGEO CORPORATION
    Inventors: Shen-Li Hsiao, Kuang-Cheng Lin, Ren-Hong Wang
  • Patent number: 11875924
    Abstract: A method of fabricating resistors in igniter is provided. The method includes punching an alloy material to obtain a plurality of alloy components. The alloy components are disposed on a substrate, and electrodes are disposed on the substrate. Resistors in igniter are obtained by disposing electrodes on the substrate such that two electrically connecting regions of each alloy component are physically contacting and electrically connecting to the electrodes, respectively. The resulting resistors in igniter have uniform size and stable shape hence showing great ignition performance.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: January 16, 2024
    Assignee: YAGEO CORPORATION
    Inventors: Shen-Li Hsiao, Pinhao Hsu
  • Patent number: 11569053
    Abstract: A fuse resistor includes a substrate, an insulation layer, a fuse element, a protection layer, a first electrode, and a second electrode. The insulation layer covers a surface of the substrate. The fuse element is disposed on a portion of the insulation layer. The fuse element includes a first electrode portion, a melting portion, and a second electrode portion, in which the first electrode portion and the second electrode portion are respectively connected to two opposite ends of the melting portion. The protection layer covers the fuse element and the insulation layer, in which the protection layer has a cavity located on the melting portion. The first electrode is electrically connected to the first electrode portion. The second electrode is electrically connected to the second electrode portion.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: January 31, 2023
    Assignee: YAGEO CORPORATION
    Inventors: Shen-Li Hsiao, Hwan-Wen Lee
  • Patent number: 11521767
    Abstract: An ignition resistor includes an ignition structure, an insulation substrate, a carrying base, and first and second conductor layers. The ignition structure includes an ignition portion, and first and second electrode portions respectively connected to two opposite ends of the ignition portion. The insulation substrate is disposed on the ignition structure and includes a filling portion including a hole exposing the ignition portion and configured to accommodate an ignition material, and a sidewall surrounding the hole. The carrying base is disposed under the ignition structure. The carrying base includes first and second electrodes respectively corresponding to the first and second electrode portions. The first and second electrodes and the ignition structure are located on two opposite sides of the carrying base. The first and second conductive layers electrically connect the first electrode portion and the first electrode, and the second electrode portion and the second electrode respectively.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: December 6, 2022
    Assignee: YAGEO CORPORATION
    Inventors: Shen-Li Hsiao, Fu-Sheng Huang
  • Patent number: 10839991
    Abstract: In a method for manufacturing a shunt resistor, a resistor plate with a first side surface and a second side surface opposite to each other is provided. A first electrode plate and a second electrode plate are respectively pressed onto the first side surface and the second side surface, thereby forming a first connection surface between the first electrode plate and the resistor plate, and a second connection surface between the second electrode plate and the resistor plate. A first conductive module is placed on opposite ends of the first connection surface, and a second conductive module is placed on opposite ends of the second connection surface. Current is applied to the first and second connection surfaces via the first and second conductive modules respectively to weld the first electrode plate and the resistor plate, and to weld the second electrode plate and the resistor plate.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: November 17, 2020
    Assignee: YAGEO CORPORATION
    Inventors: Shen-Li Hsiao, Kuang-Cheng Lin, Hwan-Wen Lee, Chih-Lung Chen
  • Patent number: 10818418
    Abstract: A method for manufacturing a shunt resistor is described. In this method, a first electrode plate and a second electrode plate are provided. The first electrode plate includes a first carrying portion having a first hole. The second electrode plate includes a second carrying portion having a second hole. A resistor plate is placed between the first and second electrode plates. The resistor plate has a first through hole and a second through hole respectively on the first hole and the second hole. A first rivet is pressed into the first through hole and the first hole. A second rivet is pressed into the second through hole and the second hole. Current is applied to the first rivet and the second rivet to weld the first rivet, the first electrode plate and the resistor plate, and to weld the second rivet, the second electrode plate and the resistor plate.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: October 27, 2020
    Assignee: YAGEO CORPORATION
    Inventors: Shen-Li Hsiao, Kuang-Cheng Lin, Hwan-Wen Lee, Chih-Lung Chen
  • Patent number: 10692653
    Abstract: The present disclosure provides a ceramic sintered body having a favorable dielectric constant. In some embodiments of the present disclosure, the ceramic sintered body includes a semiconductor ceramic phase dispersed in a dielectric ceramic phase, wherein the semiconductor ceramic phase and the dielectric ceramic phase jointly form a percolative composite, and a volume fraction of the semiconductor ceramic phase is close to and less than a percolation threshold.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: June 23, 2020
    Assignee: YAGEO CORPORATION
    Inventor: Masayuki Fujimoto
  • Patent number: 10102976
    Abstract: A multilayer capacitor includes a dielectric main body having opposite first and second sides, a terminal electrode assembly and spaced apart first, second and third inner electrodes, all of which are disposed in the main body. The second inner electrode is disposed between the first and third inner electrodes. The terminal electrode assembly has a first terminal electrode unit disposed on the first side and connected to the first inner electrode, a second terminal electrode unit disposed on the second side and connected to the second inner electrode, and a third terminal electrode unit disposed on the first side and connected to the third inner electrode. The first, second and third terminal electrode units are insulated from each other.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: October 16, 2018
    Assignee: YAGEO CORPORATION
    Inventors: Ming-Chun Wu, Cheng-Han Tsai, I-Tsung Lin
  • Patent number: 9701586
    Abstract: A titanium compound-containing core-shell powder includes a plurality of core-shell particles, each of which includes a core body and a shell layer encapsulating said core body. The core body is electrically conductive. The shell layer includes a crystal that is selected from titanate oxides having a perovskite structure and titanate oxides having a spinel structure. The core body and the shell layer are chemically bonded to each other.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: July 11, 2017
    Assignee: Yageo Corporation
    Inventor: Masayuki Fujimoto
  • Publication number: 20170084366
    Abstract: A resistor includes a body and two connecting members. The body is made from an ohmic material and has two opposite side faces. Each of the connecting members has a side surface that has a connecting region welded to a respective one of the side faces of the body.
    Type: Application
    Filed: February 29, 2016
    Publication date: March 23, 2017
    Applicant: YAGEO CORPORATION
    Inventors: Dong-Mou TSAI, Sheng-Li HSIAO, Shih-Hsin CHANG, Chih-Lung CHEN, Hwan-Wen LEE
  • Publication number: 20160360619
    Abstract: A passive device includes a substrate that has opposite first and second surfaces, an electrical connecting unit, a first passive unit, and a second passive unit. The electrical connecting unit includes a first pad formed on the first surface and a second pad formed on the second surface and is electrically connected to the first pad. The first passive unit is formed on the first surface and electrically connected to the first pad. The second passive unit is formed on the second surface and includes two separated electrode layers electrically insulated from the electrical connecting unit, and an insulator layer interconnecting the electrode layers.
    Type: Application
    Filed: November 30, 2015
    Publication date: December 8, 2016
    Applicant: YAGEO CORPORATION
    Inventors: Sheng-Li HSIAO, Yung-Han Liu, Shih-Hsin CHANG, Ping-Chuen KUO, Shu-Fang CHEN, Ching-Chang LIN
  • Patent number: 9388085
    Abstract: A titanium compound-containing core-shell powder includes a plurality of core-shell particles, each of which includes a core body and a shell layer encapsulating said core body. The core body is electrically conductive. The shell layer includes a crystal that is selected from titanate oxides having a perovskite structure and titanate oxides having a spinel structure. The core body and the shell layer are chemically bonded to each other.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: July 12, 2016
    Assignee: YAGEO CORPORATION
    Inventor: Masayuki Fujimoto
  • Patent number: 9336931
    Abstract: The disclosure provides a chip resistor including: a substrate, two first electrodes, two second electrodes, a resistive layer, at least one protection layer and at least one coating layer. The protection layer covers part of the two first electrodes, and includes at least two overlay sides and at least one overlay plane. The coating layer covers the at least two overlay sides, the at least one overlay plane, and part of the two first electrodes and the two second electrodes. The chip resistor uses the two overlay sides and the overplay plane to extend a distance between the two first electrodes and the outside. Therefore, it is difficult for the airborne sulfur, sulfides and sulfur-containing compounds to enter and react with the two first electrodes. Thus, the chip resistor can resist corrosion of harmful substances such as sulfur, sulfides and sulfur-containing compounds or halogens on the electrodes.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: May 10, 2016
    Assignee: YAGEO CORPORATION
    Inventors: Dong-Mou Tsai, Tsai-Hu Chen, Sheng-Li Hsiao, Yung-Han Liu, Jen-Fu Ho
  • Publication number: 20130293442
    Abstract: The present invention relates to an antenna having a connecting circuit, which includes a substrate, a grounding metal strip, a first radiating metal strip, a second radiating metal strip and a connecting circuit. The first radiating metal strip is not connected to the grounding metal strip or the second radiating metal strip. The connecting circuit connects different positions on the grounding metal strip and on the second radiating metal strip, so as to form a plurality of resonant paths of different lengths between the grounding metal strip and the second radiating metal strip. Thereby, the frequency of the antenna varies between different values, so that the range of the application and the practicality of the antenna are increased.
    Type: Application
    Filed: November 19, 2012
    Publication date: November 7, 2013
    Applicant: YAGEO CORPORATION
    Inventors: BOON-TIONG CHUA, CHIH-YANG LOU, TSUNG-YAO CHIU, CHUNG-JEN CHIU
  • Publication number: 20120161284
    Abstract: The present invention relates to a chip resistor and method for manufacturing the same. The method includes the following steps of: (a) providing a substrate and a resistor layer; (b) attaching the resistor layer to the substrate; (c) forming a first metal layer; (d) forming a plurality of through holes; (e) forming a connecting metal layer in the through holes to electrically connect the resistor layer and the first metal layer; (f) patterning the resistor layer to form a plurality of first resistor bodies; (g) forming a plurality of first protecting layers to protect the first resistor bodies; and (h) proceeding a singulation process along a plurality of cutting lines to form a plurality of chip resistors. Whereby, no alignment problem occurs and the yield can be raised.
    Type: Application
    Filed: October 25, 2011
    Publication date: June 28, 2012
    Applicant: YAGEO CORPORATION
    Inventors: SHEN-CHIH WU, CHIA-WEN YEH, CHIH-LUNG CHEN
  • Patent number: 8035476
    Abstract: The present invention relates to a chip resistor and method for making the same. The chip resistor includes a substrate, a pair of bottom electrodes, a resistive film, a pair of main upper electrodes, a first protective coat, a pair of barrier layers, a second protective coat, a pair of side electrodes and at least one plated layer. The first protective coat is disposed over the resistive film, and covers part of the main upper electrodes. The barrier layers are disposed on the main upper electrodes, and cover part of the first protective coat. The second protective coat is disposed on the first protective coat, and covers part of the barrier layers. The plated layers cover the barrier layers, the bottom electrodes and the side electrodes. As a result, the chip resistor features high corrosion resistance.
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: October 11, 2011
    Assignee: Yageo Corporation
    Inventors: Chih-Chung Yang, Wen-Fon Wu, Mei-Ling Lin, Wen-Cheng Wu, Tsai-Hu Chen, Wen-Hsing Kong
  • Publication number: 20110234365
    Abstract: The present invention relates to a chip resistor having low resistance and a method for manufacturing the same. The chip resistor includes a substrate, a resistive layer, a pair of conducting layers and at least one protective layer. The substrate has a first surface. The resistive layer is disposed on the first surface of the substrate. The conducting layers are disposed adjacent to the first surface of the substrate. The at least one protective layer is disposed on the resistive layer or the conducting layers. As a result, the resistive layer has a precise pattern, and the duration of sputtering is reduced, thereby improving yield rate and efficiency while reducing manufacturing cost.
    Type: Application
    Filed: February 11, 2011
    Publication date: September 29, 2011
    Applicant: YAGEO CORPORATION
    Inventors: CHIH-CHUNG YANG, MEI-LING LIN, IAN-WEI CHIAN, YA-TANG HU, CHIN-YUAN TSENG
  • Publication number: 20110089025
    Abstract: The present invention relates to a method for manufacturing a chip resistor having a low resistance. The method includes the following steps: (a) providing a substrate having a top surface; (b) sputtering a conducting layer directly on the top surface of the substrate, so that the conducting layer and the substrate contact each other, wherein the material of the conducting layer comprises nickel or copper; and (c) plating at least one metal layer directly on the conducting layer, so that the metal layer and the conducting layer contact each other, wherein the material of the metal layer comprises nickel or copper, and the conducting layer and the metal layer provide a resistive layer. As a result, the resistive layer has a precise pattern, and the duration of sputtering is reduced, so the yield rate and the efficiency are improved and the manufacturing cost is cut down.
    Type: Application
    Filed: October 20, 2009
    Publication date: April 21, 2011
    Applicant: YAGEO CORPORATION
    Inventors: Chih-Chung Yang, Mei-Ling Lin, Ian-Wei Chian, Wen-Cheng Wu, Wen-Hsiang Kong, Tsai-Hu Chen
  • Patent number: 7893877
    Abstract: An integrated antenna for WWAN, GPS, and WLAN includes a ground metal plane, a WWAN antenna, and a WLAN antenna. The WWAN antenna is connected to the ground metal plane and includes first and second radiating metal strips which induce a first resonance mode and a second resonance mode respectively. The WLAN antenna is connected to the ground metal plane and includes third and fourth radiating metal strips which induce a third resonance mode and a fourth resonance mode respectively. The integrated antenna can be used in WWAN and WLAN at the same time. The ground metal plane of the integrated antenna does not need to connect to a ground end of a wireless electronic device, and is used for grounding. Therefore, the integrated antenna can be mounted on any part of a wireless electronic device, and can have stable electrical characteristics.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: February 22, 2011
    Assignee: Yageo Corporation
    Inventors: Chi-Yueh Wang, Cheng-Han Lee, Ching-Chia Mai
  • Patent number: 7882621
    Abstract: A method for making chip resistor components includes: (a) forming a plurality of first and second notches in a substrate so as to form resistor-forming strips; (b) forming pairs of upper and lower electrodes on each of the resistor-forming strips; (c) forming a resistor film on each of the resistor-forming strips; (d) forming an insulator layer on the resistor film; (e) forming a hole pattern in the insulator layer and the resistor film; (f) forming an insulating shield layer on the insulator layer; (g) cleaving the substrate along the first notches so as to form a plurality of strip-like semi-finished products; (h) forming a pair of side electrodes on two opposite sides of each of the semi-finished products; and (i) cleaving each of the semi-finished products.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: February 8, 2011
    Assignee: Yageo Corporation
    Inventors: Mu-Yuan Chen, Wen-Feng Wu, Chi-Pin Chang, Kao-Po Chien