Patents Assigned to Zarlink Semiconductor (U.S.) Inc.
  • Publication number: 20130089199
    Abstract: An apparatus includes a metal frame, a switching power circuit, and at least one semiconductor die implementing a communication interface. The metal frame includes a plurality of external pads, and a plurality of base pads coupled to selected external pads. The switching power circuit is mounted to selected base pads and includes an input terminal, an output terminal, an energy storage device mounted to a first subset of the base pads and coupled to the output terminal, and a switching element mounted to a second subset of the base pads and coupled to the input terminal and the energy storage element. The at least one semiconductor die provides a control signal to the switching device to control an output voltage present at the output terminal.
    Type: Application
    Filed: October 11, 2011
    Publication date: April 11, 2013
    Applicant: ZARLINK SEMICONDUCTOR (U.S.) INC.
    Inventors: Gilbert A. Amine, John Kelly, Jason L. Rabb, David N. Wakely
  • Patent number: 8015258
    Abstract: A method and apparatus are provided for accessing data. The method includes defining a first portion of a memory for receiving data and providing a memory request to transfer data from a source to the first portion of the memory defined to receive the data. The method further includes transferring a portion of data from the source to the first portion of the memory, wherein the size of the portion of the data substantially corresponds to the size of the first portion of the memory.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: September 6, 2011
    Assignee: Zarlink Semiconductor (U.S.), Inc.
    Inventors: David N. Larson, Jagannathan Bharath
  • Patent number: 8004122
    Abstract: A power converter controller is operable to control power provided to a load circuit coupled between a first voltage supply terminal and a first switching element by controlling the first switching element and to control power provided to an energy storage element coupled to the first switching element. The energy storage element is operable to provide a power supply. A first control terminal couples to a control input of the first switching element. A first load terminal couples to the first switching element and the charge storing element. A second switching element couples between the first load terminal and a second voltage supply terminal.
    Type: Grant
    Filed: August 13, 2008
    Date of Patent: August 23, 2011
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventor: John K. Moriarty, Jr.
  • Patent number: 7996557
    Abstract: A communication system includes a bus, first and second devices coupled to the bus, and a handshaking unit. The bus includes at least one data line and control lines. The data line is coupled between the first and second devices. The handshaking unit is coupled to the control lines of the bus and is adapted to determine if the first and second devices are capable of completing a data transfer and enable the first and second devices to facilitate the data transfer. A method for interfacing first and second devices coupled to a bus is provided. The bus has at least one data line coupled to the first and second devices and control lines. The method includes determining if the first and second devices are capable of completing a data transfer based on the control lines; providing handshaking signals on the control lines to enable the first and second devices; and transferring the data over the data line in response to the handshaking signals.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: August 9, 2011
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventor: William R. Finch
  • Patent number: 7821016
    Abstract: The present invention provides an optically triggered switch and a method of forming the optically triggered switch. The optically triggered switch includes a silicon layer having at least one trench formed therein and at least one silicon diode formed in the silicon layer. The switch also includes a first thyristor formed in the silicon layer. The first thyristor is physically and electrically isolated from the silicon diode by the trench and the first thyristor is configured to turn on in response to electromagnetic radiation generated by the silicon diode.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: October 26, 2010
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventor: Thomas Joseph Krutsick
  • Patent number: 7813500
    Abstract: A method and apparatus is provided for ring-trip detection in a line card having an analog-to-digital converter for processing voice signals. The method includes receiving a ringing control signal, transmitting a ringing signal to a subscriber line in response to the ringing control signal, and receiving a portion of the ringing signal from the subscriber line. The method includes converting the portion of the ringing signal to a digital signal using the analog-to-digital converter, and providing a ring-trip indication in response to the digital signal. The apparatus includes first circuitry capable of processing a voice signal, the circuitry including a analog-to-digital converter for processing the voice signal. The apparatus includes a ringing generator, second circuitry, and ring-trip detection logic. The generator is capable providing a ringing signal to a subscriber line in response to receiving a ringing control signal.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: October 12, 2010
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventor: Merle L. Miller
  • Patent number: 7630490
    Abstract: A method and apparatus is provided for DC feed control for a line card. The method includes determining if the line card is operating in a current limit region of a DC feed curve and synthesizing a curve in the current limit region. The method further includes determining a loop voltage based on the synthesized curve, and applying the loop voltage to the subscriber line. The apparatus includes logic capable of determining if the line card is operating in a current limit region of a DC feed curve and capable of determining a loop voltage based on a synthesized curve in the current limit region. The apparatus further includes circuitry for applying the loop voltage to the subscriber line.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: December 8, 2009
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventors: Merle L. Miller, Jin Li
  • Patent number: 7594026
    Abstract: A communication system includes a bus, first and second devices coupled to the bus, and a handshaking unit. The bus includes at least one data line and control lines. The data line is coupled between the first and second devices. The handshaking unit is coupled to the control lines of the bus and is adapted to determine if the first and second devices are capable of completing a data transfer and enable the first and second devices to facilitate the data transfer. A method for interfacing first and second devices coupled to a bus is provided. The bus has at least one data line coupled to the first and second devices and control lines. The method includes determining if the first and second devices are capable of completing a data transfer based on the control lines; providing handshaking signals on the control lines to enable the first and second devices; and transferring the data over the data line in response to the handshaking signals.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: September 22, 2009
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventor: William R. Finch
  • Patent number: 7026804
    Abstract: A method and system for sampling an analog signal that minimizes perturbations caused by noise. In one embodiment, the sample and hold circuit includes a plurality of switches in series between the sampled source and a hold capacitor. A resistor is located in parallel with the first switch. The two switches are controlled so as to provide three signal paths between the hold capacitor and the sampled signal. The first signal path is a closed circuit between the charge capacitor and the sampled signal. This path occurs during a first phase of operation for the sample and hold circuit. During a second phase of operation, the first switch is opened which sends any current loss from the capacitor to path through the resistor. The high resistance provided by the resistor minimizes this current loss. The third signal path occurs when the second switch is opened which present an open circuit between the capacitor and the sampled signal.
    Type: Grant
    Filed: June 25, 2002
    Date of Patent: April 11, 2006
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventors: Andrew Michael Bottomley, Didier Serge Sagan
  • Patent number: 6904156
    Abstract: Squeal in a hearing aid is inhibited by a circuit that monitors battery voltage. In response to sensed low battery voltage, a cutoff circuit disables the hearing aid audio amplifier. Also in response to low battery voltage, a crowbar circuit loads the hearing aid battery with a loading circuit element.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: June 7, 2005
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventor: Remi LeReverend
  • Patent number: 6710744
    Abstract: A fractal antenna can be incorporated in a hearing device to optimize wireless communication capabilities of such a device. A particular fractal structure having fractals of a generally + shaped geometry can be advantageous when used as a fractal antenna. The fractal antenna is implemented as a conductive trace on a substrate and can be implemented on an integrated circuit in the hearing aid device.
    Type: Grant
    Filed: February 28, 2002
    Date of Patent: March 23, 2004
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventors: Steve Morris, Steve Pollard
  • Patent number: 6697000
    Abstract: A delta-sigma modulator comprising a number of integration stages and having a feed-forward path from a signal input section to the signal path prior to a final integration stage, so as to reduce processing in the majority of integration stages to error processing. A delta-sigma modulator with acceptable dynamic range and incomplete settling can be designed for audio applications using a ratio of gain bandwidth product to sampling frequency in terms of a resolution of the converter. Satisfying the criteria provided by the ratio reduces the gain bandwidth requirement below that previously used as acceptable values in data converter design.
    Type: Grant
    Filed: August 2, 2002
    Date of Patent: February 24, 2004
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventors: Remi LeReverend, Guy Delight
  • Patent number: 6617915
    Abstract: A low power wide swing current mirror circuit wherein the signal current is separated from the bias current, and a bias current sink is connected in parallel with a current mirror so as to shunt the bias current to the circuit common.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: September 9, 2003
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventor: Reghu Rajan