Abstract: A method for manufacturing a structured substrate provided with a trap-rich layer whereon rests a stack consisting of an insulating layer and of a layer of single-crystal material, includes forming an amorphous silicon layer on a front face of a silicon substrate and heat treating intended to convert the amorphous silicon layer into a trap-rich layer made of single-crystal silicon grains. The heat treatment conditions in terms of duration and of temperature are adjusted to limit the grains to a size less than 200 nm. The method also includes overlapping the trap-rich layer with an insulating layer and a layer of single-crystal material.

Abstract: An image capture device 1001 captures an image by using a terahertz wave and includes a generating unit 112 that includes a plurality of generation elements each of which generates the terahertz wave and rests on a resting plane 117, an irradiation optical system 111 that irradiates an object with the terahertz wave, an imaging optical system 101 that images the terahertz wave that is reflected from the object, and a sensor 102 that includes pixels. The plurality of generation elements include at least a first generation element 113 and a second generation element 114 that have different angles of radiation to the object. There is an overlap region in which a region of radiation of a first terahertz wave 156 from the first generation element to the object overlaps a region of radiation of a second terahertz wave 157 from the second generation element to the object.

Abstract: A method of manufacturing a semiconductor device includes forming a first protective layer over an edge portion of a first main surface of a semiconductor substrate. A metal-containing photoresist layer is formed over the first main surface of the semiconductor substrate. The first protective layer is removed, and the metal-containing photoresist layer is selectively exposed to actinic radiation. A second protective layer is formed over the edge portion of the first main surface of the semiconductor substrate. The selectively exposed photoresist layer is developed to form a patterned photoresist layer, and the second protective layer is removed.

Abstract: Image sensors are provided. The image sensor may include a substrate including a first surface and a second surface opposite the first surface, a photoelectric conversion layer in the substrate, and a lower capacitor connection pattern on the first surface of the substrate. The second surface of the substrate may be configured to receive incident light. The lower capacitor connection pattern may include a capacitor region and a landing region protruding from the capacitor region. The image sensors may also include a capacitor structure including a first conductive pattern, a dielectric pattern, and a second conductive pattern sequentially stacked on the capacitor region, a first wire on the capacitor structure and connected to the second conductive pattern, and a second wire connected to the landing region. The first conductive pattern may be connected to the lower capacitor connection pattern.

Abstract: The invention relates to a method for fabricating a semiconductor structure. The method comprises fabricating a photonic crystal structure of a first material, in particular a first semiconductor material and selectively removing the first material within a predefined part of the photonic crystal structure. The method further comprises replacing the first material within the predefined part of the photonic crystal structure with one or more second materials by selective epitaxy. The one or more second materials may be in particular semiconductor materials. The invention further relates to devices obtainable by such a method.

Abstract: A silicon carbide semiconductor device includes a silicon carbide (SiC) substrate having a SiC epitaxial layer disposed over a surface of the SiC substrate, the SiC substrate having a first conductivity and the SiC epitaxial layer having the first conductivity. A contact region and a well region are formed in the SiC epitaxial layer, the contact region and the well region have a doping level of a second conductivity opposite the first conductivity. The contact region lies completely within the well region, is not in contact with a region having the first conductivity and has edges recessed from edges of the well region.

Abstract: A thermal processing system for performing thermal processing can include a workpiece support plate configured to support a workpiece and heat source(s) configured to heat the workpiece. The thermal processing system can include window(s) having transparent region(s) that are transparent to electromagnetic radiation within a measurement wavelength range and opaque region(s) that are opaque to electromagnetic radiation within a portion of the measurement wavelength range. A temperature measurement system can include a plurality of infrared emitters configured to emit infrared radiation and a plurality of infrared sensors configured to measure infrared radiation within the measurement wavelength range where the transparent region(s) are at least partially within a field of view the infrared sensors.

Abstract: A composite substrate is provided in some embodiments of the present disclosure, which includes a substrate, an insulation layer, a first silicon-containing layer and a first epitaxial layer. The insulation layer is disposed on the substrate. The first silicon-containing layer is disposed on the insulation layer, in which the first silicon-containing layer includes a plurality of group V atoms. The first epitaxial layer is disposed on the first silicon-containing layer, in which the first epitaxial layer includes a plurality of group III atoms. A distribution concentration of the group V atoms in the first silicon-containing layer increases as getting closer to the first epitaxial layer, and a distribution concentration of the group III atoms in the first epitaxial layer increases as getting closer to the first silicon-containing layer. A method of manufacturing a composite substrate is also provided in some embodiments of the present disclosure.

Abstract: A method for manufacturing a semiconductor structure includes at least following steps. A device layer is formed on a first semiconductor substrate. The device layer is separated from the first semiconductor substrate. A dielectric layer is formed on a second semiconductor substrate. The device layer is bonded onto the dielectric layer.

Abstract: A film forming method includes: forming a laminated film, in which an interface layer, a bulk layer, and a surface layer are laminated in this order, on a base; and crystallizing the laminated film, wherein the bulk layer is formed of a film that is easier to crystallize than the interface layer in crystallizing the laminated film, and wherein the surface layer is formed of a film that is easier to crystallize than the bulk layer in crystallizing the laminated film.

Abstract: A display apparatus includes a first transistor, a first pixel electrode, a second transistor, and a second pixel electrode. The first transistor includes a first drain electrode. The first pixel electrode is positioned between an edge of the display apparatus and a center of the display apparatus and includes a first recessed structure. The first recessed structure directly contacts the first drain electrode. The second transistor includes a second drain electrode. The second pixel electrode is positioned between the edge of the display apparatus and the first pixel electrode and includes at least one recessed structure. The at least one recessed structure includes a second recessed structure. The second recessed structure directly contacts the second drain electrode. A total maximum width of the at least one recessed structure is greater than a maximum width of the first recessed structure.

Abstract: A depth sensor includes a first pixel including a plurality of first photo transistors each receiving a first photo gate signal, a second pixel including a plurality of second photo transistors each receiving a second photo gate signal, a third pixel including a plurality of third photo transistors each receiving a third photo gate signal, a fourth pixel including a plurality of fourth photo transistors each receiving a fourth photo gate signal, and a photoelectric conversion element shared by first to fourth photo transistors of the plurality of first to fourth photo transistors.

Abstract: A semiconductor device includes a porous dielectric layer including a recessed portion, a conductive layer formed in the recessed portion, and a cap layer formed on the porous dielectric layer and on the conductive layer in the recessed portion, an upper surface of the porous dielectric layer being exposed through a gap in the cap layer.

Abstract: A method of forming a fin field effect transistor (finFET) having fin(s) with reduced dimensional variations, including forming a dummy fin trench within a perimeter of a fin pattern region on a substrate, forming a dummy fin fill in the dummy fin trench, forming a plurality of vertical fins within the perimeter of the fin pattern region, including border fins at the perimeter of the fin pattern region and interior fins located within the perimeter and inside the bounds of the border fins, wherein the border fins are formed from the dummy fin fill, and removing the border fins, wherein the border fins are dummy fins and the interior fins are active vertical fins.

Abstract: A semiconductor package includes a circuit board structure, a redistribution layer structure, a package structure, and a ring structure. The redistribution layer structure has a first region and a second region surrounding the first region. The redistribution layer structure is disposed over and electrically connected to the circuit board structure. A metal density in the second region is greater than a metal density in the first region. The package structure is disposed over the first region of the redistribution layer structure. The package structure is electrically connected to the redistribution layer structure. The ring structure is disposed over the second region of the redistribution layer structure.

Abstract: A light emitting assembly comprising at least one of each of a solid state device and a thermal radiation source, couplable with a power supply constructed and arranged to power the solid state device and the thermal radiation source, to emit from the solid state device a first, relatively shorter wavelength radiation, and to emit from the thermal radiation source non-visible infrared radiation, and a down-converting luminophoric medium arranged in receiving relationship to said first, relatively shorter wavelength radiation, and the infrared radiation, and which in exposure to said first, relatively shorter wavelength radiation, and infrared radiation, is excited to responsively emit second, relatively longer wavelength radiation. In a specific embodiment, monochromatic blue light output from a light-emitting diode is down-converted to white light by packaging the diode and the thermal radiation device with fluorescent or phosphorescent organic and/or inorganic fluorescers and phosphors in an enclosure.

Abstract: A method for making a MOSFET includes forming a gate oxide layer on a substrate; depositing and forming a polysilicon layer on the gate oxide layer; removing the polysilicon layer and the gate oxide layer in a target area by means of dry etching. The remaining gate oxide layer forms a gate oxide of the MOSFET. The remaining polysilicon layer forms a gate of the MOSFET. The method further includes performing LDD implantation on the substrate at both sides of the gate, to form a first LDD area and a second LDD area respectively; and performing SD implantation to form a source and a drain in the substrate at both sides of the gate respectively. Before one of the steps after the depositing and forming a polysilicon layer on the gate oxide layer, fluorine ion implantation is performed.

Abstract: A manufacturing method of a display apparatus including preparing a substrate, forming an amorphous silicon layer on the substrate, cleaning the amorphous silicon layer with hydrofluoric acid, crystallizing the amorphous silicon layer into a polycrystalline silicon layer, and forming a metal layer directly on the polycrystalline silicon layer.

Abstract: There is provided a technique that includes selectively doping a metal film with a dopant by performing: supplying a dopant-containing gas containing the dopant to a substrate in which the metal film and a film other than the metal film are formed on a film in which the dopant is doped; and removing the dopant-containing gas from above the substrate.

Abstract: Provided are a laser annealing apparatus and a method of manufacturing a substrate having a poly-Si layer using the laser annealing apparatus. The laser annealing apparatus includes a laser beam source that emits a linearly polarized laser beam, a polygon mirror that rotates around a rotation axis and reflects the laser beam emitted from the laser beam source, a first Kerr cell disposed on a laser beam path between the laser beam source and the polygon mirror, and a first optical element that directs the laser beam reflected by the polygon mirror toward an amorphous Si layer where the laser beam is irradiated upon the amorphous Si layer.