Abstract: A semiconductor device includes: a base of a first nitride semiconductor; a buffer layer of a second nitride semiconductor provided on or above the base; a channel layer of a third nitride semiconductor provided on or above the buffer layer and having an opening portion; a barrier layer of a fourth nitride semiconductor provided on or above the channel layer; and an electrically conductive contact layer of a fifth nitride semiconductor provided in the opening portion and in contact with the buffer layer and the channel layer. A ratio of Al in a composition of the second nitride semiconductor is higher than or equal to that of the third nitride semiconductor. A ratio of Al in a composition of the first nitride semiconductor and a ratio of Al in a composition of the fourth nitride semiconductor are higher than that of the second nitride semiconductor.

Abstract: The technology relates to a semiconductor device including a hard mask easy to strip and capable of implementing a fine pattern with a high etch selectivity. According to an embodiment of the disclosure, a method for fabricating a semiconductor device comprises forming an etching target layer, forming a hard mask layer on the etching target layer, the hard mask layer including a first boron-doped silicon layer and a second boron-doped silicon layer on the first boron-doped silicon layer, and etching the etching target layer using the hard mask layer as an etching barrier, wherein the second boron-doped silicon layer has a larger boron concentration than the first boron-doped silicon layer.

Abstract: In some embodiments, the present disclosure relates to a method for forming an integrated chip (IC), including forming a plurality of image sensing elements including a first doping type within a substrate, performing a first removal process to form deep trenches within the substrate, the deep trenches separating the plurality of image sensing elements from one another, performing an epitaxial growth process to form an isolation epitaxial precursor including a first material within the deep trenches and to form a light absorbing layer including a second material different than the first material within the deep trenches and between sidewalls of the isolation epitaxial precursor, performing a dopant activation process on the light absorbing layer and the isolation epitaxial precursor to form a doped isolation layer including a second doping type opposite the first doping type, and filling remaining portions of the deep trenches with an isolation filler structure.

Abstract: The present disclosure provides many different embodiments of an IC device. The IC device includes a gate stack disposed over a surface of a substrate and a spacer disposed along a sidewall of the gate stack. The spacer has a tapered edge that faces the surface of the substrate while tapering toward the gate stack. Therefore the tapered edge has an angle with respect to the surface of the substrate.

Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming an upper stack directly above a lower stack. The lower stack comprises vertically-alternating lower-first-tiers and lower-second-tiers. The upper stack comprises vertically-alternating upper-first-tiers and upper-second-tiers. Lower channel openings extend through the lower-first-tiers and the lowers-second-tiers. The lower channel openings have sacrificial material therein. An upper of the lower-first-tiers or a lower of the upper-first-tiers comprises non-stoichiometric silicon nitride comprising (a) or (b), where (a): a nitrogen-to-silicon atomic ratio greater than 1.33 and less than 1.5; and (b): a nitrogen-to-silicon atomic ratio greater than or equal to 1.0 and less than 1.33. A higher of the upper-first-tiers that is above said lower upper-first-tier comprises silicon nitride not having either the (a) or the (b).

Abstract: A light emitting device is disclosed and includes an emission source configured to emit a primary blue light and a wavelength-converting element configured to convert the primary blue light to a secondary light, where the wavelength-converting element including a red phosphor material having a peak emission wavelength that is less than 620 nm and a green phosphor material having a peak emission wavelength that is greater than 530 nm. The device may have a correlated color temperature (CCT) in the range of 1600K-2500K, may exhibit a melanopic/photopic ratio less than 0.25 and/or may exhibit a radiometric power fraction of light having a wavelength below 530 nm below 0.1.

Abstract: An image sensor with improved performance, and a method of fabricating the same are provided.

Abstract: An image sensor is includes a plurality of pixels. Each of the pixels includes a silicon photoconversion region and a material that at least partially surrounds the photoconversion region. The material has a refraction index smaller than the refraction index of silicon, and the interface between the photoconversion region of the pixel and the material is configured so that at least one ray reaching the photoconversion region of the pixel undergoes a total reflection or a plurality of successive total reflections at the interface.

Abstract: Structures for a single-photon avalanche diode and methods of forming a structure for a single-photon avalanche diode. The structure includes a semiconductor substrate having a top surface, a semiconductor layer on the top surface of the semiconductor substrate, a light-absorbing layer on a portion of the semiconductor layer, and a doped region in the portion of the semiconductor layer. The doped region is positioned in the portion of the semiconductor layer adjacent to the light-absorbing layer.

Abstract: An etching method for performing side-etching of silicon germanium layers of a substrate having alternating silicon layers and the silicon germanium layers formed thereon is provided. The method includes modifying surfaces of residuals by supplying a plasmarized gas containing hydrogen to the residuals on exposed end surfaces of the silicon germanium layers, and performing side-etching on the silicon germanium layers by supplying a fluorine-containing gas to the silicon germanium layers.

Abstract: A semiconductor structure includes a trench capacitor, a stacked capacitor, a first electrode plate, and a second electrode plate. The trench capacitor is located in a substrate, in which the trench capacitor has a first conductive structure and a first dielectric structure in contact with the first conductive structure. The stacked capacitor has a second conductive structure and a second dielectric structure in contact with the second conductive structure, in which the stacked capacitor is at least partially aligned with the trench capacitor in an axis vertical to a top surface of the substrate, and the first and second conductive structures are electrically connected. The trench capacitor and the stacked capacitor are electrically connected in parallel between the first and second electrode plates.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor. The image sensor comprises a plurality of photodetectors disposed within a substrate. A metal grid layer is disposed over the substrate. The metal grid layer comprises a metal grid structure overlying a central pixel region of the substrate. The metal grid layer continuously extends from the central pixel region to a peripheral pixel region of the substrate that laterally encloses the central pixel region. An upper metal structure is disposed over the metal grid layer. The upper metal structure overlies the peripheral pixel region. The upper metal structure is laterally offset from the metal grid structure. A lower surface of the upper metal structure is disposed vertically over an upper surface of the metal grid structure.

Abstract: Integrated circuitry comprising a memory array comprises strings of memory cells comprising laterally-spaced memory blocks that individually comprise a first vertical stack comprising alternating insulative tiers and conductive tiers. Strings of memory cells comprise channel-material strings that extend through the insulative tiers and the conductive tiers. The conductive tiers individually comprise a horizontally-elongated conductive line. A second vertical stack is aside the first vertical stack. The second vertical stack comprises an upper portion and a lower portion. The upper portion comprises alternating first insulating tiers and second insulating tiers. The lower portion comprises a lowest insulator tier directly above conductor material of a conductor tier. The lowest insulator tier comprises solid carbon and nitrogen-containing material. An immediately-adjacent tier is directly above the solid carbon and nitrogen-containing material of the lowest insulator tier.

Abstract: An imaging device and electronic apparatus incorporating an imaging device are provided. The imaging device includes a substrate and a plurality of photoelectric conversion units formed in the substrate. Each photoelectric conversion unit in the plurality of photoelectric conversion units is associated with at least one corresponding color filter in the plurality of color filters. The imaging device further includes a plurality of infrared light filters, wherein at least some of the photoelectric conversion units in the plurality of photoelectric conversion units are associated with at least one corresponding infrared light filter in the plurality of infrared light filters.

Abstract: Embodiments of the disclosure include integrated circuit structures having source or drain dopant diffusion blocking layers. In an example, an integrated circuit structure includes a fin including silicon. A gate structure is over a channel region of the fin, the gate structure having a first side opposite a second side. A first source or drain structure is at the first side of the gate structure. A second source or drain structure is at the second side of the gate structure. The first and second source or drain structures include a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is in contact with the channel region of the fin, and the second semiconductor layer is on the first semiconductor layer. The first semiconductor layer has a greater concentration of germanium than the second semiconductor layer, and the second semiconductor layer includes boron dopant impurity atoms.

Abstract: A method of manufacturing a semiconductor device according to the present disclosure includes forming a stack by alternately stacking insulating films and sacrificial films on a substrate; forming, in the stack, a through-hole extending in a thickness direction of the stack; forming a block insulating film, a charge trapping film, a tunnel insulating film, and a channel film on an inner surface of the through-hole in this order; forming, in the stack, a slit extending in the thickness direction of the stack separately from the through-hole; removing the sacrificial films through the slit so as to form a recess between adjacent insulating films; forming a first metal oxide film on an inner surface of the recess; forming, on the first metal oxide film, a second metal oxide film having a crystallization temperature lower than that of the first metal oxide film; and filling the recess with an electrode layer.

Abstract: A display device including: a first data line arranged in a display area of a substrate and extending in a first direction; a second data line arranged in the display area and extending in the first direction; a connecting line arranged in the display area and including a first portion parallel to the first data line, a third portion parallel to the second data line, and a second portion between the first portion and the third portion, wherein the connecting line is electrically connected to the second data line; and an auxiliary line overlapping the first data line or the second data line.

Abstract: The invention relates to a method for fabricating a semiconductor device. The method includes steps of providing a cavity structure, the cavity structure including a seed area including a seed material. The method further includes growing, within the cavity structure, a first embedding layer in a first growth direction from a seed surface of the seed material. The method includes further steps of removing the seed material, growing, in a second growth direction, from a seed surface of the first embedding layer, a quantum dot structure and growing, within the cavity structure, on a surface of the quantum dot structure, a second embedding layer in the second growth direction. The second growth direction is different from the first growth direction. The invention further relates to devices obtainable by such a method.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to vertically stacked field effect transistors and methods of manufacture. The structure includes: at least one lower gate structure on a bottom of a trench formed in substrate material; insulator material partially filling trench and over the at least one lower gate structure; an epitaxial material on the insulator material and isolated from sidewalls of the trench; and at least one upper gate structure stacked vertically above the at least one lower gate structure and located on the epitaxial material.

Abstract: A method of fabricating a display device may include forming a preliminary first pixel definition layer by coating a first material on a base substrate including a first electrode, forming a first pixel definition layer by forming a first opening in the preliminary first pixel definition layer, the first opening exposing the first electrode, performing a plasma treatment on the first pixel definition layer, forming a preliminary organic layer by providing a first organic material, forming a preliminary second pixel definition layer by coating a second material on the first pixel definition layer, forming a second pixel definition layer by forming a second opening in the preliminary second pixel definition layer, the second opening overlapping with the first opening, and forming an organic layer by providing a second organic material. A thickness of the organic layer may be greater than a thickness of the preliminary organic layer.