Patents Examined by Alyaa Mazyad
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Patent number: 8560825Abstract: Embodiments of the invention are directed to streaming virtual machine boot services over a network. An aspect of the invention includes booting a first virtual machine and recording data and metadata from a virtual machine boot image into a virtual machine boot file. The data and metadata are accessed in the process of booting the first virtual machine. The virtual machine boot image has setup information of the virtual machine type of the first virtual machine. The virtual machine boot file is configured for the virtual machine type of the first virtual machine. A descriptor is added to metadata of the virtual machine boot image, which references a location of the virtual machine boot file for the virtual machine type of the first virtual machine.Type: GrantFiled: June 30, 2010Date of Patent: October 15, 2013Assignee: International Business Machines CorporationInventors: Eric K. Butler, Mihail Corneliu Constantinescu, Reshu Jain, Prasenjit Sarkar, Aameek Singh
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Patent number: 8539256Abstract: A method for optimizing efficiency and power consumption in a hybrid computer system is disclosed. The hybrid computer system may comprise one or more front-end nodes connected to a multi-node computer system. Portions of an application may be offloaded from the front-end nodes to the multi-node computer system. By building historical profiles of the applications running on the multi-node computer system, the system can analyze the trade offs between power consumption and performance. For example, if running the application on the multi-node computer system cuts the run time by 5% but increases power consumption by 20% it may be more advantageous to simply run the entire application on the front-end.Type: GrantFiled: February 10, 2009Date of Patent: September 17, 2013Assignee: International Business Machines CorporationInventors: Eric Lawrence Barsness, David L. Darrington, Amanda Peters, John Matthew Santosuosso
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Patent number: 8527747Abstract: Hardware configuration management is provided. A hardware configuration manager includes a proposed new hardware configuration item for an existing production environment and its hardware configuration management software. A completed detailed setup of the management of the proposed hardware configuration item is completed before the proposed hardware configuration item is available. The detailed setup includes at least configuring policies of the proposed hardware configuration item. The hardware configuration manager also comprises a device for preventing scheduled tasks from running until a predefined period following activation of a new hardware configuration item that has the completed detailed setup and the proposed hardware configuration item is mapped thereto.Type: GrantFiled: September 20, 2010Date of Patent: September 3, 2013Assignee: International Business Machines CorporationInventors: Gregory R. Hintermeister, Tammy L. Van Hove
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Patent number: 8504814Abstract: User terminal resilience to application elements may be provided. Upon initialization, a user terminal may detect elements associated with the user terminal's operation. The user terminal may load each of the elements in turn and determine whether the element causes a fault in the user terminal. Elements that result in a fault may be disabled from being loaded in the future.Type: GrantFiled: June 28, 2010Date of Patent: August 6, 2013Assignee: Cisco Technology, Inc.Inventor: Mark R. Murray
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Patent number: 8452991Abstract: A partition that is executed by multiple processing nodes. Each node includes multiple cores and each of the cores has a frequency that can be set. A first frequency range is provided to the cores. Each core, when executing the identified partition, sets its frequency within the first frequency range. Frequency metrics are gathered from the cores running the partition by the nodes. The gathered frequency metrics are received and analyzed by a hypervisor that determines a second frequency range to use for the partition, with the second frequency range being different from the first frequency range. The second frequency range is provided to the cores at the nodes executing the identified partition. When the cores execute the identified partition, they use a frequencies within the second frequency range.Type: GrantFiled: August 20, 2009Date of Patent: May 28, 2013Assignee: International Business Machines CorporationInventors: Andrew Geissler, Raymond J. Harrington, Hye-Young McCreary, Freeman Leigh Rawson, III, Malcolm Scott Ware
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Patent number: 8433943Abstract: A power-supply expansion system includes a primary power-supply unit for providing a main power supply, a secondary power-supply unit for providing an auxiliary power supply, a power unit having a first and a second input terminal and an output terminal, and a control unit connected to the primary and the secondary power-supply unit. The control unit, based on a load value of the primary power-supply unit, selectively performs a power-supply expansion process for the secondary power-supply unit to feed the auxiliary power supply to the second input terminal. In the power-supply expansion process, the first input terminal receives the main power supply and the second input terminal receives the auxiliary power supply, and the power unit integrates the main and the auxiliary power supply into an output power supply, which is output via the output terminal. A power-supply expansion method applicable to the power-supply expansion system is also disclosed.Type: GrantFiled: June 30, 2010Date of Patent: April 30, 2013Assignee: Elitegroup Computer Systems Co., Ltd.Inventors: Chang-Pan Lin, Shih-Chun Chang
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Patent number: 8423811Abstract: A mechanism is provided for transparently consolidating resources of logical partitions. Responsive to the existence of the non-folded resource on an originating resource chip, the virtualization mechanism determines whether there is a destination resource chip to either exchange operations of the non-folded resource with a folded resource on the destination chip or migrate operations of the non-folded resource to a non-folded resource on the destination chip. Responsive to the existence of the folded resource on the destination resource chip, the virtualization mechanism transparently exchanges the operations of the non-folded resource from the originating resource chip to the folded resource on the destination resource chip, where the folded resource remains folded on the originating resource chip after the exchange. Responsive to the absence of another non-folded resource on the originating resource chip, the vitalization mechanism places the originating resource chip into a deeper power saving mode.Type: GrantFiled: April 26, 2012Date of Patent: April 16, 2013Assignee: International Business Machines CorporationInventors: Naresh Nayar, Karthik Rajamani, Freeman L. Rawson, III
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Patent number: 8412972Abstract: Described herein are a method and an apparatus for reducing power consumption of memories by monitoring the power states of the memories via an operating system. The method comprises reading counter values corresponding to power states of each memory of a plurality memories; computing a power state usage corresponding to the power states of each memory of the plurality, the computing based on the counter values; determining whether the power state usage exceeds a predetermined threshold usage; and adjusting current and future usage of each memory of the plurality in response to determining that the power state usage exceeds the predetermined threshold usage.Type: GrantFiled: June 28, 2010Date of Patent: April 2, 2013Assignee: Intel CorporationInventors: Kin-Hang Cheung, Neelam Chandwani, Chetan D. Hiremath, Udayan Mukherjee, Rakesh Dodeja
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Patent number: 8381002Abstract: A mechanism is provided for transparently consolidating resources of logical partitions. Responsive to the existence of the non-folded resource on an originating resource chip, the virtualization mechanism determines whether there is a destination resource chip to either exchange operations of the non-folded resource with a folded resource on the destination chip or migrate operations of the non-folded resource to a non-folded resource on the destination chip. Responsive to the existence of the folded resource on the destination resource chip, the virtualization mechanism transparently exchanges the operations of the non-folded resource from the originating resource chip to the folded resource on the destination resource chip, where the folded resource remains folded on the originating resource chip after the exchange. Responsive to the absence of another non-folded resource on the originating resource chip, the vitalization mechanism places the originating resource chip into a deeper power saving mode.Type: GrantFiled: June 23, 2010Date of Patent: February 19, 2013Assignee: International Business Machines CorporationInventors: Naresh Nayar, Karthick Rajamani, Freeman L. Rawson, III