Abstract: The invention is related to analog to digital conversion of a multi-level analog signal at a very low sampling rate. The analog signal is sampled by a recovered clock to produce a succession of samples of the analog signal. The low sampling rate may be within an order of magnitude of the symbol rate of the analog signal. Each sample is converted to a digital word. A phase detector reference circuit determines from peak values of the analog signal at least two allowable levels of the analog signal including a reference-crossing level. The phase detector defines a zero band of amplitude ranges of the analog signal including the reference-crossing level. It further defines an error band of amplitude ranges of the analog signal extending from said zero band to a fraction of the amplitude of the next allowable level. The phase detector then infers either a positive or negative phase error for each pair of successive samples of the analog signal.

Abstract: The present invention relates to method and apparatus of converting a series of data words into modulated signals. This method divides a data word, which a sync signal is to be added in front or rear of when it is written in a recording medium, into two or more word segments, generates for each word segment a number of intermediate sequences by combining mutually different digital words with that word segment, scrambles these intermediate sequences to form alternative sequences, translates each alternative sequence into a (d, k) constrained sequence, checks how many undesired sub-sequences are contained in each (d, k) constrained sequence, and selects one (d, k) constrained sequence for recording on an optical or magneto-optical recording medium among the (d, k) constrained sequences not having the undesired sub-sequence. Applying this method to a modulating device, DSV control can be conducted by much simpler hardware.

Abstract: A method of improving bandwidth of wireless CDMA systems by shuffling the rows of a Hadamard function in a pseudo-random manner. A Hadamard function is used to provide orthogonality between users. The orthogonal waveforms are used to prevent interference from different users sharing the same cell as well as multiple channels from the same user. The rows of the Hadamard function are shuffled in a pseudo-random manner. This effectively maximally spreads the spectral density of the transmitted signal out across the available spectrum. These codes are pre-computed and stored in lookup tables of mobile wireless devices. The data signals are modulated by one set of codes. Thereby, one data bit can be transmitted per chip.

Abstract: A method for mitigating interference in impulse radio communication conveying a message from a transmitting station to a receiving station. The method comprises the steps of: (a) conveying the message in packets; (b) repeating conveyance of selected packets to make up a repeat package; and (c) conveying the repeat package a plurality of times at a repeat period greater than twice the occurrence period of the interference. The communication may convey a message from a proximate transmitter to a distal receiver, and receive a message by a proximate receiver from a distal transmitter.

Abstract: A spread spectrum communications apparatus for synchronizing a received spread spectrum modulated signal and a de-spreading code, and its synchronization acquisition method are disclosed. In the first synchronization acquisition operation, the phase of the de-spreading code is sequentially changed finely depending on the number of chips, and the correlation value of the spread spectrum modulated signal and de-spreading code is detected. Further, the maximum value and average of the correlation value for the number of times of detection are determined. When the maximum value is judged to be larger than the sum of the average and a specified threshold level, the first acquisition operation is completed. Consequently, the process is advanced to a second synchronization acquisition operation for determining the phase for establishing the synchronization by changing finely the phase of the de-spreading code before and after the phase corresponding to the maximum value.

Abstract: Methods and devices for extracting a joint probability from a MAP decision device are provided. Probability information associated with a first symbol and a second symbol is obtained from the MAP decision device. A joint probability of the first symbol and the second symbol is determined from the probability information associated with the first symbol and the second symbol. Methods and devices for processing a signal containing information associated with a plurality of transmitted bits using the generated joint probability information are also provided. The MAP decision device in various embodiments is a demodulator or a decoder.

Abstract: A network of localizers determines relative locations in three-dimensional space to within 1 cm by cooperatively measuring propagation times of pseudorandom sequences of electromagnetic impulses. Ranging transmissions may include encoded digital information to increase accuracy. The propagation time is determined from a correlator circuit which provides an analog pseudo-autocorrelation function sampled at discrete time bins. The correlator has a number of integrators, each integrator providing a signal proportional to the time integral of the product of the expected pulse sequence delayed by one of the discrete time bins, and the non-delayed received antenna signal. With the impulses organized as doublets the sampled correlator output can vary considerably in shape depending on where the autocorrelation function peak falls in relation to the nearest bin. Using pattern recognition the time of arrival of the received signal can be determined to within a time much smaller than the separation between bins.

Abstract: An FM broadcast transmitter transmits a broadcast signal having a carrier at a broadcast frequency and sidebands, able to be transmitted at full power, within a transmission band-width around the carrier. It includes a source of a modulated FM stereo signal having a carrier at the broadcast frequency and having sidebands with a bandwidth less than the transmission bandwidth representing a stereo signal. It also includes a source of a modulated IBOC signal, having carrier pulses spaced relative to each other to represent the IBOC digital data signal encoded as a variable pulse width encoded signal, and a bandwidth within the transmission bandwidth not overlapping the FM stereo signal sidebands. A signal combiner combines the modulated FM stereo signal and the modulated IBOC signal to form the broadcast signal.

Abstract: Apparatus and method for correlating a received communication of a known sequence over a wireless channel through the use of a finite impulse response (FIR) filter having a small number of taps to reduce hardware requirement by as much as one-half that of conventional techniques while obtaining amplitude degradation which is no worse than experienced when employing conventional techniques.

Abstract: The present invention relates generally to impairment detection and compensation in a communications network. One embodiment includes a method for generating an adaptive Digital Impairment Learning (DIL) sequence for use in a training mode which assists in resolving digital loss ambiguities affecting the mapping of analog levels to digital levels in a communications network. The method includes identifying a feature octet for a pair of the digital loss ambiguities, determining a number of transmit copies of the feature octet based at least in part upon a noise variance, and modifying a standard DIL sequence with the number of transmit copies of the feature octet to produce the adaptive DIL sequence for use in the training mode. Alternate embodiments relate to an apparatus for generating an adaptive DIL sequence for use in a training mode and an apparatus and method for compensating for digital losses in a communications network.

Abstract: A receiver circuit that can obtain a reception signal with accuracy in high-speed communications using two-wire transmission lines. The receiver circuit receives information signals in a communication system with two-wire transmission lines for transmitting the information signals in opposite phases to each other. The receiver circuit includes an alternating-current coupling arrangement provided for each of the two-wire transmission lines and for extracting alternating-current components of the information signals inputted through the transmission lines. The receiver circuit also includes a reception signal generating arrangement for obtaining a reception signal corresponding to the information signals in accordance with output signals from each of the alternating-current coupling arrangements. Each of the alternating-current coupling arrangements include two time constant circuits having time constants different from each other and connected in parallel to each other between an input and output thereof.

Abstract: A method for modulating a sequence of data symbols such that the transmit signal exhibits spectral redundancy. Null symbols are inserted in the sequence of data symbols such that a specified pattern of K data symbols and N-K null symbols is formed in every period of N symbols in the modulated sequence, N and K being positive integers and K being smaller than N.

Abstract: The invention provides a radio receiving method and apparatus by which adjustment of a reception frequency when a radio modulation signal of a PSK system is received is realized by simple processing. Phase data is sampled out in a predetermined cycle from a random received modulation signal and cumulatively added for a predetermined period, and the reception frequency is adjusted so that a calculation result of the cumulative addition may satisfy a predetermined allowance range. Consequently, the reception frequency can be adjusted by simple processing without detecting a phase error from the modulation signal.

Abstract: A signal repeater for use between a serial data line and a peripheral device is disclosed. The signal repeater receives bus signals on the serial data line at a first voltage and translates the bus signal into a device signal of a second voltage. Also, the signal repeater is operative to receives device signals from the device at the second voltage and translates the device signal into a bus signal at the first voltage.

Abstract: A demodulator arrangement, suitable to demodulate data symbols modulated in accordance with a predefined constellation diagram and sent as part of information bursts (A1, B1, C1, D1, A2, B2, C2, D2) over a transmission medium with substantially stable attenuation characteristics, detects the amplitude of the data symbols in a coherent way and detects the phase of the data symbols in a differential way.

Abstract: A RFI canceller, for use in a subscriber line system using multi-carrier modulation, measures a RFI disturbance in carriers falling within a band of frequencies causing the RFI. The RFI ingress into carriers outside the band of frequencies is estimated, and an error correcting signal derived from the estimation of the RFI ingress is subtracted from a received signal. The subscriber line system may be a VDSL system and the multi-carrier modulation may be DMT. The RFI canceller includes a demodulator for demodulating an incoming data stream to provide a first parallel data stream. A parallel to serial convertor converts the first parallel data stream to a first serial data stream. A digital to analogue convertor converts the first serial data stream to a first analogue signal. An analogue RFI canceller circuit combines the analogue signal with an analogue error correcting signal, to produce a second analogue signal.

Abstract: In a CDMA receiver of the present invention in accordance with the IS-95 standard, at least one pilot filter is provided externally of a loop for synchronization tracking. Then filtering processing of a pilot signal and synchronization tracking processing is performed concurrently. Further using synchronization establishment information transmitted from a base station, a rate for the synchronization tracking is adaptively changed. Furthermore a time constant of the pilot filter independently provided is set using information from an AFC circuit. According to the present invention, it is possible to perform the filtering processing of the pilot signal assuredly, and to improve the synchronization tracking capability.

Abstract: Communications between a host and a peripheral may be initiated by the peripheral transmitting data at the highest support data rate to the host. If the host is able to recognize the data, the host can so indicate to the peripheral. Otherwise, the peripheral may try a lower data rate progressively decreasing the data rate until the best possible data rate is identified under current conditions. In this way, a communication link may be established in a relatively straightforward fashion that is optimal for the given current conditions.

Abstract: A system and method for switching between input clock signals from different clock sources without losing lock by providing a supplemental correction signal to the loop filter in a phase locked loop (PLL) circuit. The phase detector includes a supplemental correction pulse generator configured to offset, at least partially, the effects of losing an input clock signal from a first clock source failure. The phase detector is coupled to receive the input clock signal and a feedback signal. The phase detector outputs a phase error signal indicative of a comparison between the input clock signal and the feedback signal. The loop filter is coupled to receive the phase error signal and to output an error correction signal. A voltage controlled oscillator is coupled to receive the error correction signal and to generate the output signal of the PLL, with the feedback signal indicative of the output signal. Switching logic is coupled to monitor the input clock signal from the first clock source for a failure.

Abstract: Disclosed is a clock signal control device which has: an oscillator which generates a clock signal; a pulse detecting circuit which detects the frequency or duty of the clock signal and outputs a control signal based on the result of detection; and a clock signal supply selecting circuit which generates a supply clock signal from the clock signal generated from the oscillator in response to the control signal from the pulse detecting circuit.