Abstract: Two superimposed series of electric contacts in the shape of metal-sheet strips, electrically connected to a metallic place which supports a semiconductor chip, are electrically separated but mechanically connected by an interposed layer of adhesive material at high insulation. The whole is completely inserted in a covering of insulating material, which forms a flat support, from which, at opposite faces, only limited adjacent contact portions of said electric contacts emerge.The place and at least one of the two series of contacts make part of a single starting metallic frame, on which the other series of contacts is superimposed. This latter in its turn can make part of the same metallic frame and to be superimposed by refolding or can be prepared separately and then applied on the first series.

Abstract: A planarization method includes the steps of forming a second layer on a first layer which has an alignment mark having a heat sink structure, where the second layer is made of a metal, and irradiating a pulse energy beam on the entire exposed surface of the second layer to planarize the second layer. The heat generated in the second layer on the alignment mark is released via the first layer so that substantially no melting of the second layer occurs on the alignment mark.

Abstract: A method for packaging integrated circuits for surface mount which provides advantages over prior art techniques by providing increased strength to integrated circuit package leads for increased lead dimensional stability to accommodate the finer pitches needed for high density integrated circuits, i.e., with leadcounts of 200 or more leads. The method is for producing a plastic integrated circuit package that allows for transfer molding using a non-conductive, permanent dambar. The invention includes the resulting leadframe. The method produces a package having embedded leads (on both sides and in between) in a double sided film/adhesive combination which increases lead dimensional stability and which does not require removal before device mounting. The double sided film/adhesive combination is non-conductive, is able to withstand all the package assembly process steps and is applied before a die is dedicated to a leadframe.

Abstract: A laser ablation damascene process for the planarizing of metal/polymer structures. More specifically, the process is especially adapted for the fabrication of both interlevel via metallization and circuitization layers in integrated circuit (IC) interconnects. Subsequent to the forming or etching of holes or depressions in a polymer insulating layer, a metal layer or film is deposited thereon for the purpose of fabricating vias or trenches for metallization and circulation layers in IC connects. Thereafter, the surface of the metal layer which has been deposited or superimposed on the polymer substrate through any suitable method known in the art is irradiated with at least one laser pulse which will cause the metal layer to melt and reflow and resultingly fill the vias and trenches etched in the polymer substrate while simultaneously ablating and removing the metal from the planarized surface of the substrate in the regions about the vias and trenches.

Abstract: Solar cells are formed of semi-conductor spheres of P-type interior having an N-type skin are pressed between a pair of aluminum foil members forming the electrical contacts to the P-type and N-type regions. The aluminum foils, which comprise 1.0% silicon by weight, are flexible and electrically insulated from one another. The spheres are patterned in a foil matrix forming a cell. Multiple cells can be interconnected to form a module of solar cell elements for converting sun light into electricity.

Abstract: Solder interconnection whereby the gap created by solder connections between a carrier substrate and semiconductor device is filled with a composition obtained from curing a preparation containing a cycloaliphatic polyepoxide and/or curable cyanate ester or prepolymer thereof; filler having a maximum particle size of 31 microns and being at least substantially free of alpha particle emissions.

Abstract: A method for eutectically attaching a silicon chip to a gold-coated substrate. Prior to heating and scrubbing of the silicon chip against the gold surface, a gold lattice structure is placed between the silicon chip bottom surface and the gold surface. The gold lattice structure contacts the silicon chip bottom surface over an area equal to less than ten percent of the total surface area of the chip bottom surface. The point source contact between the gold lattice and silicon chip promotes formation of the gold/silicon eutectic alloy at temperatures of between 400.degree. to 475.degree. C. The gold/silicon eutectic alloy spreads between the silicon chip bottom surface and gold top surface to provide eutectic bonding. The method is especially useful in bonding relatively large silicon chips or dies to gold-coated substrates wherein the bottom surface or back side of the chip is not coated with a protective metal layer.

Abstract: A cellular concrete composition having improved strength consisting of hydraulic cement, water and at least one alpha, beta-unsaturated dicarboxylic acid such a maleic or fumaric acid. A method is also provided comprising preparing a cement paste containing hyraulic cement and water, mixing the cement paste with a bubbled frother solution containing at least one alpha, beta-unsaturated dicarboxylic acid and optionally an alkylene glycol and/or a nonionic surface-active agent, and casting the mixture in a mold to solidify.

Abstract: A class of Glycine B partial agonists is described for use in memory and learning enhancement or for treatment of a cognitive disorder. Preferred Glycine B partial agonists include the compound D-cycloserine and its prodrug compounds.

Abstract: With a method of and an apparatus for manufacturing semiconductor devices using copper-type lead frames with no silver plating, semiconductor devices are continuously manufactured in the following steps: first, a semiconductor pellet having electrodes on its surface is bonded, through a resin material, to a die pad on a copper-alloy lead frame which is not silver-plated. The resin material used for the bonding is then cured by heating it for 120 seconds or less in a non-oxidizing-gas atmosphere having an oxygen density of 1000 ppm or less. Then, the thickness of the oxide film which is formed on the surface of the lead frame while curing the resin material is reduced to 20 .ANG. or less by keeping the lead frame in a deoxidizing-gas atmosphere having an oxygen density of 500 ppm or less.

Abstract: A metallized spinel material and a method for producing a metallized spinel material are provided. The spinel is a high-transmissive material and, particularly, has high transmission in the ultraviolet and, preferably, the visible infrared wavelength regions as well. The high-transmissivity spinel material is metallized by applying the slurry containing a metal, such as tungsten, molybdenum and/or manganese to the substrate, and firing at en elevated temperature such as 1200.degree. to 1800.degree. C., preferably 1500.degree. to 1800.degree. C. for about 1/2 hour in a non-oxidizing atmosphere.

Abstract: A method of depositing tungsten on a substrate utilizing silicon reduction wherein the process is non-limiting as to the thickness of silicon that may be converted to tungsten. A silicon substrate is provided with at least one area of silicon material having a predetermined thickness and the substrate is exposed to a tungsten hexafluoride gas flow in a chemical vapor deposition environment. By adjusting the WF.sub.6 gas flow rate and the CVD process parameters, such as pressure, temperature and deposition time, the thickness of silicon converted to tungsten can be adjusted in order to convert the entire thickness. A novel structure having a midgap tungsten gate and tungsten source and drain metallized layers is also disclosed.

Abstract: In a semiconductor device, a thin, synthetic diamond film (i.e. a man made film) enhances the transfer of heat from a semiconductor circuit chip to a cooling medium. The heat generating semiconductor circuit chip is located in efficient thermal transfer engagement with one surface of a synthetically deposited diamond film. The opposite surface of the diamond film forms the bottom wall of a cavity that contains a cooling medium. In one embodiment of the invention, the cavity is formed by depositing the diamond film on the surface of a silicon substrate, and then etching the silicon substrate to form an open-top cavity having side walls that comprise the silicon substrate, and having a bottom wall that comprises the diamond film. In a second embodiment of the invention, the open-top cavity is formed by an apertured silicon preform that is bonded to the diamond film. A capping member closes the top of the cavity. A cooling medium is placed within the cavity.

Abstract: An improved process of making a ferroelectric electronic component, such as a non-volatile RAM or an electro-optic switching array, is disclosed. The process essentially includes the separate formation of two subassemblies and then connecting them by placing one on top of the other. Electrical contacts are made by "bumping" or other "flip chip" techniques.

Abstract: The present invention proposes a method of manufacturing semiconductor devices from an elongated leadframe by using a differential overlapping apparatus. The leadframe has longitudinally spaced pairs of staggered leads. The overlapping apparatus functions to deform the leadframe during transfer thereof, so that each pair of staggered leads assumes the same longitudinal position but displaced away from each other perpendicularly to a plane containing the leadframe. The leadframe is further deformed to cuase the pair of leads to move toward each other, so that a semicondductor chip is sandwiched between the pair of leads for bonding.

Abstract: This invention relates generally to a novel method of manufacturing a composite body. More particularly, the present invention relates to a method for modifying the resultant properties of a composite body, by, for example, minimizing the amount of porosity present in the composite body. Additives such as TaC, ZrC, ZrB.sub.2, VC, NbC, WC, W.sub.2 B.sub.5 and/or MoO.sub.2 B.sub.5 can be combined with a boron carbide material which is thereafter reactively infiltrated by a parent metal. The composite body comprises one or more boron-containing compounds (e.g., a boride or a boride and a carbide) which is made by the reactive infiltration of molten parent metal into the boron carbide mass. Particular emphasis is placed upon modifying the properties of a ZrB.sub.2 -ZrC-Zr composite body. However, the methods disclosed in the application are believed to be generic to a number of parent metals and preform materials.

Abstract: In hermetically sealing a base structure (10) of a ceramic package for a semiconductor device to a cap structure (12) of the device, one or more venting slots (36) are initially provided in the base sealing layer (16) or in the cap sealing layer (26). The base and cap structures are then fused together along the two sealing layers and electrical leads (20) by bringing the structures into contact and heating them to a temperature high enough to cause the sealing material to flow readily. The venting slots allow air to escape during the fusing step. This inhibits the formation of air bubbles along the sealing interface and thereby improves the hermeticity of the seal. The structures are subsequently cooled to harden the sealing layers into a unitary layer (28).

Abstract: Metal boride powders can be produced with a predetermined particle size by controlling reaction conditions. The metal boride powder is produced by reacting a solid boron source, a metal source and a reductant under conditions sufficient to produce a metal boride powder with a particle size correlating to that of the solid boron source. The reaction is preferably stopped after the formation of products but before any appreciable crystal growth occurs.

Abstract: A method of manufacturing hermetically sealed circuit assemblies (10) having circuit elements (74, 76, 78 and 80) to be compression bonded, a hermetically sealed circuit assembly having circuit elements to be compression bonded and a stack containing at least one hermetically sealed circuit assembly having circuit elements which are compression bonded is disclosed. Uniform thickness of individual hermetically sealed circuit assemblies measured across columns (22-30) is insured by positioning deformable spacers (124-132) in the columns containing the circuit elements to be compression bonded, and deforming the deformable spacers so that a surface of each of the deformed spacers lies within a single plane. Thereafter a compressive force is applied to a stack of one or more circuits through the columns which contain the circuit elements to be compression bonded.

Abstract: A method for fabricating and especially for encapsulating a semiconductor device in a plastic package is disclosed. In accordance with one embodiment of the invention the method includes steps of providing an encapsulation mold having a first chamber and a second chamber, with the second chamber spaced outwardly from and substantially surrounding the first chamber. The first chamber is shaped to receive a removable insert. An insert is selected for the particular body type and style which is desired and that insert is secured in the first chamber. The insert has a cavity which is shaped to define the desired encapsulated device package body. A lead frame is provided including a bonding area and a plurality of leads, each lead having a inner portion near the bonding area and an outer portion extending outwardly from the bonding area.