Patents Examined by Andrew J. Anderson
  • Patent number: 4931137
    Abstract: The invention relates to a process for producing on a substrate conductor elements which are mutually spaced by a submicron dimension.This process comprises the stages of producing on substrate (1) spacers, whose dimensions and spacing are a function of the dimensions and spacing of the elements (11a) to be produced, anisotropic deposition on the substrate and perpendicular thereto of the material (11a) constituting the spacers and elimination of said spacers.The invention applies to the production of any random elements and particularly to the production of slightly mutually spaced electric conductors.
    Type: Grant
    Filed: November 17, 1987
    Date of Patent: June 5, 1990
    Assignee: Commissariat a l'Energie Atomique
    Inventor: Henri Sibuet
  • Patent number: 4890860
    Abstract: A gas generator for automobile gas bags and the like includes a grain wherein a plurality of wafers of combustible gas generating material is arranged in a side by side array and a plurality of meshed cushion members is disposed in alternating relation between the wafers and compressed between the wafers in order to provide improved burn surface neutrality for more uniform inflator gas flow and better utilization of the gas generant, increased retention of solid residue in the combustion chamber for reduced plugging of the gas filters and cleaner inflation gas, a higher volumetric loading fraction so that the size and weight of the inflator may be reduced, and structural suspension of each individual wafer between the adjacent compressed cushion members to reduce breakage and damage of the wafers during the many years the inflator may remain in an automobile.
    Type: Grant
    Filed: January 13, 1988
    Date of Patent: January 2, 1990
    Assignee: Morton Thiokol, Inc.
    Inventor: Fred E. Schneiter
  • Patent number: 4886573
    Abstract: In a process for forming a wiring conductor of Cu, Al, Au or the like on a wiring substrate, polyimide-based resin having the following unit structural formula is used as a lift-off material. ##STR1## wherein R.sub.1 : ##STR2## R.sub.2 : ##STR3## n is an integer of 15,000 to 30,000. This lift-off material has very good etching susceptibility and can be selectively lifted off with an etching solution of a mixture of hydrazine and ethylene diamine from a lower polyimide layer having R.sub.1 : ##STR4## R.sub.2 : ##STR5## .
    Type: Grant
    Filed: August 19, 1987
    Date of Patent: December 12, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Watanabe, Osamu Miura, Kunio Miyazaki, Shunichi Numata, Kanji Otsuka
  • Patent number: 4871418
    Abstract: According to a preferred embodiment, arbitrarily shaped holes are fabricated in 0.1 to 2 mm thick plates of polyoxymethylene homo- or copolymers. For that purpose, the polymeric substrate is photoresist-coated on either side; the desired pattern is simultaneously applied to both the front and the back side of the photoresist layers by imagewise exposure at optimum mask alignment; the photoresist layers are developed and blanket-exposed; the resultant photoresist structures are treated with a cyclic organosilicon compound and postbaked; the through holes are produced by sequential reactive ion etching of the polyoxymethylene from the front and the back side, each time down to a depth of about 2/3 of the substrate thickness; and the silylated photoresist masks are stripped from the front and the back side of the substrate.
    Type: Grant
    Filed: March 23, 1988
    Date of Patent: October 3, 1989
    Assignee: International Business Machines Corporation
    Inventors: Jurgen Wittlinger, Johann Greschner, Thomas Bayer, Johann W. Bartha
  • Patent number: 4871417
    Abstract: A method for surface treating of thin substrates such as semiconductor wafers, wherein a semiconductor wafer formed with relatively deep but transversely minute trenches on its surface is horizontally placed on a spinner in a chamber with its trenched surface directed up, ultraviolet light is then emitted onto the surface of the wafer to dissolve impurities sticking in the trenches, and thereafter etchant is spouted from a nozzle to the trenched surface of the wafer being spinned about a vertical axis at a high speed. Next, the inside of the chamber is subjected to a lower pressure than atmospheric pressure, and atmospheric pressure is restored after the lapse of a predetermined time. Thus a series of these steps of etchant supplying, pressure reducing, and pressure recovering are carried out until the complete entrance of the etchant into the interior surfaces of the trenches is effected, so as to even or smooth the interior surfaces and, finally the wafer is treated with rinsing, heating and drying steps.
    Type: Grant
    Filed: June 30, 1987
    Date of Patent: October 3, 1989
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Hisao Nishizawa, Masaru Morita, Masato Tanaka
  • Patent number: 4869779
    Abstract: A device for hydroplane polishing an exposed face of a sample includes a sample support having freedom of movement in a direction perpendicular to the exposed face; a polishing member having a surface opposite the exposed face; and a polishing fluid source for directing polishing fluid to a limited zone in the vicinity of the exposed face at sufficient pressure to cause the exposed face to hydroplane relative to the surface. Also, a device for rotating a sample relative to a surface for polishing a face of the sample using fluid in the space between the sample face and the surface includes a sample support held in a housing by an air bearing, and a source of air flow for rotating the support. Also, a device for hydroplane polishing includes a positive drive to rotate the sample support. Also, a device for polishing an exposed face of a sample includes a positive drive to rotate the sample and a positive drive to rotate the polishing member.
    Type: Grant
    Filed: July 27, 1987
    Date of Patent: September 26, 1989
    Inventor: Robert E. Acheson
  • Patent number: 4867840
    Abstract: A method for making a layered metal chalcogenide catalyst wherein the catalyst has a crystalline structure with increased edge sites produced by lithographic methods.
    Type: Grant
    Filed: March 29, 1988
    Date of Patent: September 19, 1989
    Assignee: Exxon Research and Engineering Company
    Inventors: Charles B. Roxlo, Harry W. Deckman, J. Thomas Tiedje
  • Patent number: 4868138
    Abstract: A process for forming electrical interconnect on MOS semiconductor integrated circuits includes the formation of a capping layer of oxide over the first level poly layer prior to patterning. The capping layer is then removed over selected regions. The conductive layer and capping oxide layer are then patterned to form transistor gates and interconnect. Source/drain regions are formed in active areas of the integrated circuit, and sidewall oxide is formed next to the patterned gate regions. When a second layer of interconnect is formed and patterned over the integrated circuit, contact between the first and second interconnect layers is made in the previously defined selected regions.
    Type: Grant
    Filed: March 23, 1988
    Date of Patent: September 19, 1989
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventors: Tsiu C. Chan, Yu-Pin Han
  • Patent number: 4865684
    Abstract: A semiconductor (10) is subject to ionic etching (14) through a mask, whereof one side determines the location of the mirror. This mask is constituted by a crystalline layer (12), whereof the side (16) is a crystallographic plane.
    Type: Grant
    Filed: February 12, 1988
    Date of Patent: September 12, 1989
    Inventor: Noureddine Bouadma
  • Patent number: 4863555
    Abstract: An apparatus for processing the interiors of elongated hollow tubes having open opposite ends, such as by acid etching, water rinsing, steam cleaning or air drying the tube interiors, includes a pair of tube clamping mechanism being operable between tube clamping and unclamping conditions. The clamping mechanisms when in their clamping conditions support the tubes in stationary side-by-side spaced positions for processing and at locations on the tubes displaced inwardly from their opposite ends. The apparatus also has a pair of fluid supply manifolds each being displacable between disengaged and engaged positions with respect to the open opposite tube ends and having nozzles for engaging the respective tube ends to seal off the interior of the tube from the external atmosphere when the manifolds are in their engaged positions.
    Type: Grant
    Filed: July 27, 1987
    Date of Patent: September 5, 1989
    Assignee: Westinghouse Electric Corp.
    Inventors: Clarence D. John, Jr., Francis C. McNerney
  • Patent number: 4863556
    Abstract: A geometrically accurate transfer with low manufacturing tolerances is made possible by a method for transferring superfine photoresist structures into a dielectric layer. A photoresist mask is provided on the dielectric layer. This mask is used in a subsequent ion implantation. The implantation is carried out under such circumstances that neither the resist mask nor the dielectric layer which is to be structured is got through by the incident ion beam.
    Type: Grant
    Filed: May 18, 1988
    Date of Patent: September 5, 1989
    Assignee: Siemens Aktiengesellschaft
    Inventor: Hansjorg Reichert
  • Patent number: 4863562
    Abstract: A method for increasing the width of a transistor includes first forming a nitride cap (14) over the substrate (10) and then forming trenches (24) and (26) on either side of the cap (14) and having tapered sidewalls (28) and (30). A conformal layer of nitride (32) is formed over the substrate and then anisotropically etched to form sidewall layers (34) and (36). Field oxide is grown in the trenches with birds beaks (42) and (44) extending upward under the sidewall layers (34) and (36). A portion of the sidewalls (28) and (30) of the trenches remain such that the overall surface area between the edges of the birds beaks (42) and (44) is increased. A layer of strip oxide is then grown on the substrate to provide rounded edges (47) and (49). The strip oxide is then removed by a fifty percent over etch to cause the birds beaks (42) and (44) to recede, thus further increasing the surface area.
    Type: Grant
    Filed: February 11, 1988
    Date of Patent: September 5, 1989
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventors: Frank R. Bryant, Fu-Tai Liou
  • Patent number: 4861420
    Abstract: A semiconductor transducer (10) including a substrate having a well (18) formed in one surface thereof and a semiconductor layer (14) having a first surface (26) bonded to the substrate about the periphery of the well to form a diaphragm (30) and a second surface (28) which is substantially parallel to the first surface and has a pedestal (16) projecting therefrom which is disposed above the well. The side walls (32) of the pedestal are substantially orthogonal to the second surface of the semiconductor layer and are formed by sawing edge portions of said semiconductor layer. The substrate includes structures (38) which extend upward from the bottom of the well to limit the deflection of the diaphragm.
    Type: Grant
    Filed: July 14, 1987
    Date of Patent: August 29, 1989
    Assignee: Tactile Perceptions, Inc.
    Inventors: James W. Knutti, Henry V. Allen, Kurt E. Petersen, Carl R. Kowalski
  • Patent number: 4859281
    Abstract: A copper etching composition and an improved method for copper etching utilizing the composition, the composition includes an aqueous solution of a strong acid, a stabilized hydrogen peroxide, and an accelerator that can include both tolyltriazole and either an aliphatic water soluble monoalcohol or a glycol monoether in the etchant solution to provide a faster etching rate.
    Type: Grant
    Filed: June 4, 1987
    Date of Patent: August 22, 1989
    Assignee: Pennwalt Corporation
    Inventor: Kurt Goltz
  • Patent number: 4859276
    Abstract: In a fuel rod tube manufacturing system, a tube processing subsystem and method include the steps of arraying, flush etching and rinsing, drying, inspecting and plugging groups of the tubes. At an inlet stage, the tubes are dispensed one at a time from a bundle thereof numbering in the hundreds of such tubes. The dispensed tubes are arrayed in a side-by-side relationship at an assembling stage into a group thereof numbering in the fives of such tubes. Successive groups of the arrayed tubes are delivered to succeeding etch and rinse, drier, and inspection stations where the groups of arrayed tubes are respectively flush etched and rinsed, dried, and inspected. After inspection, accepted tubes are separated from rejected ones and conveyed one at a time to a plug stage where the tubes are plugged to seal the interiors thereof.
    Type: Grant
    Filed: August 3, 1987
    Date of Patent: August 22, 1989
    Assignee: Westinghouse Electric Corp.
    Inventors: Clarence D. John, Jr., Francis C. McNerney, Thomas M. Sanders
  • Patent number: 4851078
    Abstract: A method of forming a high quality dielectrically isolated silicon on insulator semiconductor device using a double wafer bonding process. As a result of the double wafer bonding process, the invention significantly reduces the device limitations presently known with dielectric isolation and silicon on insulator structures. The present invention specifically eliminates the need for grinding or polishing the final surface which the devices will be implemented in, thereby eliminating the adverse effects which these mechanical processes impute onto these surfaces. Additionally, the present invention eliminates the need for a thick polycrystalline deposition for the production of the dielectric isolation, thereby eliminating the adverse effects of single crystal bulk defects and the loss of tolerance control due to warpage which would otherwise occur in a dielectric isolated process.
    Type: Grant
    Filed: June 29, 1987
    Date of Patent: July 25, 1989
    Assignee: Harris Corporation
    Inventors: John P. Short, George V. Rouse
  • Patent number: 4849071
    Abstract: The invention provides a method of forming a sealed diaphragm (3) on a substrate (1) which comprises providing on the substrate (1) a sacrificial layer (2) , providing a diaphragm layer (3) over the sacrificial layer (2), providing at least one aperture (5) in the diaphragm layer (3) which is spaced from the periphery of the diaphragm layer (3), at least partially removing the sacrificial layer (2) from between the substrate (1) and the diaphragm layer (3) by way of the at least one aperture (5) and closing the at least one aperture (5).
    Type: Grant
    Filed: December 9, 1987
    Date of Patent: July 18, 1989
    Assignee: Spectrol Reliance Limited
    Inventors: Alan G. R. Evans, Mohammed M. Farooqui
  • Patent number: 4849050
    Abstract: The invention provides a method of producing on a substrate a diaphragm which is electrically isolated from the substrate. The method comprises obtaining a substrate (2) having a diaphragm(1) thereon which comprises a flexible central portion (1a) and a shouldered peripheral portion which supports the central portion (1a) above the substrate (2), applying a mask (6) over at least a part of the central portion (1a) and converting the unmasked portion (1b) of the diaphragm to a dielectric so as to electrically isolate the masked central portion (1a) of the diaphragm from the substrate (2).
    Type: Grant
    Filed: December 9, 1987
    Date of Patent: July 18, 1989
    Assignee: Spectrol Reliance Limited
    Inventors: Alan G. R. Evans, Mohammed M. Farooqui
  • Patent number: 4849069
    Abstract: A method of producing filaments of sub-micron cross-sectional dimensions including the steps of obtaining a substrate having a base and a delineating layer on the base and a step in a surface of the delineating layer, providing a layer of a material from which the filament is to be formed on the surface which replicates the step in the surface, anisotropically etching the layer of filament material in the direction of the surface so as to leave a filament of the material adjacent the step, and removing the delineating layer to wholly or partially separate the filament from the substrate.
    Type: Grant
    Filed: December 9, 1987
    Date of Patent: July 18, 1989
    Assignee: Spectrol Reliance Limited
    Inventors: Alan G. R. Evans, Mohammed M. Farooqui
  • Patent number: 4836886
    Abstract: A plasma comprised of trifluorochloromethane and an oxidant etches non-insulating materials such as tungsten at very high etch rates when the oxidant comprises at least 50% of the plasma by volume.
    Type: Grant
    Filed: November 23, 1987
    Date of Patent: June 6, 1989
    Assignee: International Business Machines Corporation
    Inventor: Timothy H. Daubenspeck