Abstract: MLVM is a DRAM product that has the flexibility for certain performance characteristics to change based on programming characteristics made when writing the data and the ability to write multiple bits of data at the same time. At the simplest level, this means that depending on the type of operation(s) being executed, certain more favorable characteristics can be programmed into the DRAM to get benefits over the current state of the art. The most likely benefits would be in power utilization and heat.

Abstract: Hierarchical resource tree memory operations can include receiving, at a memory scheduler, an indication of a proposed modification to a value of a memory parameter of an object represented by a node of a hierarchical resource tree, wherein the proposed modification is made by a modifying entity, locking the node of the hierarchical resource tree by the memory scheduler, performing the proposed modification by the memory scheduler, wherein performing the proposed modification includes creating a working value of the memory parameter according to the proposed modification, determining whether the proposed modification violates a structural consistency of the hierarchical resource tree based on the working value, and replacing the value of the memory parameter with the working value of the memory parameter in response to determining that the proposed modification does not violate a structural consistency of the hierarchical resource tree based on the working value, and unlocking the node of the hierarchical res

Abstract: Disclosed herein are techniques for managing the performance of a storage system. A subset of a plurality of storage units is associated with a rule that specifies a number of input and output transactions and a number of bits per time unit. The associations are adjusted in accordance with a performance policy and changes in the subset of the plurality of storage units.

Abstract: In addition to caching I/O operations at a host, at least some data management can migrate to the host. With host side caching, data sharing or deduplication can be implemented with the cached writes before those writes are supplied to front end storage elements. When a host cache flush to distributed storage trigger is detected, the host deduplicates the cached writes. The host aggregates data based on the deduplication into a “change set file” (i.e., a file that includes the aggregation of unique data from the cached writes). The host supplies the change set file to the distributed storage system. The host then sends commands to the distributed storage system. Each of the commands identifies a part of the change set file to be used for a target of the cached writes.

Abstract: Methods for use in abstracting the addressing namespace of a dispersed storage network (DSN). In various examples, controllers are arranged hierarchically in a plurality of levels, where each level includes one or more groups of peer controllers, and each group of controllers shares a common parent controller at a next higher level. An addressing scheme is established for each group of controllers and the common parent controller. When a controller receives a request from a parent controller, and a higher level address of the request indicates that the request is to be serviced by a device at a lower level, the controller translates the higher level address to a lower level address, identifies a child controller associated with the lower level address, and generates a translated request including the lower level address and an identifier of the child controller. Responses are likewise translated and forwarded to the next higher level.

Abstract: An indication to retire a computer readable storage medium from the site cache is received. A plurality of data objects stored on the computer readable storage medium are replicated to at least one target computer readable storage medium in the site cache. The computer readable storage medium is removed from the site cache.

Abstract: A method includes obtaining an encoding matrix that includes a first matrix section and a second matrix section. The first matrix section includes “D?1” rows of a unity matrix, (“D” is a decode threshold number), and the second matrix section includes “T?D+1” rows of encoding terms (“T” is a pillar width number). The method further includes dividing a data element into “Z” data element blocks (“Z” is a function of “D” and a total number of data blocks of a data segment). The method further includes placing “Z” data element blocks in a first row of a data matrix that corresponds to a missing row of the unity matrix. The method further includes dividing “D?1” random elements into random element blocks and placing them in other rows of the data matrix. The method further includes matrix multiplying the encoding matrix with the data matrix to produce encoded data slices.

Abstract: A method of managing a database system using a swarm database system that communicates a request to read data to at least a subset of nodes. Checking the identifier by each respective node in the subset of nodes to determine if the requested read data is stored in the node. Providing the read data to the first node if the respective node in the subset includes read data.

Abstract: A data storage system having a hashing engine for facilitating data deduplication. A device is provided that includes: a storage media; and a controller, wherein the controller includes a hashing engine for implementing a data deduplication process on data stored in the storage medium, wherein the hashing engine: inputs parameters from a host that specifies a sliding widow size and a boundary condition; implements a rolling hash function; and outputs a data chunk boundary.

Abstract: A distributed computation system comprising computation units and memory shared between computation units, comprises a hardware module for detecting conflicts of access of computation units to shared memory; each hardware module for detecting conflicts configured to: store a probabilistic data structure, indicative of the addresses of shared memory involved in the current transactions; receive at least one message indicative of request for access, by one computation unit to an address of shared memory; determine, from a probabilistic data structure, whether the address is already involved in a current transaction, and transmit a message indicating presence or absence of access conflicts; receive a message indicative or confirmative of reservation or releasing of an address of shared memory, and update the probabilistic data structure for the reserved addresses and the released addresses to be considered, as being/not being involved in a current transaction. A method for using the system is provided.

Abstract: A system and method for safe physical function passthrough using virtual machine functions includes sending, by a guest on a virtual machine, an access request for a host device to a virtual machine function on the virtual machine. The method also includes determining, by the virtual machine function, whether the access request is valid responsive to receiving the access request. Responsive to determining that the access request is valid, the virtual machine function sends the access request to a virtual device on the virtual machine. The method further includes preventing, by a hypervisor executing on one or more processors, the guest from accessing the virtual device when not executing the virtual machine function.

Abstract: A virtual memory including virtual addresses may be generated. A first virtual address of the virtual memory may be mapped to a first physical address of a one-time programmable (OTP) memory of a device. Furthermore, a second virtual address of the virtual memory may be mapped to a second physical address of a static memory of the device. The virtual memory that is mapped to the OTP memory and the static memory may be provided for accessing of the data of the OTP memory of the device.

Abstract: Apparatuses, systems, and methods for deduplicating data using small data segments are described. Data strings are divided into a plurality of data segments having an original sequence order, and the data segments are rearranged according to an ordered sequence. The original sequence order of each data string is written to memory with a pointer to the ordered sequence of the data segments.

Abstract: A technique manages compression based on host data initially residing on a source storage array. The technique involves providing, based on source segments of the host data while the host data initially resides on the source storage array, compressibility labels (or tags) that label the source segments of the host data. Each compressibility label indicates a projected compression level for a respective source segment of the host data. The technique further involves generating a compression profile based on the compressibility labels that label the source segments of the host data. The technique further involves providing, based on the compression profile, a compression tier configuration that defines a prearrangement of compression tiers on a target storage array that receives the host data from the source storage array, the prearrangement of compression tiers providing storage units of allocation having different predefined sizes.

Abstract: A memory management method, a memory control circuit unit and a memory storage device are provided. In an exemplary embodiment, the memory management method includes: receiving a first write command and first write data and obtaining a first number; programming the first write data and moving first storage data stored in a plurality of first physical programming units, where a total number of the first physical programming units conforms to the first number; receiving a second write command and second write data and obtaining a second number; programming the second write data and moving second storage data stored in a plurality of second physical programming units, where a total number of the second physical programming units conforms to the second number; and erasing at least one physical erasing unit. Accordingly, waste of system resource in the data merging procedure may be reduced.

Abstract: A memory control device includes a host interface, a memory interface, and a controller configured to control the memory interface to output data to a non-volatile semiconductor memory for writing therein. The data include first data that the host interface received from a host, second data read out from the non-volatile semiconductor memory for memory refresh, and third data read out form the non-volatile semiconductor memory for garbage collection. When the memory refresh is not carried out, the controller adjusts a ratio of the first data with respect to the third data to be a first value. When the memory refresh is carried out, the controller calculates a second value based on the first value, and adjusts a ratio of the first data with respect to a total of the second data and the third data to be the second value.

Abstract: Various embodiments of the present disclosure provide a method of operating a non-volatile memory and an electronic device adapted to the method. When the possibility that power will be cut off in the electronic device is low or almost zero, the provision operation (e.g., an LSB backup) is interrupted which is capable of preventing data from being erased against a situation where the power is cut off. The method of managing a storage device includes: transferring an initialization command to a non-volatile memory functionally connected to a storage device; transferring a command for interrupting or executing an LSB backup to the storage device controller included in the non-volatile memory; and interrupting or executing, by the storage device controller, the LSB backup according to the LSB backup interrupt or execute command. Other modifications are provided.

Abstract: A second virtual volume having a plurality of second virtual areas is a clone of a first virtual volume having a plurality of first virtual areas. A first real area is allocated from a pool of real areas and based on storage devices to the first virtual volume. A storage controller allocates a second real area to the second virtual area before a write occurs in the second virtual area corresponding to the first virtual area to which the first real area is allocated. A physical area is allocated to a logical area corresponding to the first real area in each storage device, and data based on user data stored in the first real area is stored in the physical area. Each storage device allocates the physical area allocated to the logical area corresponding to the first real area to a logical area corresponding to the second real area.

Abstract: A storage controller for cache management that includes a cache memory and a cache management module. The cache management module to, on receipt of region specification requests from hosts, extract from the region specification requests cache rules for management of regions of data storage of a storage array, and on receipt of data operation requests from hosts, process the data operation requests based on the extracted cache rules.

Abstract: A method for detecting problem cells of a SATA SSD and a SATA SSD having self-detecting function looking for problem cells are disclosed. The method includes the steps of: providing a detecting program used to detect aged and died cells in a SATA SSD; writing the detecting program to a MCU (Micro Control Unit) in the SATA SSD; pulling high electric potential of a communicating pin of a SATA connector of the SATA SSD to initiate the detecting program; collecting location data of aged and died cells in the SATA SSD by the detecting program; and storing the location data in a storage area in the SSD. The present invention utilizes the DAS/DSS pin as a channel to initiate detecting program. It has advantages of using current interface of SSD, no effort on taking apart hardware and automatically running the detecting program without human control.