Patents Examined by Ann Hoang
  • Patent number: 8164867
    Abstract: A method for protection of an energy storage source (2), in particular a battery of a motor vehicle, against possible overloading caused by prolonged application of an electric voltage to the energy storage source, this voltage being generated at least partially by a rotary electric machine (1) such as an alternator or an alternator-starter, the method comprising the following steps: permitting measurement of a charge level of the energy storage source, this charge level being represented for example by a voltage measured at the terminals of the energy storage source or a PWM signal, while the rotary electric machine is functioning in a predetermined functioning mode, and electric excitation is being applied to it; comparing a value (SENSE) of this measurement with a reference value (Max_SP); if the value measured for the energy storage source is greater than the reference value, interrupting the excitation applied to the rotary electric machine.
    Type: Grant
    Filed: July 17, 2009
    Date of Patent: April 24, 2012
    Assignee: Valeo Equipements Electriques Moteur
    Inventors: Pierre Tisserand, Pierre Chassard, Vincent Gendron
  • Patent number: 8159802
    Abstract: This invention relates to a power supply apparatus and method for converting three-phase delta AC power to DC power using EMI filters and PFC circuits to maintain balanced AC current loading and reduce radiated and conducted emissions. Overcurrent and temperature protection are also provided in conjunction with a novel optocoupler latch circuit for improving maintenance of the power supply.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: April 17, 2012
    Assignee: Lockheed Martin Corporation
    Inventors: Carl T. Tinsley, III, Elton Pepa
  • Patent number: 8149562
    Abstract: A system for decharging a wafer or substrate disposed on an electrostatic chuck, includes a capacitance detector for measuring a capacitance between the electrostatic chuck and the wafer or substrate, and a decharging voltage calculator for calculating a decharging voltage based at least in part on the capacitance measured by the capacitance detector. The decharging voltage calculated by the decharging voltage calculator of the system is applied to the electrostatic chuck after dechucking to substantially neutralize electrostatic charges on the wafer or substrate.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: April 3, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Hsiang Hsu, Jeng-Yann Tsay
  • Patent number: 8144444
    Abstract: A protection circuit for protecting an electronic circuit against EMC disturbances and/or negative transient overvoltage pulses comprises a switch in series between a power supply and the electronic circuit to be protected; a comparator for comparing a first operating parameter with a second operating parameter and producing a comparison signal, the comparison signal being used as a control signal for controlling opening and closing of the switch; and a delay circuit adapted for delaying closing of the switch. A corresponding method is also provided.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: March 27, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Pavel Horsky, Petr Kamenicky
  • Patent number: 8120882
    Abstract: The present invention is directed to an electrical wiring device that includes an illumination assembly coupled to at least one detection circuit and disposed in the housing portion. The illumination assembly includes at least one light emitting element, an illumination circuit, and at least one lens disposed in at least one lens cover opening in optical communication with at least one light emitting element. The illumination circuit is configured to selectively drive the at least one light emitting element between a deenergized state and a light emitting state in response to an ambient light condition, a miswire condition, an end-of-life condition, a reset state or a trip state. The at least one lens has a surface area such that light emitted by the at least one light emitting element is directed into a spatial volume proximate the electrical wiring device.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: February 21, 2012
    Assignee: Pass & Seymour, Inc.
    Inventors: Dejan Radosavljevic, Kenneth D. Vought, Gerald R. Savicki, Jr., Richard Weeks, Gary O. Wilson
  • Patent number: 8116052
    Abstract: A protection ability of a power supply control circuit is improved so as to protect an output transistor against a back electromotive voltage from a load, a dump surge voltage, and a positive spike surge voltage which has a smaller energy but is higher than the dump surge voltage. The power supply control circuit includes: an output MOS transistor (power semiconductor device) connected between a first power supply terminal and an output terminal; a load connected to the output terminal; a first dynamic clamping circuit for controlling a voltage difference between a first power supply line and the output terminal; and a first switch connected between the first dynamic clamping circuit and the output MOS transistor, in which a conductive state is determined according to a result of comparison between a reference voltage and a voltage at the output terminal.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: February 14, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Akihiro Nakahara
  • Patent number: 8116056
    Abstract: A circuit breaker capable of microcontroller-based fault detection having a backup circuit for causing the circuit breaker to trip in response to a microcontroller fault, including a timing circuit powered by a power supply and a microcontroller. The timing circuit is electrically coupled to an SCR that causes the circuit breaker to trip. The timing circuit includes a BJT coupled to the gate of the SCR. The microcontroller has a first output coupled to the timing circuit and a second output coupled to the SCR. The first output is coupled to a node between a resistor and a grounded capacitor in the timing circuit, and the node is coupled to a gate of the SCR and to a base of the transistor. A voltage develops at the node sufficient to cause the gate of the SCR to turn on unless the microcontroller pulls the first high-impedance output to a logic low state.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: February 14, 2012
    Assignee: Schneider Electric USA, Inc.
    Inventors: Randy Gass, Issa Drame
  • Patent number: 8111496
    Abstract: An earthing arrangement for a DC electrical system (10), the electrical system (10) comprises a plurality of earthing points (24A, 24B, 24C) and each earthing point (24A, 24B, 24C) is directly and permanently connected to earth (26) by a high impedance connection (28A, 28B, 28C). Each earthing point (24A, 24B, 24C) is selectively connectable to earth (26) in electrical parallel with the high impedance connection (28A, 28B, 28C) by a solid connection (30A, 30B, 30C) and a switch (32A, 32B, 32C). In first mode of operation the switch (32A) between the earthing point (24A) and the earth (26) of only one of the plurality of earthing points (24A, 24B, 24C) is closed.
    Type: Grant
    Filed: February 11, 2009
    Date of Patent: February 7, 2012
    Assignee: Rolls-Royce PLC
    Inventors: Stephen A Long, David R Trainer, Lihua Hu, Huw L Edwards
  • Patent number: 8107204
    Abstract: An apparatus includes a first optocoupler and a control module. The first optocoupler selectively allows a first current to flow from a first one of a first pair of N power supply lines to a second one of the first pair. N is an integer greater than two. The N power supply lines each provide a phase signal. The control module controls the first optocoupler and determines an occurrence of a phase failure of the phase signals based on a first signal, which is based on the first current.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: January 31, 2012
    Assignee: Emerson Climate Technologies, Inc.
    Inventors: Yunfeng Wu, Yongbing Wang
  • Patent number: 8085518
    Abstract: An electronic circuit and method for producing the electronic circuit, where the electronic circuit includes a functional circuit including at least one multigate functional field effect transistor and an ESD protection circuit including at least one multigate ESD protection field effect transistor. The multigate protection field effect transistor is a transistor that is partially depleted of electrical charge carriers, and the trigger voltage of the multigate protection field effect transistor is less than the trigger voltage of the multigate functional field effect transistor.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: December 27, 2011
    Assignee: Infineon Technologies AG
    Inventors: Nirmal Chaudhary, Christian Russ, Thomas Schulz
  • Patent number: 8085515
    Abstract: An electric power source for a motor vehicle is equipped with a welded state discriminator, and while a positive-side contactor and negative-side contactor are controlled to be switched off, the welded state discriminator detects a voltage of a positive-side contactor or negative-side contactor on its loading side with respect to a connecting point of a battery unit on a positive side and a battery unit on a negative side. Accordingly, when in a plus voltage where the detected voltage thus obtained is larger than a predetermined voltage, the positive-side contactor is judged to be in a welded state, and when in a minus voltage where the detected voltage is larger than the predetermined voltage, the negative-side contactor is judged to be in a welded state.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: December 27, 2011
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masaki Yugou, Kimihiko Furukawa, Takeshi Osawa
  • Patent number: 8064182
    Abstract: An overvoltage protection plug is disclosed. The plug includes a housing forming a body, a handle, and an insertion portion. The plug further includes a circuit board mounted at least partially within the body. A portion of the circuit board protrudes from the housing at the insertion portion and includes metallic connection pads configured for interconnection to a connection block. The plug also includes a gas tube mounted to the circuit board and residing within the housing, the gas tube electrically connected to the metallic connection pads by a plurality of circuit traces on the circuit board. The handle of the housing can extend rearward from a top edge of the housing. The body can include an interior cavity having generally parallel side walls including a thinned region surrounding the gas tube. A circuit connection block assembly is also disclosed.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: November 22, 2011
    Assignee: ADC Telecommunications, Inc.
    Inventors: Scott K. Baker, Cyle Petersen
  • Patent number: 8054604
    Abstract: This disclosure provides a method and apparatus for reducing an inrush current inflowing from an external power source during an initial transient state. The method may include generating a first signal based on a level of internal voltage. The first signal may linearly increase or decrease, wherein the slope of the first signal may be fixed. The method may further include comparing the first signal with the reference voltage, and controlling an overcurrent prevention function based on the comparison results. An inrush current reducing device may include a reference voltage generating unit configured to compare a first signal and the reference voltage to control an overcurrent sensing gain, a gain unit configured to compare a first signal and the reference voltage to control an overcurrent sensing gain, and an overcurrent prevention signal generating unit configured to control an overcurrent prevention function based on the comparison results.
    Type: Grant
    Filed: July 28, 2008
    Date of Patent: November 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ji-Yeoul Ryoo
  • Patent number: 8045306
    Abstract: An electrical-overstress (EOS) protection circuit for an electronic device includes series-connected resistors, a mode-control switch, and a bias circuit. The series-connected resistors are electrically coupled between an input and an output, and the mode-control switch is electrically coupled between the output and a ground. The bias circuit is electrically coupled to the input for generating a mode-control signal to control the mode-control switch. The bias circuit generates the mode-control signal in a way such that the mode-control switch is open in a normal mode and closed in an EOS mode.
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: October 25, 2011
    Assignee: Himax Technologies Limited
    Inventors: Chung-Ming Huang, Tieh-Yen Chang, Hung-Sui Lin
  • Patent number: 8027136
    Abstract: A surge suppression device may include a housing having a cavity, a center conductor positioned within the cavity, a spiral inductor having an inner curve coupled to the center conductor and an outer curve, a coil capture device connected to the outer curve of the spiral inductor, and a ring assembly having a first ring connected to the coil capture device, a second ring connected to the housing, and a voltage limiting device positioned between the first ring and the second ring.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: September 27, 2011
    Assignee: Transtector Systems, Inc.
    Inventors: Chris Penwell, Jonathan L. Jones, Bogdan B. Klobassa
  • Patent number: 7375935
    Abstract: A ground fault circuit interrupter device having a feedthrough capacitor for substantially reducing interference from radio frequency signals such as those emitted from cell phones and 2-way radios. The ground fault circuit interrupter device includes a printed circuit board having a system ground terminal and a detection terminal for receiving a fault detection signal. A chip is provided having a ground pin connected to the system ground terminal and an input pin for receiving the fault detection signal. The feedthrough capacitor has a through conductor connected between the input pin and the detection terminal and a capacitor coupled between the through conductor and the system ground terminal.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: May 20, 2008
    Assignee: Leviton Manufacturing Co., Inc.
    Inventors: David Y. Chan, Eugene Shafir, John Libretto
  • Patent number: 7315437
    Abstract: A self test (ST) ground fault circuit interrupter (GFCI) provides a half wave rectifier for powering circuitry for determining and annunciating end of life (EOL) of the GFCI regardless of a shorted diode bridge or opening of a printed circuit board (PCB) trace. A fuse resistor is provided to open before an open PCB trace can occur. A microprocessor-controlled heat-conducting circuit is provided adjacent to a thermal fuse to controllably open the thermal fuse and remove power from face receptacle contacts and load terminals when EOL occurs.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: January 1, 2008
    Assignee: Hubbell Incorporated
    Inventors: Nelson Bonilla, John R. Baldwin, Robert Fanzutti, Daming Yu, Thomas Batko, Robert Youle
  • Patent number: 7256975
    Abstract: An electrostatic discharge (ESD) protection circuit and method thereof are presented. In some embodiments, a high voltage tolerant input/output circuit comprises an ESD detection circuit, a first first-type transistor, a first second-type transistor, and a second second-type transistor. The first first-type transistor and the first second-type transistor are coupled to a pad. The ESD detection circuit determines whether ESD occurs at the pad and, if so, couples the gates of the first and second second-type transistors to the second power rail.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: August 14, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Hsun Wu, Jian-Hsing Lee, Shui-Hung Chen
  • Patent number: 7177124
    Abstract: The present invention is a brushless DC fan motor driving circuit, comprising a control unit, a Hall element, a temperature sensor with negative temperature coefficient, and a motor, as tied in with a plurality of resistors, capacitors, diodes and transistors. Accordingly, through sensing environment temperature by the temperature sensor and feeding back the temperature sensed to the motor to control the resolving speed, the ambient temperature of the system is maintained.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: February 13, 2007
    Assignee: Datech Technology Co., Ltd.
    Inventor: Jian-Xuan Lee
  • Patent number: RE42866
    Abstract: A ground fault circuit interrupter device having a feedthrough capacitor for substantially reducing interference from radio frequency signals such as those emitted from cell phones and 2-way radios. The ground fault circuit interrupter device includes a printed circuit board having a system ground terminal and a detection terminal for receiving a fault detection signal. A chip is provided having a ground pin connected to the system ground terminal and an input pin for receiving the fault detection signal. The feedthrough capacitor has a through conductor connected between the input pin and the detection terminal and a capacitor coupled between the through conductor and the system ground terminal.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: October 25, 2011
    Assignee: Leviton Manufacturing Co., Inc.
    Inventors: David Y. Chan, Eugene Shafir, John Libretto