Abstract: A hardware Java™ accelerator is comprised of a decode stage and a microcode stage. Separating into the decode and microcode stage allows the decode stage to implement instruction level parallelism while the microcode stage allows the conversion of a single Java™ bytecode into multiple native instructions. A reissue buffer is provided which stores the converted instructions and reissues them when the system returns from an interrupt. In this manner, the hardware accelerator need not be flushed upon an interrupt A native PC monitor is also used. While the native PC is within a specific range, the hardware accelerator is enabled to convert the Java™ bytecodes into native instructions. When the native PC is outside the range, the hardware accelerator is disabled and the CPU operates on native instructions obtained from the memory.

Abstract: Information is acquired indicative of a location scenario where a plurality of software components are to be installed. The location scenario is employed to configure the software components, such as by setting at least some of the components as default components to facilitate selection and/or configuration of the software components during a setup process. The location scenario is further employed to configure selected components to have functionality based on the location scenario.

Abstract: A method of and system for managing installs to a set of one or more field machines in a distributed network environment. In an illustrative embodiment, the system includes at least one change coordinator server that includes a database with data identifying a current state of each field machine, and a change controller routine for initiating a given control action to initiate an update to the current state on a given field machine. In particular, the change controller routine may include a scheduling algorithm that evaluates data from the database and identifies a set of field machines against which the given control action may be safely executed at a given time. At least one install server is responsive to the change controller routine initiating the given control action for invoking the update to the current state on the given field machine.

Abstract: An apparatus and a method for upgrading a program that controls a microprocessor. The program upgrading method includes: installing a Personal Computer Memory Card International Association (PCMCIA) interface device in the system; recording the upgrading program in a PCMCIA card; downloading the upgrading program from the PCMCIA card through the PCMCIA interface device installed in the system under the control of the program stored in the memory; and upgrading the program stored in the memory with the downloaded program under the control of the program stored in the memory. The program upgrading method can perform program upgrading through a PCMCIA interface easily.

Abstract: A project analysis system and method is described to allow for automated generation of scalable bootable applications and downloadable applications, preferably in connection with an integrated development environment (IDE). The project analysis system and method includes facilities for automatically identifying and including software components in application development projects based on symbol dependencies and component dependencies. The project analysis system and method also includes facilities for automatically identifying and removing software components in application development projects where no symbol dependencies or component dependencies exist, thereby removing unused code. A graphical user interface is provided for user display and selection of includable and excludable components.

Abstract: Preparing one or more secure media effect programs, generating a binary image of the programs and associated data, loading the binary image into memory of a secondary processor, and executing the programs of the binary image with the secondary processor, substantially independent from a primary processor. A binary image builder automatically maps one or more programs and data to secondary processor memory by changing encoded binary instructions of each program before execution by the secondary processor. The changes identify locations at which the programs and data will be stored in secondary processor memory, identify locations of parameters that can be updated in real time, and enable execution control to return to a secondary processor execution kernel. The secondary processor execution kernel polls flags in a main memory to determine whether to download new or updated state data and/or program code from main memory to the secondary processor memory.

Abstract: The present invention is a new method and apparatus to perform combined compilation and verification of platform independent bytecode instruction listings into optimized machine code. More specifically, the present invention creates a new method and apparatus in which bytecode compilation instructions are combined with bytecode verification instructions, producing optimized machine code on the target system in fewer programming steps than traditionally known. The new method, by combining the steps required for traditional bytecode verification and compilation, increases speed and applicability of platform independent bytecode instructions.

Abstract: A system where a production microcontroller is partially copied in a FPGA of an ICE to form a virtual microcontroller. The virtual microcontroller and the production microcontroller simultaneously and independently run a microcontroller code to be debugged at a high frequency. The debugging logic can substantially reside in the ICE and the ICE can perform all debugging functions. The debug interface, residing in the production microcontroller, can enable the production microcontroller to communicate with the ICE in low frequencies. The production microcontroller may request the ICE to lower its frequency when the production microcontroller encounters a halt due to outside events. A user may command resumption of the operation of both the production microcontroller and the virtual microcontroller when debugging of the codes is completed.

Abstract: Method and apparatus for inserting prefetch instructions in an executable computer program. Profile data are generated for executed load instructions and store instructions. The profile data include instruction addresses, target addresses, data loaded and stored, and execution counts. From the profile data, recurring patterns of instructions resulting in cache-miss conditions are identified. Prefetch instructions are inserted prior to the instructions that result in cache-miss conditions for patterns of instructions recurring more than a selected frequency.

Abstract: The invention relates to a process for generating information models and also to an information-processing system and a software product for implementing the process. A first, master information model is generated in coded form in a first description language and is stored in a database. One or more second, product-specific information models are generated from the master information model by means of first selection parameters and, in each case, stored in a database.

Abstract: A system and method are provided for managing workflow, using a plurality of scripts, in a workflow system. The method comprises: selecting an MFP device at which the document is to be processed; supplying a plurality of folders with a corresponding plurality of scripts; selecting a first number of folders; processing a document using processes such as faxing, scanning, copying, and printing; adding the processed document to the selected folders; and, in response to adding the processed document to a first number of selected folders, generating the document in a first number of scripts.

Abstract: Implementing a business process management system across an entire enterprise. An exemplary computer-based system for implementing business processes can access data existing on one or more of the computer platforms of an enterprise to implement workflows by a workflow engine. A business process can be broken into business rules that define the process. These business rules can then be categorized into work element categories and translated into workflow elements. Data for supporting the workflow can be identified, including sources of that data within the enterprise. Delegates can be designed to implement each individual workflow element. For example, a delegate can be designed to support the retrieval of data from a computer platform other than the platform hosting a workflow engine. These delegates, which typically comprise XML documents, can be assembled and operated as workflow elements to form the workflow processed by the workflow engine.

Abstract: A method and system for optimizing variable locations within disparate storage elements in a target processing environment according to a least cost analysis based upon the number of times a variable is accessed by one or more program loops forming a program.

Abstract: A user creates a software tool using a simple Java text markup language (JTML) interface. The user provides the JTML server with JTML pseudo code (code objects) which the JTML server recognizes, and performs routine programming tasks associated with the JTML code objects. The JTML server builds the executable JTML tool by invoking Java classes, associated with the code object, which are necessary to create the tool. The Java classes also create the user interface necessary for the user to enter data and commands for executing the JTML tool once the tool has been created. The JTML server acts as a secure port to the host by insulating the host contact or connection from a client. No code or command passes directly between the host and the client, instead the JTML server mediates all transactions between the two. Additional security is provided by the JTML server logging each user's access and each user's transaction.

Abstract: One embodiment of the present invention provides a system that gathers code usage information to facilitate removing compiled code that has not been recently used. This method operates in a mixed-mode system that supports execution of both compiled code and interpreter code. During operation, the system gathers usage information for compiled methods within an application while the application is executing. Next, the system identifies compiled methods to be removed based on this usage information, and removes identified compiled methods so that interpreter code is executed for the compiled methods instead of compiled code. In this way, the system frees up the memory space used to store the compiled methods.

Abstract: A method for managing the execution of an optimized code. The method comprises of the steps of: (1) receiving at least a description of flow graphs of the optimized code and of a source code from which the optimized code was originated; receiving additional information that maps said flow graphs; and (2) managing the execution of the optimized code according to a selected mode and to at least one matched breakpoints being set along at least one path of the optimized flow graph.

Abstract: The present invention relates to a mechanism for copying selected routines from shared libraries into application programs thereby generating optimized application programs for more rapid execution of the various applications within a computer system. Since optimized programs occupy space on disk and in RAM, programs are preferably selected for optimization based on their frequency of execution and the frequency with which calls are made to the shared libraries. Profile information may be used to identify the execution efficiency of the various application programs and thereby identify the best candidates for optimization. Further, profile information may be employed to copy individual routines contained within the libraries rather than having to copy an entire library where only one routine within the library was of interest.

Abstract: A system and method are provided for providing an activity framework. First, a plurality of sub-activities are created which each include sub-activity logic adapted to generate an output based on an input received from a user upon execution. Second, a plurality of activities are defined which each execute the sub-activities in a unique manner upon being selected for accomplishing a goal associated with the activity. Selection of one of the activities is allowed by receiving user indicia. An interface is depicted for allowing receipt of the input and display of the output during execution of the sub-activities associated with the selected activity.

Abstract: A method and system of testing and verifying computer code in a multi-threaded environment. The method includes testing a first piece of computer code that is an implementation of a specification against a second piece of computer code that is a different implementation of the specification. Corresponding synchronization points in the first and second pieces of code are defined and the first piece of code is executed to the first synchronization point of the first piece of code. A state message is generated and sent to the second piece of code. The second piece of code is executed to the first synchronization point of the second piece of code and then a state after message is generated and compared to the state before message. The synchronization points are generally selected from a group including conditional transfers of control, Method calls, Method returns, and backward transfers of control.

Abstract: An object oriented mechanism and method allow allocating Java array objects of unknown size at compile time to a method's invocation stack if the array's size is less than a predetermined threshold value. If the array object could typically be allocated to the invocation stack if it were of a known size at compile time, run-time code is generated that examines the actual size of the array object at run-time and that allocates the array object to the invocation stack if the size is less than a predetermined threshold value. In this manner Java array objects that have an unknown size at compile time may still be allocated to an invocation stack at run-time if the size of the object is sufficiently small.