Patents Examined by Azm A Parvez
  • Patent number: 11735453
    Abstract: A system for transferring a substrate includes a substrate transporter at which is captured a first image with which a position of the substrate at the substrate transporter is determined; a tray at which is captured a second image with which a position of each of a plurality of substrates relative to the tray is determined; a substrate mover with which the substrate is movable in a revolving manner between the substrate transporter and the tray, the substrate mover including: an arm portion movable in the revolving manner between the substrate transporter and the tray, and a substrate securing portion movable together with the arm portion; and an imager with which the first image and the second image are captured, the imager connected to the arm portion and movable in the revolving manner between the substrate transporter and the tray together with the arm portion.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: August 22, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Heungyeol Na, Mingyoun Kang, Dongwon Seol
  • Patent number: 11721662
    Abstract: A method of aligning two wafers during a bonding process includes aligning a first wafer having a plurality of alignment markings with a second wafer having a plurality of alignment markings. The method further includes placing a plurality of flags between the first wafer and the second wafer. The method further includes detecting movement of the plurality of flags with respect to the first wafer and the second wafer using at least one sensor. The method further includes determining whether the wafers remain aligned within an alignment tolerance based on the detected movement of the plurality of flags relative to the first wafer and the second wafer.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: August 8, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yun-Tai Shih, Ching-Hou Su, Chyi-Tsong Ni, I-Shi Wang, Jeng-Hao Lin, Kuan-Ming Pan, Jui-Mu Cho, Wun-Kai Tsai
  • Patent number: 11715895
    Abstract: A method for manufacturing electrical connector assemblies is disclosed. The electrical connector assemblies include an electrical interposer and a first electrical receptacle. The method includes positioning a fixture coupled to or including an array of the first electrical receptacles such that each of the first electrical receptacles aligns with one of the electrical interposers on an assembly with an array of the electrical interposers. The method further includes reflowing solder to mechanically and electrically couple the array of the first electrical receptacles to the array of the electrical interposers.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: August 1, 2023
    Assignee: Seagate Technology LLC
    Inventors: Michael J. Peterson, Michael R. Fabry, Sean M. Horgan, John F. Fletcher, William B. Green
  • Patent number: 11711898
    Abstract: There is provided a method which includes placing a component on a substrate and extending an alignment member through an opening in the substrate. Once the alignment member is extended through the opening, the component is moved to abut against the alignment member to align the component relative to the substrate. After the component is aligned relative to the substrate, the component is secured to the substrate and the alignment member is retracted through the opening.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: July 25, 2023
    Assignee: GOOGLE LLC
    Inventor: Douglas Raymond Dykaar
  • Patent number: 11699587
    Abstract: The present invention relates to a method for manufacturing a diamond substrate, and more particularly, to a method of growing diamond after forming a structure of an air gap having a crystal correlation with a lower substrate by heat treatment of a photoresist pattern and an air gap forming film material on a substrate such as sapphire (Al2O3). Through such a method, a process is simplified and the cost is lowered when large-area/large-diameter single crystal diamond is heterogeneously grown, stress due to differences in a lattice constant and a coefficient of thermal expansion between the heterogeneous substrate and diamond is relieved, and an occurrence of defects or cracks is reduced even when a temperature drops, such that a high-quality single crystal diamond substrate may be manufactured and the diamond substrate may be easily self-separated from the heterogeneous substrate.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: July 11, 2023
    Assignee: KOREA POLYTECHNIC UNIVERSITY INDUSTRY ACADEMIC COOPERATION FOUNDATION
    Inventors: Ok Hyun Nam, Ui Ho Choi, Geun Ho Yoo
  • Patent number: 11700698
    Abstract: A method for manufacturing a circuit board comprises: a first single-sided board and an insulating structure are provided. The first single-sided board is pressed to the insulating structure and covers opposite side surfaces of the insulating structure to form a first laminated board. A second single-sided board and a third single-sided board are provided. The second single-sided board is pressed to the third single-sided board and covers opposite side walls of the third single-sided board to form a second laminated board. An inner wiring layer is formed by the second laminated board. The second laminated board with the inner wiring layer and the first laminated board are pressed to form an intermediate structure. Outer wiring layers are formed by the intermediate structure. Covering films are formed on surfaces of the outer wiring layers. Electromagnetic interference shielding layers are formed on the covering films.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: July 11, 2023
    Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.
    Inventors: Hao-Yi Wei, Yan-Lu Li
  • Patent number: 11699600
    Abstract: A wafer processing apparatus is configured to process a wafer by supplying mist to a surface of the wafer. The wafer processing apparatus includes a furnace in which the wafer is disposed, a gas supplying device configured to supply gas into the furnace, a mist supplying device configured to supply the mist into the furnace, and a controller. The controller is configured to execute a processing step by controlling the gas supplying device and the mist supplying device to supply the gas and the mist into the furnace, respectively. The controller is further configured to control the mist supplying device to stop supplying the mist into the furnace while controlling the gas supplying device to keep supplying the gas into the furnace when the processing step ends.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: July 11, 2023
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation, National University Corporation Kyoto Institute of Technology
    Inventors: Tatsuji Nagaoka, Hiroki Miyake, Hiroyuki Nishinaka, Yuki Kajita, Masahiro Yoshimoto
  • Patent number: 11688802
    Abstract: A method for forming a high electron mobility transistor is disclosed. A substrate is provided. A channel layer is formed on the substrate. An electron supply layer is formed on the channel layer. A dielectric passivation layer is formed on the electron supply layer. A gate recess is formed into the dielectric passivation layer and the electron supply layer. A surface modification layer is conformally deposited on an interior surface of the gate recess. The surface modification layer is then subjected to an oxidation treatment or a nitridation treatment. A P-type GaN layer is formed in the gate recess and on the surface modification layer.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: June 27, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Wei Chang, Yao-Hsien Chung, Shih-Wei Su, Hao-Hsuan Chang, Ting-An Chien, Bin-Siang Tsai
  • Patent number: 11681337
    Abstract: A method of manufacturing a chassis of an HIS includes manufacturing a chassis having a base panel with an upper chassis surface. The method further includes attaching at least one resilient component to the upper chassis surface and that upwardly presents an adhesive surface to fixedly engage and to provide vibration damping for a storage drive that is inserted on the adhesive surface during assembly of the IHS.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: June 20, 2023
    Assignee: Dell Products, L.P.
    Inventors: Daniel Alvarado, Edmond I. Bailey
  • Patent number: 11683920
    Abstract: An automatic exchanging device is provided which moves alongside the front face of a component mounting line. When an automatic exchange request for a feeder is generated in any of multiple component mounting machines constituting the component mounting line, the automatic exchanging device moves to the front of the component mounting machine in which the automatic exchange request was generated to automatically exchange the feeder. When a new automatic exchange request is generated in any one of the component mounting machines, a pull-out operation of a predetermined number of component mounting machines is prohibited, from the component mounting machine facing the automatic exchanging device toward the position of the component mounting machine in which the new automatic exchange request was generated.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: June 20, 2023
    Assignee: FUJI CORPORATION
    Inventor: Hideya Kuroda
  • Patent number: 11676760
    Abstract: A method for producing a coil for electric apparatus of the present invention is the method for producing a coil for electric apparatus for cutting spirally a block-shaped workpiece formed with a cylindrical portion corresponding to the coil in a circumferential direction of the cylindrical portion, the spiral coil is formed by turning a cutting means while moving it relatively to the workpiece from a part corresponding to one end of the coil to a part corresponding the other end of the coil along a machining line spirally set in the circumferential direction of the cylindrical portion. According to the invention, since the coil is formed by cutting the continuous cutting machining plane without generating a step in design from the block-shaped workpiece formed with a cylindrical portion corresponding to the coil using a wire-tool etc., it is possible to constitute a high-quality coil.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: June 13, 2023
    Assignee: FUKUI PREFECTURAL GOVERNMENT
    Inventors: Yoshinori Sasaki, Masaki Hashimoto, Taiki Tanaka, Hiroshi Sano, Yuichi Hashimoto
  • Patent number: 11672081
    Abstract: A manufacturing method of a metal structure is disclosed, which includes the following steps: forming a seed layer on a substrate; forming a patterned metal layer on the seed layer, wherein the patterned metal layer includes a metal member; forming a first patterned photoresist layer on the seed layer, wherein a thickness of the first patterned photoresist layer is less than a thickness of the patterned metal layer; and performing a first patterning process to the seed layer through the first patterned photoresist layer to form a patterned seed layer, wherein after the first patterning process, the metal member includes a first part and a second part, the first part is disposed between the patterned seed layer and the second part, and a width of the first part is greater than a width of the second part.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: June 6, 2023
    Assignee: InnoLux Corporation
    Inventors: Hsueh-Hsuan Chou, Yi-Hung Lin
  • Patent number: 11672109
    Abstract: Based on the measured values of the electrical characteristics of multiple components including a component positioned in the middle among many components held on the component tape, it is possible to more accurately estimate the electrical characteristics of the many components as compared with the case based on the measured value of the electrical characteristic of a component positioned at the leading end. Also, based on the statistically processed results of these measurement values, it is possible to appropriately evaluate the electrical characteristics of many components. Further, if the electrical characteristics of all of the components are measured, the evaluation can be performed more appropriately.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: June 6, 2023
    Assignee: FUJI CORPORATION
    Inventor: Mitsuhiko Shibata
  • Patent number: 11670531
    Abstract: A pick-up tool (PUT) includes a bridge pick-up head. The bridge pick-up head includes: a first bridge leg portion, a second bridge leg portion, and a bridge center portion between the first and second leg portions, the first and second bridge leg portions each including a top surface and side surfaces, the top surfaces of the first and second bridge leg portions extending above the bridge center portion; a bridge base portion on the bridge center portion, the bridge base portion including a bottom side on the bridge center portion, a top side that is smaller than the bottom side, and one or more sloped surfaces defined between the top and bottom sides; and a tip configured to attach with a semiconductor device on the top side of the bridge base portion.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: June 6, 2023
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Oscar Torrents Abad, Daniel Brodoceanu, Ali Sengül, Pooya Saketi
  • Patent number: 11664711
    Abstract: A method and system of assembling hairpin conductors with a stator core, the system and method including: arranging the plurality of hairpin conductors into two or more sub-assembly fixtures, wherein the plurality of hairpin conductors are arranged in the two or more sub-assembly fixtures in two or more layers; activating a retaining mechanism to hold the plurality of hairpin conductors in place within the sub-assembly fixtures; meshing the two or more sub-assembly fixtures together to bring the hairpin conductors into alignment and form a layered conductor assembly; introducing the layered conductor assembly into the stator core by advancing the two or more sub-assembly fixtures in relation to the stator core in alignment with the locations on the stator core for the layered conductor assembly; and at an appropriate timing, deactivating the retaining mechanism to release the layered conductor assembly from the two or more sub-assembly fixtures.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: May 30, 2023
    Inventors: Glenn Oshel, James MacKinlay, Fred Egge, Dan McCauley
  • Patent number: 11662612
    Abstract: An acousto-optic system may include a laser source, and an AOM coupled to the laser source and having an acousto-optic medium and transducer electrodes carried by the medium. The acousto-optic system may also include an interface board with a dielectric layer and signal contacts carried by the dielectric layer, and connections coupling respective signal contacts with respective transducer electrodes. Each connection may include a dielectric protrusion extending from the AOM, and an electrically conductive layer on the dielectric protrusion for coupling a respective transducer electrode to a respective signal contact.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: May 30, 2023
    Assignee: EAGLE TECHNOLOGY, LLC
    Inventors: Peter A. Wasilousky, Christopher A. Corey, Carrigan L. Braun, Michael R. Lange, Catheryn D. Logan, Randall K. Morse
  • Patent number: 11646208
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming an organosilicon compound layer on a surface of an oxide semiconductor substrate, heating the oxide semiconductor substrate provided with the organosilicon compound layer at a first temperature to form a silicon diffusion layer inside the oxide semiconductor substrate, and removing the organosilicon compound layer from the surface of the oxide semiconductor substrate after heating the oxide semiconductor substrate at the first temperature.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: May 9, 2023
    Assignee: DENSO CORPORATION
    Inventors: Masakazu Watanabe, Shuhei Eguchi
  • Patent number: 11631601
    Abstract: A method of making a transfer head for transferring micro elements, wherein the transfer head includes a cavity with a plurality of vacuum paths and a suite having arrayed suction nozzles and vacuum paths. The suction nozzles are connected to the vacuum path components respectively, and the vacuum path components are formed to connect to vacuum paths in the cavity respectively. The suction nozzles attract or release the micro element through vacuum pressure transmitted by vacuum. When the suite is mounted in the cavity, the upper surface of the suite is arranged with optical switching components for controlling the switch of the vacuum path components and vacuum paths of each path so that the suction nozzles can attract or release required micro element through vacuum pressure; and fabricating a suite with an array micro-hole structure, wherein the array micro-hole structure serves as the vacuum path components and the suction nozzles.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: April 18, 2023
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Chen-ke Hsu, Jiansen Zheng, Xiaojuan Shao, Kechuang Lin
  • Patent number: 11617272
    Abstract: A multilayer circuit board structure includes superconducting connections to internal layers thereof, for example by inclusion of superconducting vias. Two or more panels can each comprise respective electrically insulative substrates, each have one or more through-holes, and also include a respective bimetal foil on at least a portion of a respective surface thereof, which is patterned to form traces. The bimetal foil includes a first metal that is non-superconductive in a first temperature range and a second metal that is superconductive in the first temperature range. The panels are plated to deposit a third metal on exposed traces of the second metal, the third metal superconductive in the first temperature range. Panels are join (e.g., laminated) to form at least a three-layer superconducting printed circuit board with an inner layer, two outer layers, and superconducting vias between the inner layer and at least one of the two outer layers.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: March 28, 2023
    Assignee: D-WAVE SYSTEMS INC.
    Inventor: Richard D. Neufeld
  • Patent number: 11606865
    Abstract: A process of fabricating an electromagnetic circuit includes providing three laminate sheets, forming a first feature in a first laminate sheet of the three laminate sheets, and forming a second feature in a second laminate sheet of the three laminate sheets. The second feature is aligned with the first feature when aligning the second laminate sheet with the first laminate sheet. The process further includes stacking the three laminate sheets so that the first laminate sheet is positioned above and aligned with the second laminate sheet and the second laminate sheet is positioned above and aligned with the third laminate sheet. The first feature and the second feature define a contiguous element. The process further includes filling the contiguous element with an electrically conductive material to form an electrically continuous conductor.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: March 14, 2023
    Assignee: RAYTHEON COMPANY
    Inventors: Mikhail Pevzner, Gregory G. Beninati, James E. Benedict, Andrew R. Southworth